On Fri, 10 May 2019 16:11:54 +0200, Hans Verkuil wrote:
> On 5/10/19 3:52 PM, Michael Tretter wrote:
> > On Fri, 10 May 2019 12:58:43 +0200, Hans Verkuil wrote:
> >> On 5/10/19 12:28 PM, Michael Tretter wrote:
> >>> On Fri, 10 May 2019 10:28:53 +0200, Hans Verkuil wrote:
> On 5/3/19 2:
On 5/10/19 3:52 PM, Michael Tretter wrote:
> On Fri, 10 May 2019 12:58:43 +0200, Hans Verkuil wrote:
>> On 5/10/19 12:28 PM, Michael Tretter wrote:
>>> On Fri, 10 May 2019 10:28:53 +0200, Hans Verkuil wrote:
On 5/3/19 2:20 PM, Michael Tretter wrote:
> Add a V4L2 mem-to-mem driver for A
On Fri, 10 May 2019 12:58:43 +0200, Hans Verkuil wrote:
> On 5/10/19 12:28 PM, Michael Tretter wrote:
> > On Fri, 10 May 2019 10:28:53 +0200, Hans Verkuil wrote:
> >> On 5/3/19 2:20 PM, Michael Tretter wrote:
> >>> Add a V4L2 mem-to-mem driver for Allegro DVT video IP cores as found in
> >>> th
On 5/10/19 12:28 PM, Michael Tretter wrote:
> On Fri, 10 May 2019 10:28:53 +0200, Hans Verkuil wrote:
>> On 5/3/19 2:20 PM, Michael Tretter wrote:
>>> Add a V4L2 mem-to-mem driver for Allegro DVT video IP cores as found in
>>> the EV family of the Xilinx ZynqMP SoC. The Zynq UltraScale+ Device
>>>
On Fri, 2019-05-10 at 10:28 +0200, Hans Verkuil wrote:
[...]
> > +static int allegro_g_selection(struct file *file, void *priv,
> > + struct v4l2_selection *s)
> > +{
> > + struct v4l2_fh *fh = file->private_data;
> > + struct allegro_channel *channel = fh_to_channel(fh
On Fri, 10 May 2019 10:28:53 +0200, Hans Verkuil wrote:
> On 5/3/19 2:20 PM, Michael Tretter wrote:
> > Add a V4L2 mem-to-mem driver for Allegro DVT video IP cores as found in
> > the EV family of the Xilinx ZynqMP SoC. The Zynq UltraScale+ Device
> > Technical Reference Manual uses the term VCU (V
On 5/3/19 2:20 PM, Michael Tretter wrote:
> Add a V4L2 mem-to-mem driver for Allegro DVT video IP cores as found in
> the EV family of the Xilinx ZynqMP SoC. The Zynq UltraScale+ Device
> Technical Reference Manual uses the term VCU (Video Codec Unit) for the
> encoder, decoder and system integrati
Hi Michael,
I love your patch! Perhaps something to improve:
[auto build test WARNING on linuxtv-media/master]
[also build test WARNING on v5.1-rc7 next-20190503]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-
Add a V4L2 mem-to-mem driver for Allegro DVT video IP cores as found in
the EV family of the Xilinx ZynqMP SoC. The Zynq UltraScale+ Device
Technical Reference Manual uses the term VCU (Video Codec Unit) for the
encoder, decoder and system integration block.
This driver takes care of interacting w
