On 3/28/19 9:59 AM, Michael Tretter wrote:
> On Wed, 27 Mar 2019 13:57:10 +0100, Hans Verkuil wrote:
>> On 3/1/19 4:27 PM, Michael Tretter wrote:
>>> Add device-tree bindings for the Allegro DVT video IP core found on the
>>> Xilinx ZynqMP EV family.
>>>
>>> Signed-off-by: Michael Tretter
>>> Revi
On Wed, 27 Mar 2019 13:57:10 +0100, Hans Verkuil wrote:
> On 3/1/19 4:27 PM, Michael Tretter wrote:
> > Add device-tree bindings for the Allegro DVT video IP core found on the
> > Xilinx ZynqMP EV family.
> >
> > Signed-off-by: Michael Tretter
> > Reviewed-by: Rob Herring
> > ---
> > v3 -> v4:
>
On 3/1/19 4:27 PM, Michael Tretter wrote:
> Add device-tree bindings for the Allegro DVT video IP core found on the
> Xilinx ZynqMP EV family.
>
> Signed-off-by: Michael Tretter
> Reviewed-by: Rob Herring
> ---
> v3 -> v4:
> none
>
> v2 -> v3:
> - rename node to video-codec
> - drop interrupt-n
Add device-tree bindings for the Allegro DVT video IP core found on the
Xilinx ZynqMP EV family.
Signed-off-by: Michael Tretter
Reviewed-by: Rob Herring
---
v3 -> v4:
none
v2 -> v3:
- rename node to video-codec
- drop interrupt-names
- fix compatible in example
- add clocks to required properti
