On 26/06/16 23:06, Martin Blumenstingl wrote:
> According to the reference driver (and the datasheet of the newer
> Meson8b/S805 and GXBB/S905 SoCs) there are 14 registers, each 32 bit
> wide.
Then why are you modifying the DTS for the Meson6? As Neil already
suggested, it seems that the hardware
According to the reference driver (and the datasheet of the newer
Meson8b/S805 and GXBB/S905 SoCs) there are 14 registers, each 32 bit
wide.
Adjust the register size to reflect that, as register offset 0x20 is
now also needed by the meson-ir driver.
Signed-off-by: Martin Blumenstingl
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