On Mon, 21 Jan 2019 11:13:48 -0600, Rob Herring wrote:
> On Fri, Jan 18, 2019 at 02:37:14PM +0100, Michael Tretter wrote:
> > Add device-tree bindings for the Allegro DVT video IP core found on the
> > Xilinx ZynqMP EV family.
> >
> > Signed-off-by: Michael Tretter
> > ---
> > Changes since v1:
>
On Mon, 21 Jan 2019 11:17:43 -0500, Nicolas Dufresne wrote:
> Le lundi 21 janvier 2019 à 11:59 +0100, Philipp Zabel a écrit :
> > On Fri, 2019-01-18 at 14:37 +0100, Michael Tretter wrote:
> > > Add device-tree bindings for the Allegro DVT video IP core found on the
> > > Xilinx ZynqMP EV family.
On Fri, Jan 18, 2019 at 02:37:14PM +0100, Michael Tretter wrote:
> Add device-tree bindings for the Allegro DVT video IP core found on the
> Xilinx ZynqMP EV family.
>
> Signed-off-by: Michael Tretter
> ---
> Changes since v1:
> none
>
> ---
> .../devicetree/bindings/media/allegro.txt | 35
On Mon, 2019-01-21 at 11:17 -0500, Nicolas Dufresne wrote:
[...]
> > > +Example:
> > > + al5e: al5e@a0009000 {
> >
> > Should the node names be "vpu" or "video-codec"?
>
> Xilinx calls this IP the "vcu", so "vpu" would be even more confusing.
> Was this just a typo ?
I was just going by what is
Le lundi 21 janvier 2019 à 11:59 +0100, Philipp Zabel a écrit :
> On Fri, 2019-01-18 at 14:37 +0100, Michael Tretter wrote:
> > Add device-tree bindings for the Allegro DVT video IP core found on the
> > Xilinx ZynqMP EV family.
> >
> > Signed-off-by: Michael Tretter
> > ---
> > Changes since v1:
On Fri, 2019-01-18 at 14:37 +0100, Michael Tretter wrote:
> Add device-tree bindings for the Allegro DVT video IP core found on the
> Xilinx ZynqMP EV family.
>
> Signed-off-by: Michael Tretter
> ---
> Changes since v1:
> none
>
> ---
> .../devicetree/bindings/media/allegro.txt | 35 +++
Add device-tree bindings for the Allegro DVT video IP core found on the
Xilinx ZynqMP EV family.
Signed-off-by: Michael Tretter
---
Changes since v1:
none
---
.../devicetree/bindings/media/allegro.txt | 35 +++
1 file changed, 35 insertions(+)
create mode 100644 Documentati
