On Tue, Jun 04, 2019 at 10:49:21AM +0200, Boris Brezillon wrote:
> On Tue, 4 Jun 2019 10:31:57 +0200
> Thierry Reding wrote:
>
> > > > > > - Using flags
> > > > > >
> > > > > > The current MPEG-2 controls have lots of u8 values
On Mon, Jun 03, 2019 at 02:52:44PM -0400, Nicolas Dufresne wrote:
[...]
> There is one thing that come up though, if we enable per-frame decoding
> on top of per-slice decoder (like Cedrus), won't we force userspace to
> always compute l0/l1 even though the HW might be handling that ? Shall
> we in
On Mon, Jun 03, 2019 at 02:52:44PM -0400, Nicolas Dufresne wrote:
> Le lundi 03 juin 2019 à 13:24 +0200, Thierry Reding a écrit :
> > On Wed, May 15, 2019 at 12:09:45PM +0200, Paul Kocialkowski wrote:
> > > Hi,
> > >
> > > With the Rockchip stateless VP
On Mon, Jun 03, 2019 at 09:41:17PM +0200, Boris Brezillon wrote:
> On Mon, 03 Jun 2019 14:52:44 -0400
> Nicolas Dufresne wrote:
>
> > > > - Dropping the DPB concept in H.264/H.265
> > > >
> > > > As far as I could understand, the decoded picture buffer (DPB) is a
> > > > concept that only makes
On Mon, Jun 03, 2019 at 05:37:11PM +0200, Boris Brezillon wrote:
> On Mon, 3 Jun 2019 16:05:26 +0200
> Thierry Reding wrote:
>
> > On Mon, Jun 03, 2019 at 02:51:13PM +0200, Boris Brezillon wrote:
> > > +Maxime
> > >
> > > Oops, just realized Maxime was
On Mon, Jun 03, 2019 at 07:55:48PM -0400, Nicolas Dufresne wrote:
> Le lundi 03 juin 2019 à 23:48 +0200, Jernej Škrabec a écrit :
> > Dne ponedeljek, 03. junij 2019 ob 13:09:45 CEST je Boris Brezillon
> > napisal(a):
> > > The driver only supports per-slice decoding, and in that mode
> > > decode_
On Mon, Jun 03, 2019 at 02:51:13PM +0200, Boris Brezillon wrote:
> +Maxime
>
> Oops, just realized Maxime was not Cc-ed on this series.
>
> On Mon, 3 Jun 2019 14:30:20 +0200
> Thierry Reding wrote:
>
> > On Mon, Jun 03, 2019 at 01:09:42PM +0200, Boris Brezillon
On Mon, Jun 03, 2019 at 01:09:42PM +0200, Boris Brezillon wrote:
> Some stateless decoders don't support per-slice decoding (or at least
> not in a way that would make them efficient or easy to use).
> Let's expose a menu to control and expose the supported decoding modes.
> Drivers are allowed to
On Wed, May 15, 2019 at 12:09:45PM +0200, Paul Kocialkowski wrote:
> Hi,
>
> With the Rockchip stateless VPU driver in the works, we now have a
> better idea of what the situation is like on platforms other than
> Allwinner. This email shares my conclusions about the situation and how
> we should
On Wed, May 22, 2019 at 12:55:53PM +0200, Hans Verkuil wrote:
> On 5/22/19 12:42 PM, Thierry Reding wrote:
> > On Wed, May 22, 2019 at 10:26:28AM +0200, Paul Kocialkowski wrote:
> >> Hi,
> >>
> >> Le mercredi 22 mai 2019 à 15:48 +0900, Tomasz Figa a écrit :
&g
On Wed, May 22, 2019 at 11:29:13AM +0200, Paul Kocialkowski wrote:
> Le mercredi 22 mai 2019 à 10:32 +0200, Thierry Reding a écrit :
> > On Wed, May 22, 2019 at 09:29:24AM +0200, Boris Brezillon wrote:
> > > On Wed, 22 May 2019 15:39:37 +0900
> > > Tomasz Figa wrote:
&
On Wed, May 22, 2019 at 10:26:28AM +0200, Paul Kocialkowski wrote:
> Hi,
>
> Le mercredi 22 mai 2019 à 15:48 +0900, Tomasz Figa a écrit :
> > On Sat, May 18, 2019 at 11:09 PM Nicolas Dufresne
> > wrote:
> > > Le samedi 18 mai 2019 à 12:29 +0200, Paul Kocialkowski a écrit :
> > > > Hi,
> > > >
>
On Tue, May 21, 2019 at 12:23:46PM -0400, Nicolas Dufresne wrote:
> Le mardi 21 mai 2019 à 17:43 +0200, Thierry Reding a écrit :
> > On Wed, May 15, 2019 at 07:42:50PM +0200, Paul Kocialkowski wrote:
> > > Hi,
> > >
> > > Le mercredi 15 mai 2019 à 1
On Wed, May 22, 2019 at 09:29:24AM +0200, Boris Brezillon wrote:
> On Wed, 22 May 2019 15:39:37 +0900
> Tomasz Figa wrote:
>
> > > It would be premature to state that we are excluding. We are just
> > > trying to find one format to get things upstream, and make sure we have
> > > a plan how to ex
On Tue, May 21, 2019 at 12:07:47PM -0400, Nicolas Dufresne wrote:
> Le mardi 21 mai 2019 à 17:09 +0200, Thierry Reding a écrit :
> > On Tue, May 21, 2019 at 01:44:50PM +0200, Paul Kocialkowski wrote:
> > > Hi,
> > >
> > > On Tue, 2019-05-21 at 19:27 +0900, To
On Wed, May 15, 2019 at 07:42:50PM +0200, Paul Kocialkowski wrote:
> Hi,
>
> Le mercredi 15 mai 2019 à 10:42 -0400, Nicolas Dufresne a écrit :
> > Le mercredi 15 mai 2019 à 12:09 +0200, Paul Kocialkowski a écrit :
> > > Hi,
> > >
> > > With the Rockchip stateless VPU driver in the works, we now h
On Tue, May 21, 2019 at 01:44:50PM +0200, Paul Kocialkowski wrote:
> Hi,
>
> On Tue, 2019-05-21 at 19:27 +0900, Tomasz Figa wrote:
> > On Thu, May 16, 2019 at 2:43 AM Paul Kocialkowski
> > wrote:
> > > Hi,
> > >
> > > Le mercredi 15 mai 2019 à 10:42 -0400, Nicolas Dufresne a écrit :
> > > > Le m
On Mon, Apr 08, 2019 at 01:03:55PM +0200, Hans Verkuil wrote:
> Add helper function to parse the DT for the hdmi-phandle property
> and find the corresponding struct device pointer.
>
> It takes care to avoid increasing the device refcount since all
> we need is the device pointer. This pointer is
ari Ailus
> Cc: sta...@vger.kernel.org
> ---
> drivers/media/v4l2-core/v4l2-ioctl.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
Seems reasonable:
Reviewed-by: Thierry Reding
signature.asc
Description: PGP signature
fmt.pix_mp.xfer_func);
> + if (p->fmt.pix_mp.num_planes > VIDEO_MAX_PLANES)
> + break;
> for (i = 0; i < p->fmt.pix_mp.num_planes; i++)
> CLEAR_AFTER_FIELD(&p->fmt.pix_mp.plane_fmt[i],
> bytesperline);
> return ops->vidioc_try_fmt_vid_out_mplane(file, fh, arg);
Do we also want to validate the instance in v4l_print_format() before
using it?
Reviewed-by: Thierry Reding
signature.asc
Description: PGP signature
From: Thierry Reding
Currently the IOCTL code clears everything after the per-plane
bytesperline field in struct v4l2_format. The intent was to only clear
the per-plane reserved fields since there is data in struct v4l2_format
after the per-plane format data that userspace may have filled in
On Tue, Dec 18, 2018 at 10:42:30AM -0600, Rob Herring wrote:
> On Tue, Dec 11, 2018 at 10:48:39AM +0100, Thierry Reding wrote:
> > From: Thierry Reding
> >
> > The Tegra186 and Tegra194 contain a CEC controller that is identical to
> > that found in earlier generatio
On Tue, Dec 11, 2018 at 10:40:55AM +0100, Hans Verkuil wrote:
> (Resend, this time with a proper reply)
>
> On 12/11/18 10:38 AM, Thierry Reding wrote:
> > On Tue, Dec 11, 2018 at 10:19:48AM +0100, Hans Verkuil wrote:
> >> On 12/10/18 9:59 PM, Thierry Reding wrote:
>
From: Thierry Reding
Exporting the OF device ID match table allows udev to automatically load
the module upon receiving an "ADD" uevent for the CEC controller device.
Signed-off-by: Thierry Reding
---
drivers/media/platform/tegra-cec/tegra_cec.c | 1 +
1 file changed, 1 insertio
From: Thierry Reding
The CEC controller found on Tegra186 and Tegra194 is the same as on
earlier generations.
Signed-off-by: Thierry Reding
---
drivers/media/platform/tegra-cec/tegra_cec.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/media/platform/tegra-cec/tegra_cec.c
b
From: Thierry Reding
The Tegra186 and Tegra194 contain a CEC controller that is identical to
that found in earlier generations. Document the compatible strings for
these newer chips.
Signed-off-by: Thierry Reding
---
Changes in v2:
- new patch adding missing compatible strings
Documentation
On Tue, Dec 11, 2018 at 10:26:14AM +0100, Hans Verkuil wrote:
> On 12/10/18 5:00 PM, Thierry Reding wrote:
> > From: Thierry Reding
> >
> > The CEC controller found on Tegra186 and Tegra194 is the same as on
> > earlier generations.
> >
> > Signed-off-b
On Tue, Dec 11, 2018 at 10:19:48AM +0100, Hans Verkuil wrote:
> On 12/10/18 9:59 PM, Thierry Reding wrote:
> > On Mon, Dec 10, 2018 at 06:07:10PM +0100, Hans Verkuil wrote:
> >> Hi Thierry,
> >>
> >> On 12/10/18 5:00 PM, Thierry Reding wrote:
> >&g
On Mon, Dec 10, 2018 at 06:07:10PM +0100, Hans Verkuil wrote:
> Hi Thierry,
>
> On 12/10/18 5:00 PM, Thierry Reding wrote:
> > From: Thierry Reding
> >
> > The CEC controller found on Tegra186 and Tegra194 is the same as on
> > earlier generations.
>
>
From: Thierry Reding
Most of the CEC support code already lives in the "output" library code.
Move registration and unregistration to the library code as well to make
use of the same code with HDMI on Tegra210 and later via the SOR.
Signed-off-by: Thierry Reding
---
drivers/gpu
From: Thierry Reding
Exporting the OF device ID match table allows udev to automatically load
the module upon receiving an "ADD" uevent for the CEC controller device.
Signed-off-by: Thierry Reding
---
drivers/media/platform/tegra-cec/tegra_cec.c | 1 +
1 file changed, 1 insertio
From: Thierry Reding
The CEC controller found on Tegra186 and Tegra194 is the same as on
earlier generations.
Signed-off-by: Thierry Reding
---
drivers/media/platform/tegra-cec/tegra_cec.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/media/platform/tegra-cec/tegra_cec.c
b
On Mon, Sep 03, 2018 at 02:18:15PM +0200, Hans Verkuil wrote:
> Hi Thierry, Dmitry,
>
> Dmitry found some issues, so I'll wait for a v2.
>
> Anyway, this driver is in staging with this TODO:
>
> - Implement V4L2 API once it gains support for stateless decoders.
>
> I just wanted to mention that
On Mon, Aug 13, 2018 at 06:09:46PM +0300, Dmitry Osipenko wrote:
> On Monday, 13 August 2018 17:50:14 MSK Thierry Reding wrote:
> > From: Thierry Reding
> >
> > The BSEV clock has a separate gate bit and can not be assumed to be
> > always enabled. Add explicit hand
From: Thierry Reding
The video decode engine can use the SMMU to use buffers that are not
physically contiguous in memory. This allows better memory usage for
video decoding, since fragmentation may cause contiguous allocations
to fail.
Signed-off-by: Thierry Reding
---
arch/arm/boot/dts
From: Thierry Reding
Signed-off-by: Thierry Reding
---
arch/arm/boot/dts/tegra20.dtsi | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 15b73bd377f0..abb5738a0705 100644
--- a/arch/arm/boot/dts
From: Thierry Reding
Signed-off-by: Thierry Reding
---
arch/arm/boot/dts/tegra30.dtsi | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index a6781f653310..492917d61bab 100644
--- a/arch/arm/boot/dts
From: Thierry Reding
The pointer to the struct device is frequently used, so store it in
struct tegra_vde. Also, pass around a pointer to a struct tegra_vde
instead of struct device in some cases to prepare for subsequent
patches referencing additional data from that structure.
Signed-off-by
From: Thierry Reding
Implement support for using an IOMMU to map physically discontiguous
buffers into contiguous I/O virtual mappings that the VDE can use. This
allows importing arbitrary DMA-BUFs for use by the VDE.
While at it, make sure that the device is detached from any DMA/IOMMU
mapping
From: Thierry Reding
There is no point in keeping the VDE module out of reset when it is not
in use. Reset it on runtime suspend.
Signed-off-by: Thierry Reding
---
drivers/staging/media/tegra-vde/tegra-vde.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/staging/media/tegra-vde
From: Thierry Reding
Signed-off-by: Thierry Reding
---
arch/arm/boot/dts/tegra124.dtsi | 40 +
1 file changed, 40 insertions(+)
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index b113e47b2b2a..8fdca4723205 100644
--- a/arch/arm
From: Thierry Reding
Add some comments specifying what tables are being set up in VRAM.
Signed-off-by: Thierry Reding
---
drivers/staging/media/tegra-vde/tegra-vde.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/staging/media/tegra-vde/tegra-vde.c
b/drivers
From: Thierry Reding
Entries in the reference picture list are marked as invalid by setting
the frame ID to 0x3f.
Signed-off-by: Thierry Reding
---
drivers/staging/media/tegra-vde/tegra-vde.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/media/tegra-vde
From: Thierry Reding
The BSEV clock has a separate gate bit and can not be assumed to be
always enabled. Add explicit handling for the BSEV clock and reset.
This fixes an issue on Tegra124 where the BSEV clock is not enabled
by default and therefore accessing the BSEV registers will hang the
From: Thierry Reding
Include the invalid file descriptor when reporting an error message to
help diagnosing why importing the buffer failed.
Signed-off-by: Thierry Reding
---
drivers/staging/media/tegra-vde/tegra-vde.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
From: Thierry Reding
Tegra114 and Tegra124 support reference picture marking, which will
cause BSEV to write picture marking data to SDRAM. Make sure there is
a valid destination address for that data to avoid error messages from
the memory controller.
Signed-off-by: Thierry Reding
From: Thierry Reding
The number of frames doubles when decoding interlaced content and the
structures describing the frames double in size. Take that into account
to prepare for interlacing support.
Signed-off-by: Thierry Reding
---
drivers/staging/media/tegra-vde/tegra-vde.c | 73
From: Thierry Reding
Hi,
this set of patches perform a bit of cleanup and extend support to the
VDE implementation found on Tegra114 and Tegra124. This requires adding
handling for a clock and a reset for the BSEV block that is separate
from the main VDE block. The new VDE revision also
From: Thierry Reding
VDE on Tegra20 through Tegra114 supports reading and writing frames in
16x16 tiled layout. Similarily, the various block-linear layouts that
are supported by the GPU on Tegra124 can also be read from and written
to by the Tegra124 VDE.
Enable userspace to specify the
On Wed, Apr 25, 2018 at 09:30:39AM +0200, Daniel Vetter wrote:
> On Wed, Apr 25, 2018 at 12:09:05AM -0700, Christoph Hellwig wrote:
> > On Wed, Apr 25, 2018 at 09:02:17AM +0200, Daniel Vetter wrote:
> > > Can we please not nack everything right away? Doesn't really motivate
> > > me to show you all
On Wed, Apr 25, 2018 at 12:09:05AM -0700, Christoph Hellwig wrote:
> On Wed, Apr 25, 2018 at 09:02:17AM +0200, Daniel Vetter wrote:
> > Can we please not nack everything right away? Doesn't really motivate
> > me to show you all the various things we're doing in gpu to make the
> > dma layer work f
On Tue, Apr 24, 2018 at 11:43:35PM -0700, Christoph Hellwig wrote:
> On Wed, Apr 25, 2018 at 08:23:15AM +0200, Daniel Vetter wrote:
> > For more fun:
> >
> > https://www.spinics.net/lists/dri-devel/msg173630.html
> >
> > Yeah, sometimes we want to disable the iommu because the on-gpu
> > pagetabl
On Thu, Feb 22, 2018 at 02:01:16PM +0200, Claudiu Beznea wrote:
> Add PWM mode to pwm_config() function. The drivers which uses pwm_config()
> were adapted to this change.
>
> Signed-off-by: Claudiu Beznea
> ---
> arch/arm/mach-s3c24xx/mach-rx1950.c | 11 +--
> drivers/bus/ts-nbus.c
On Tue, Jan 30, 2018 at 10:24:48AM +0100, Arnd Bergmann wrote:
> On Tue, Jan 30, 2018 at 8:54 AM, Maxime Ripard
> wrote:
> > On Mon, Jan 29, 2018 at 03:34:02PM +0100, Arnd Bergmann wrote:
> >> On Mon, Jan 29, 2018 at 10:25 AM, Linus Walleij
> >> wrote:
> >> > On Mon, Jan 29, 2018 at 9:25 AM, Maxi
On Tue, Jan 30, 2018 at 10:59:16AM +0100, Thierry Reding wrote:
> On Tue, Jan 30, 2018 at 10:24:48AM +0100, Arnd Bergmann wrote:
> > On Tue, Jan 30, 2018 at 8:54 AM, Maxime Ripard
> > wrote:
> > > On Mon, Jan 29, 2018 at 03:34:02PM +0100, Arnd Bergmann wrote:
> > &g
On Tue, Dec 12, 2017 at 03:26:10AM +0300, Dmitry Osipenko wrote:
> Add Video Decoder Engine device node.
>
> Signed-off-by: Dmitry Osipenko
> ---
> arch/arm/boot/dts/tegra20.dtsi | 27 +++
> 1 file changed, 27 insertions(+)
Applied, thanks.
Thierry
signature.asc
Descr
On Tue, Dec 12, 2017 at 03:26:09AM +0300, Dmitry Osipenko wrote:
> From: Vladimir Zapolskiy
>
> All Tegra20 SoCs contain 256KiB IRAM, which is used to store
> resume code and by a video decoder engine.
>
> Signed-off-by: Vladimir Zapolskiy
> Signed-off-by: Dmitry Osipenko
> ---
> arch/arm/boo
On Thu, Oct 19, 2017 at 03:37:43PM +0200, Hans Verkuil wrote:
> On 10/19/17 15:30, Thierry Reding wrote:
> > On Thu, Oct 19, 2017 at 03:17:16PM +0200, Thierry Reding wrote:
> >> On Mon, Sep 11, 2017 at 02:29:52PM +0200, Hans Verkuil wrote:
> >>> From: Hans Verkuil
&
On Thu, Oct 19, 2017 at 03:17:16PM +0200, Thierry Reding wrote:
> On Mon, Sep 11, 2017 at 02:29:52PM +0200, Hans Verkuil wrote:
> > From: Hans Verkuil
> >
> > In order to support CEC the HDMI driver has to inform the CEC driver
> > whenever the physical address change
On Mon, Sep 11, 2017 at 02:29:52PM +0200, Hans Verkuil wrote:
> From: Hans Verkuil
>
> In order to support CEC the HDMI driver has to inform the CEC driver
> whenever the physical address changes. So when the EDID is read the
> CEC driver has to be informed and whenever the hotplug detect goes
>
On Thu, Oct 19, 2017 at 11:36:14AM +0200, Hans Verkuil wrote:
> On 10/19/17 11:20, Thierry Reding wrote:
> > On Mon, Sep 11, 2017 at 02:29:48PM +0200, Hans Verkuil wrote:
> >> From: Hans Verkuil
> >>
> >> This patch series adds support for the Tegra CEC funct
On Mon, Sep 11, 2017 at 02:29:52PM +0200, Hans Verkuil wrote:
> From: Hans Verkuil
>
> In order to support CEC the HDMI driver has to inform the CEC driver
> whenever the physical address changes. So when the EDID is read the
> CEC driver has to be informed and whenever the hotplug detect goes
>
e like it'd
actually be simpler if the CEC controller was a "service provider" that
HDMI could use and "request/release" as appropriate.
In that case, the DT would look somewhat like this:
hdmi@... {
cec = <&cec>;
};
ce
On Mon, Sep 11, 2017 at 02:29:50PM +0200, Hans Verkuil wrote:
> From: Hans Verkuil
>
> Add support for the Tegra CEC IP to tegra124.dtsi and enable it on the
> Jetson TK1.
>
> Signed-off-by: Hans Verkuil
> ---
> arch/arm/boot/dts/tegra124-jetson-tk1.dts | 4
> arch/arm/boot/dts/tegra124.
corresponding to the entry in the clocks property.
> + - hdmi-phandle : phandle to the HDMI controller, see also cec.txt.
I don't understand the need for the -phandle suffix. I would've probably
just gone with "hdmi", or "hdmi-controller". But I see that this is
already pretty standardized, so...
Acked-by: Thierry Reding
signature.asc
Description: PGP signature
On Mon, Sep 11, 2017 at 02:29:48PM +0200, Hans Verkuil wrote:
> From: Hans Verkuil
>
> This patch series adds support for the Tegra CEC functionality.
>
> This v4 has been rebased to the latest 4.14 pre-rc1 mainline.
>
> Please review! Other than for the bindings that are now Acked I have not
>
On Tue, Oct 17, 2017 at 03:13:54PM -0500, Rob Herring wrote:
[...]
> > diff --git
> > a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-vde.txt
> > b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-vde.txt
[...]
> > +- resets : Must contain an entry for each entry in reset-n
On Sat, Oct 14, 2017 at 02:08:31PM +0200, Hans Verkuil wrote:
> Hi Thierry,
>
> On 09/11/2017 02:29 PM, Hans Verkuil wrote:
> > From: Hans Verkuil
> >
> > This patch series adds support for the Tegra CEC functionality.
> >
> > This v4 has been rebased to the latest 4.14 pre-rc1 mainline.
> >
>
o Dimitrov
> Acked-by: Rob Herring
> ---
> Documentation/devicetree/bindings/pwm/pwm-omap-dmtimer.txt | 4
> drivers/pwm/pwm-omap-dmtimer.c | 12 +++-
> 2 files changed, 11 insertions(+), 5 deletions(-)
Acked-by: Thierry Reding
signature.asc
Description: PGP signature
From: Thierry Reding
Accesses to the UVC device's mdev field need to be protected by a
preprocessor conditional to avoid build errors, since the field is only
included if the MEDIA_CONTROLLER option is selected.
Fixes: 1590ad7b5271 ("[media] media-device: split media initiali
On Mon, Sep 21, 2015 at 11:55:55AM -0700, Bryan Wu wrote:
> Signed-off-by: Bryan Wu
> ---
> .../bindings/gpu/nvidia,tegra20-host1x.txt | 211
> -
> 1 file changed, 205 insertions(+), 6 deletions(-)
Also you probably want to include devicet...@vger.kernel.org on the
b
On Mon, Sep 21, 2015 at 11:55:55AM -0700, Bryan Wu wrote:
> Signed-off-by: Bryan Wu
> ---
> .../bindings/gpu/nvidia,tegra20-host1x.txt | 211
> -
> 1 file changed, 205 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/gpu/nvidia,tegra20
Hi Bryan,
This patchset really needs to be Cc'ed to linux-te...@vger.kernel.org,
it's becoming impossible to track it otherwise.
On Mon, Sep 21, 2015 at 11:55:54AM -0700, Bryan Wu wrote:
[...]
> diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
>
On Mon, Sep 21, 2015 at 11:55:53AM -0700, Bryan Wu wrote:
[...]
> +static int tegra_csi_s_stream(struct v4l2_subdev *subdev, int enable)
> +{
> + struct tegra_csi_device *csi = to_csi(subdev);
> + struct tegra_channel *chan = subdev->host_priv;
> + enum tegra_csi_port_num port_num = (ch
On Tue, Aug 25, 2015 at 04:15:58PM +0200, Hans Verkuil wrote:
> On 08/25/15 15:44, Thierry Reding wrote:
> > On Mon, Aug 24, 2015 at 05:26:20PM -0700, Bryan Wu wrote:
[...]
> > > For CMA we need increase the default memory size.
> >
> > I'd rather not rely on
On Mon, Aug 24, 2015 at 05:26:20PM -0700, Bryan Wu wrote:
> On 08/21/2015 06:03 AM, Thierry Reding wrote:
> >On Thu, Aug 20, 2015 at 05:51:39PM -0700, Bryan Wu wrote:
[...]
> >>+#define TEGRA_CSI_PHY_CIL_COMMAND 0x0908
> >This doesn't seem to be used a
On Tue, Aug 25, 2015 at 08:30:41AM +0200, Hans Verkuil wrote:
> A quick follow-up to Thierry's excellent review:
>
> On 08/25/2015 02:26 AM, Bryan Wu wrote:
> > On 08/21/2015 06:03 AM, Thierry Reding wrote:
> >> On Thu, Aug 20, 2015 at 05:51:39PM -0700, Bryan Wu wrote
On Thu, Aug 20, 2015 at 05:51:39PM -0700, Bryan Wu wrote:
> NVIDIA Tegra processor contains a powerful Video Input (VI) hardware
> controller which can support up to 6 MIPI CSI camera sensors.
>
> This patch adds a V4L2 media controller and capture driver to support
> Tegra VI hardware. It's verif
On Wed, May 06, 2015 at 07:29:56AM -0400, Rob Clark wrote:
> On Wed, May 6, 2015 at 4:35 AM, Daniel Vetter wrote:
> > On Tue, May 05, 2015 at 05:54:05PM +0100, One Thousand Gnomes wrote:
> >> > First what is Secure Data Path ? SDP is a set of hardware features to
> >> > garanty
> >> > that some m
On Wed, May 06, 2015 at 03:15:32PM +0200, Daniel Vetter wrote:
> On Wed, May 06, 2015 at 11:19:21AM +0200, Thierry Reding wrote:
> > On Wed, May 06, 2015 at 10:35:52AM +0200, Daniel Vetter wrote:
> > > On Tue, May 05, 2015 at 05:54:05PM +0100, One Thousand Gnomes wrote:
>
On Wed, May 06, 2015 at 10:35:52AM +0200, Daniel Vetter wrote:
> On Tue, May 05, 2015 at 05:54:05PM +0100, One Thousand Gnomes wrote:
> > > First what is Secure Data Path ? SDP is a set of hardware features to
> > > garanty
> > > that some memories regions could only be read and/or write by specif
3.20 for the media git tree.
Patches 1, 2 and 3:
Acked-by: Thierry Reding
pgpULFGjIc2lj.pgp
Description: PGP signature
On Tue, Dec 09, 2014 at 03:39:26PM +0100, Luc Verhaegen wrote:
> On Thu, Oct 02, 2014 at 07:44:57PM +0200, Luc Verhaegen wrote:
> > Hi,
> >
> > At FOSDEM on the 31st of january and the 1st of February 2015, there
> > will be another graphics DevRoom. URL: https://fosdem.org/2015/
>
> > Slots wil
On Thu, Dec 11, 2014 at 09:57:54AM +0100, Hans Verkuil wrote:
> Hi Thierry,
>
> On 12/02/14 13:08, Hans Verkuil wrote:
> > This patch series adds new HDMI 2.0/CEA-861-F defines to hdmi.h and
> > adds unpacking and logging functions to hdmi.c. It also uses those
> > in the V4L2 adv7842 driver (and
On Tue, Dec 02, 2014 at 01:08:45PM +0100, Hans Verkuil wrote:
> From: Martin Bugge
>
> When receiving video it is very useful to be able to unpack the InfoFrames.
> Logging is useful as well, both for transmitters and receivers.
>
> Especially when implementing the VIDIOC_LOG_STATUS ioctl (suppo
On Mon, Dec 01, 2014 at 02:48:47PM +0100, Hans Verkuil wrote:
> Hi Thierry,
>
> Thanks for the review, see my comments below.
>
> On 12/01/2014 02:15 PM, Thierry Reding wrote:
> > On Fri, Nov 28, 2014 at 03:50:50PM +0100, Hans Verkuil wrote:
[...]
> >> +{
> &
On Fri, Nov 28, 2014 at 03:50:50PM +0100, Hans Verkuil wrote:
> From: Martin Bugge
>
> When receiving video it is very useful to be able to unpack the InfoFrames.
> Logging is useful as well, both for transmitters and receivers.
>
> Especially when implementing the VIDIOC_LOG_STATUS ioctl (suppo
YPE_EXT_MPEG_HE_AAC_SURROUND,
> + HDMI_AUDIO_CODING_TYPE_EXT_MPEG_AAC_LC_SURROUND = 10,
I think the last two should be MPEG4_{HE_AAC,AAC}_SURROUND, and with
that fixed:
Reviewed-by: Thierry Reding
pgp8Xl95hNsoz.pgp
Description: PGP signature
From: Thierry Reding
If power management is disabled these functions become unused, so there
is no reason to build them. This fixes a couple of build warnings when
PM(_SLEEP,_RUNTIME) is not enabled.
Signed-off-by: Thierry Reding
---
Changes in v2:
- add #endif comment for readability
From: Thierry Reding
If power management is disabled these function become unused, so there
is no reason to build them. This fixes a couple of build warnings when
PM(_SLEEP,_RUNTIME) is not enabled.
Acked-by: Geert Uytterhoeven
Signed-off-by: Thierry Reding
---
Changes in v2:
- add #endif
On Thu, Oct 02, 2014 at 10:43:21AM -0300, Mauro Carvalho Chehab wrote:
> Em Thu, 02 Oct 2014 10:48:11 +0200
> Thierry Reding escreveu:
>
> > From: Thierry Reding
> >
> > If power management is disabled these functions become unused, so there
> > is no reason t
From: Thierry Reding
If power management is disabled these functions become unused, so there
is no reason to build them. This fixes a couple of build warnings when
PM(_SLEEP,_RUNTIME) is not enabled.
Signed-off-by: Thierry Reding
---
drivers/media/platform/exynos4-is/fimc-core.c | 2 ++
1
From: Thierry Reding
If power management is disabled these function become unused, so there
is no reason to build them. This fixes a couple of build warnings when
PM(_SLEEP,_RUNTIME) is not enabled.
Signed-off-by: Thierry Reding
---
drivers/media/platform/s5p-jpeg/jpeg-core.c | 4
1 file
On Tue, Sep 30, 2014 at 09:37:57AM +0200, Boris Brezillon wrote:
> On Mon, 29 Sep 2014 23:41:09 +0300
> Laurent Pinchart wrote:
[...]
> > Incidentally, patch 2/5 in this series is missing a documentation update ;-)
>
> Yep, regarding this patch, I wonder if it's really necessary to add
> new form
On Mon, Sep 29, 2014 at 04:02:39PM +0200, Boris Brezillon wrote:
> Rename mediabus formats and move the enum into a separate header file so
> that it can be used by DRM/KMS subsystem without any reference to the V4L2
> subsystem.
>
> Old V4L2_MBUS_FMT_ definitions are now macros that points to VID
On Tue, Jul 22, 2014 at 02:23:47PM +0200, Boris BREZILLON wrote:
> Foxlink's fl500wvr00-a0t supports RGB888 format.
>
> Signed-off-by: Boris BREZILLON
> ---
> drivers/gpu/drm/panel/panel-simple.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/panel/panel-simple.c
> b/
On Tue, Jul 22, 2014 at 02:23:45PM +0200, Boris BREZILLON wrote:
> Add bus_formats and nbus_formats fields and
> drm_display_info_set_bus_formats helper function to specify the bus
> formats supported by a given display.
>
> This information can be used by display controller drivers to configure
>
From: Thierry Reding
The seqno_fence_init() function's cond argument isn't described in the
kerneldoc comment. Fix that to silence a warning when building DocBook
documentation.
Signed-off-by: Thierry Reding
---
include/linux/seqno-fence.h | 1 +
1 file changed, 1 insertion(+)
di
From: Thierry Reding
kerneldoc doesn't know how to parse variables, so don't let it try.
Signed-off-by: Thierry Reding
---
drivers/dma-buf/fence.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma-buf/fence.c b/drivers/dma-buf/fence.c
index 42
On Tue, Jun 24, 2014 at 03:57:46PM +0100, Russell King - ARM Linux wrote:
> On Mon, Jun 16, 2014 at 12:11:20PM +0200, Denis Carikli wrote:
> > We need a way to pass signal polarity informations
> > between DRM panels, and the display drivers.
> >
> > To do that, a pol_flags field was added to dr
1 - 100 of 206 matches
Mail list logo
