On 12/17/2014 09:54 PM, Andrey Utkin wrote:
> Hans, is this commit anywhere in any git repository at the moment?
>
The pull request will go out to Mauro tomorrow.
Regards,
Hans
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On Thursday 18 December 2014 11:37:13 Chunyan Zhang wrote:
> This patch changes the 32-bit time type (timeval) to the 64-bit one
> (ktime_t), since 32-bit time types will break in the year 2038.
>
> I use ktime_t instead of all uses of timeval in imon.c
>
> This patch also changes do_gettimeofday
This message is generated daily by a cron job that builds media_tree for
the kernels and architectures in the list below.
Results of the daily build of media_tree:
date: Thu Dec 18 04:00:17 CET 2014
git branch: test
git hash: 427ae153c65ad7a08288d86baf99000569627d03
gcc versio
This patch changes the 32-bit time type (timeval) to the 64-bit one
(ktime_t), since 32-bit time types will break in the year 2038.
I use ktime_t instead of all uses of timeval in imon.c
This patch also changes do_gettimeofday() to ktime_get() accordingly,
since ktime_get returns a ktime_t, but d
Hi,
On Thu, Dec 18, 2014 at 1:18 AM, Hans de Goede wrote:
> On sun6i the cir block is attached to the reset controller, add support
> for de-asserting the reset if a reset controller is specified in dt.
>
> Signed-off-by: Hans de Goede
> Acked-by: Mauro Carvalho Chehab
> Acked-by: Maxime Ripard
Add the document for ov2640 dt.
Cc: devicet...@vger.kernel.org
Signed-off-by: Josh Wu
---
v3 -> v4:
1. remove aggsigned-clocks as it's general.
2. refine the explation.
v2 -> v3:
1. fix incorrect description.
2. Add assigned-clocks & assigned-clock-rates.
3. resetb pin should be ACTIVE
The master clock (xvclk) is mandatory. It's a common clock framework clock.
It can make sensor output a pixel clock to the camera interface.
Cc: devicet...@vger.kernel.org
Signed-off-by: Josh Wu
Acked-by: Laurent Pinchart
---
v3 -> v4:
1. Add Laurent's acked by.
v2 -> v3:
1. should return P
Add device tree support for ov2640.
Cc: devicet...@vger.kernel.org
Signed-off-by: Josh Wu
Acked-by: Laurent Pinchart
---
v3 -> v4:
1.modify the code comment.
2. Add Laurent's acked by.
v2 -> v3:
1. fix gpiod usage.
2. refine the ov2640_probe() function.
v1 -> v2:
1. use gpiod APIs.
To support async probe for ov2640, we need remove the code to get 'mclk'
in ov2640_probe() function. oterwise, if soc_camera host is not probed
in the moment, then we will fail to get 'mclk' and quit the ov2640_probe()
function.
So in this patch, we move such 'mclk' getting code to ov2640_s_power(
icd->control is the sub device dev, i.e. i2c device.
icd->pdev is the soc camera device's device.
To be consitent with power() function, we will call reset() with
icd->control as well.
Signed-off-by: Josh Wu
---
v3->v4:
none
v2->v3:
1. check whether icd->control is NULL or not.
drivers/me
This patch series add device tree support for ov2640. And also add
the document for the devicetree properties.
v3->v4:
1. refined the dt document.
2. Add Laurent's acked-by.
v2->v3:
1. fix the gpiod_xxx api usage as we use reset pin as ACTIVE_LOW.
2. update the devicetree binding document
The Prof 7301 still seems to be having issues sometimes. Its not every
time, but it does happen fairly regularly.
Dec 17 18:28:16 DVB kernel: [160369.173179] [ cut here ]
Dec 17 18:28:16 DVB kernel: [160369.173181] Kernel BUG at
a04204fb [verbose debug info unavaila
Em Wed, 17 Dec 2014 19:11:33 +
"Prashant Laddha (prladdha)" escreveu:
> Hi Mauro,
>
> I was able to test your patch with vivid sdr tone generation. It calls
> sin/cos functions with radians as argument. I find that the sine wave
> generated using fixp_sin32_rad() show discontinuities, especi
Hans, is this commit anywhere in any git repository at the moment?
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Building with the attached random configuration file,
drivers/built-in.o: In function `set_type':
tuner-core.c:(.text+0x3718c1): undefined reference to `microtune_attach'
tuner-core.c:(.text+0x3718e3): undefined reference to `tda829x_attach'
tuner-core.c:(.text+0x3719c6): undefined reference to `x
Hello!
After I converted some drivers to RegMap, I ran following lockdep
warning about recursive locking and possible deadlock.
That is because tuner driver access I2C bus through demod driver and
both drivers are using RegMap. It does not happen if tuner driver does
not use RegMap API, but p
Hi Mauro,
I was able to test your patch with vivid sdr tone generation. It calls
sin/cos functions with radians as argument. I find that the sine wave
generated using fixp_sin32_rad() show discontinuities, especially around
90, 180 degrees. After debugging it further, these discontinuities seems
t
Add support for the ir-clk which is part of the sun6i SoC prcm module.
Signed-off-by: Hans de Goede
---
drivers/mfd/sun6i-prcm.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/mfd/sun6i-prcm.c b/drivers/mfd/sun6i-prcm.c
index 2f2e9f0..1911731 100644
--- a/drivers/mfd
Add a dtsi file for A31s based boards.
Since the A31s is the same die as the A31 in a different package, this dtsi
simply includes sun6i-a31.dtsi and then overrides the pinctrl compatible to
reflect the different package, everything else is identical.
Signed-off-by: Hans de Goede
---
Changes in
Add support for the larger fifo found on sun5i and sun6i, having a separate
compatible for the ir found on sun5i & sun6i also is useful if we ever want
to add ir transmit support, because the sun5i & sun6i version do not have
transmit support.
Note this commits also adds checking for the end-of-pa
The A31s is a stripped down version of the A31, as such it is missing some
pins and some functions on some pins.
The new pinctrl-sun6i-a31s.c this commit adds is a copy of pinctrl-sun6i-a31s.c
with the missing pins and functions removed.
Note there is no a31s specific version of pinctrl-sun6i-a31
The CSQ CS908 is an A31s based top-set box, with 1G RAM, 8G NAND,
rtl8188etv usb wifi, 2 USB A receptacles (1 connected through the OTG
controller), ethernet, 3.5 mm jack with a/v out and hdmi out.
Note it has no sdcard slot and therefore can only be fel booted.
Signed-off-by: Hans de Goede
---
On sun6i the cir block is attached to the reset controller, add support
for de-asserting the reset if a reset controller is specified in dt.
Signed-off-by: Hans de Goede
Acked-by: Mauro Carvalho Chehab
Acked-by: Maxime Ripard
---
.../devicetree/bindings/media/sunxi-ir.txt | 2 ++
driv
Add a node for the ir receiver found on the A31.
Signed-off-by: Hans de Goede
---
arch/arm/boot/dts/sun6i-a31.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 1c1d255..85c6365 100644
--- a/arch/arm/boot
Add pinmux settings for the ir receive pin of the A31.
Signed-off-by: Hans de Goede
---
arch/arm/boot/dts/sun6i-a31.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 85c6365..9e9504c 100644
--- a/arch/arm/boo
Add an ir_clk sub-node to the prcm node.
Signed-off-by: Hans de Goede
---
Changes in v2:
-Use allwinner,sun4i-a10-mod0-clk as compatible, rather then a prcm specific
compatible
---
arch/arm/boot/dts/sun6i-a31.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/sun6
The Mele M9 has an ir receiver, enable it.
Signed-off-by: Hans de Goede
---
arch/arm/boot/dts/sun6i-a31-m9.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31-m9.dts
b/arch/arm/boot/dts/sun6i-a31-m9.dts
index 3ab544f..fccf709 100644
--- a/arch/arm/boot/dts/
With the prcm in sun6i (and some later SoCs) some mod0 clocks are instantiated
through the mfd framework, and as such do not work with of_clk_declare, since
they do not have registers assigned to them yet at of_clk_declare init time.
Silence the error on not finding registers in the of_clk_declare
So far the A31s is 100% compatible with the A31, still lets do the same
as what we've done for the A13 / A10s and give it its own compatible string,
in case we need to differentiate later.
Signed-off-by: Hans de Goede
---
Documentation/arm/sunxi/README | 1 -
arch/arm/mach-sunxi/platsmp.c | 3 +
While working on pinctrl for the A31s, I noticed that function 4 of
PA15 - PA18 was missing, add these.
Signed-off-by: Hans de Goede
---
Changes in v2:
-Drop the changes to the muxing of i2c3 this was based on
"A31s Datasheet v1.40.pdf", but all other A31 related info puts them at the
pins wher
Hi All,
Here is v2 of my patch series to add sun6i A31s and ir support.
Changes in v2:
-"pinctrl: sun6i: Add some missing functions, fix i2c3 muxing":
-Drop the changes to the muxing of i2c3 this was based on
"A31s Datasheet v1.40.pdf", but all other A31 related info puts the
Hi Tony,
Thanks for the patches.
Please process them with scripts/checkpatch.pl as you will be submitting
the next version - they contain many coding style related issues.
My remaining comments below.
On 12/17/2014 08:27 AM, Tony K Nadackal wrote:
Fimp_jpeg used in Exynos7 is a revised versio
The cos table used at fixp-arith.h has only 8 bits of precision.
That causes problems if it is reused on other drivers.
As some media drivers require a higher precision sin/cos
implementation, replace the current implementation by one that
will provide 32 bits precision.
The values generated by t
Hi Mats,
Some review comments...
On 12/15/14 19:21, matra...@cisco.com wrote:
> From: Mats Randgaard
>
> The driver is tested on our hardware and all the implemented features
> works as expected.
>
> Missing features:
> - CEC support
> - HDCP repeater support
> - IR support
>
> Signed-off-by:
Hi Mauro,
This pull request contains smiapp driver cleanups and improvements in form
of more generic quirk functionality and corrected error handling. It depends
on my earlier pull request "[GIT PULL FOR v3.20] Smiapp OF support".
Please pull.
The following changes since commit 7f6de94da4bd82c80
Hi Mauro,
Besides a few cleanups, this set adds OF support for the smiapp driver.
Please pull.
The following changes since commit e272d95f8c0544cff55c485a10828b063c8e417c:
[media] rcar_vin: Fix interrupt enable in progressive (2014-12-12 10:29:40
-0200)
are available in the git repository a
Thanks for the patch, Mauro. Just a correction below.
>
>+/* cos(x) = sin(x + pi radians) */
>+
This should pi / 2. Correcting for the same below.
>+#define fixp_cos32_rad(rad, twopi)\
>+ fixp_sin32_rad(rad + twopi/2, twopi)
fixp_sin32_rad(rad + twopi/4, twopi)
>+
I think t
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