Hi,
Shawn Guo wrote:
> On Mon, Apr 07, 2014 at 02:44:45PM +0200, Denis Carikli wrote:
> > The imx-drm driver can't use the de-active and
> > pixelclk-active display-timings properties yet.
> >
> > Instead the data-enable and the pixel data clock
> > polarity are hardcoded in the imx-drm driver.
>
This message is generated daily by a cron job that builds media_tree for
the kernels and architectures in the list below.
Results of the daily build of media_tree:
date: Wed Apr 9 04:01:04 CEST 2014
git branch: test
git hash: a83b93a7480441a47856dc9104bea970e84cda87
gcc versi
Thanks Josh, I think I will take you point and rework my patch again.
But I need Guennadi's review firstly, Guennadi, could you please help
to review it?
-Bryan
On Fri, Mar 14, 2014 at 3:48 AM, Josh Wu wrote:
> Hi, Brayn
>
> Sorry for the format of my email. I subscribe the linux-media maillist
On 04/08/14 12:07, Ryley Angus wrote:
Hi Kyle.
It may be possible that the delay in acceptable grace periods is due to a
difference in our input AV sources more so than the Hauppauge units
themselves. I'm wondering if it would be useful to control the timeout
period via a module parameter that d
Hi,
I took drivers/media/usb/gspca/kinect.c as skeleton to build a depth
driver for the kinect camera.
I needed to implement this feature because libfreenect performs so badly
on the raspberry pi that you can't get a single frame.
The kinecet has two isoc endpoints but gspca only uses the first.
Hi Kyle.
It may be possible that the delay in acceptable grace periods is due to a
difference in our input AV sources more so than the Hauppauge units
themselves. I'm wondering if it would be useful to control the timeout
period via a module parameter that defaults to 3 seconds perhaps?
As far as
Hi Olivier,
On Wednesday 02 April 2014 00:31:59 Olivier Langlois wrote:
> On Tue, 2014-04-01 at 15:49 +0200, Laurent Pinchart wrote:
> > On Sunday 30 March 2014 00:23:01 Olivier Langlois wrote:
> > > > > Yes. ffmpeg uses wall clock time to create timestamps for audio
> > > > > packets from ALSA de
Implement support for the VSP1 DT bindings in the VSP1 driver. The
driver now first retrieves platform data either from the platform data
pointer or by reading the device tree node, and then validates it
regardless of the platform data source.
Signed-off-by: Laurent Pinchart
Acked-by: Sylwester N
All parameters supplied through platform data can now be passed through
the device tree.
Signed-off-by: Laurent Pinchart
Acked-by: Sylwester Nawrocki
---
.../devicetree/bindings/media/renesas,vsp1.txt | 43 ++
1 file changed, 43 insertions(+)
create mode 100644 Document
Hi Laurent,
On 08/04/14 18:16, Laurent Pinchart wrote:
It may be worth to split DT binding documentation and the driver changes
into separate patches, and perhaps add some commit description here.
Either way fell free to stick:
Acked-by: Sylwester Nawrocki
> Signed-off-by: Laurent Pinchart
>
tree: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: a7963eb7f4c4b5df84d5dd5083734278ad75bafb
commit: 25cf4d462abd6d78d224b564de82dcdab7973673 [media] r820t: add IMR
calibrate code
date: 12 months ago
coccinelle warnings: (new ones prefixed by >>)
>> drivers
Signed-off-by: Laurent Pinchart
---
.../devicetree/bindings/media/renesas,vsp1.txt | 43 ++
drivers/media/platform/vsp1/vsp1_drv.c | 52 ++
2 files changed, 87 insertions(+), 8 deletions(-)
create mode 100644 Documentation/devicetree/bindings/m
Hello everyone,
The Samsung SoCs from Exynos family are enhanced with a bunch of devices that
provide functionality of a physical layer for interfaces like USB, HDMI, SATA,
etc. They are controlled by a simple interface, often a single bit that enables
and/or resets the physical layer.
An IP driv
Add exynos-simple-phy driver to support a single register
PHY interfaces present on Exynos4 SoC.
Signed-off-by: Tomasz Stanislawski
---
.../devicetree/bindings/phy/samsung-phy.txt| 24 +++
drivers/phy/Kconfig|5 +
drivers/phy/Makefile
The HDMIPHY (physical interface) is controlled by a single
bit in a power controller's regiter. It was implemented
as clock. It was a simple but effective hack.
This patch makes HDMI driver to control HDMIPHY via PHY interface.
Signed-off-by: Tomasz Stanislawski
---
drivers/gpu/drm/exynos/exyno
The HDMIPHY (physical interface) is controlled by a single
bit in a power controller's regiter. It was implemented
as clock. It was a simple but effective hack.
This patch makes S5P-HDMI driver to control HDMIPHY via PHY interface.
Signed-off-by: Tomasz Stanislawski
---
drivers/media/platform/s
On 04/07/14 22:32, Ryley Angus wrote:
Thanks Hans for getting back to me.
I've been trying out your patch and I found the device wasn't actually
restarting the streaming/recording properly after a channel
change. I changed "msecs_to_jiffies(500))" to "msecs_to_jiffies(1000))" and
had the same is
I'd like to give a small (20 min?) presentation about AVB (Audio Video Bridging,
http://en.wikipedia.org/wiki/Audio_Video_Bridging) and possibilities to
implement
audio/video streaming and parts of AVDECC in ALSA/V4L2 (AVDECC = AVB Discovery,
Enumeration, Connection management and Control).
It's
On 25/03/14 23:03, Laurent Pinchart wrote:
> Hi William,
>
> On Tuesday 25 March 2014 22:56:33 William Manley wrote:
>> On 13/03/14 12:38, William Manley wrote:
>>> The uvcvideo webcam driver exposes the v4l2 control "Exposure (Absolute)"
>>> which allows the user to control the exposure time of t
This fixes following build error:
CC drivers/media/i2c/s5c73m3/s5c73m3-core.o
CC drivers/md/dm-ioctl.o
CC net/ipv4/inet_lro.o
drivers/media/i2c/s5c73m3/s5c73m3-core.c: In function
‘s5c73m3_get_platform_data’:
drivers/media/i2c/s5c73m3/s5c73m3-core.c:1619:2: error: implicit de
On Mon, Apr 07, 2014 at 02:44:42PM +0200, Denis Carikli wrote:
> arch/arm/boot/dts/imx51-apf51dev.dts|2 +-
> arch/arm/boot/dts/imx53-m53evk.dts |2 +-
> drivers/staging/imx-drm/imx-ldb.c |4 ++--
> drivers/staging/imx-drm/ipu-v3/ipu-dc.c |4 ++--
> 4 files changed,
On Mon, Apr 07, 2014 at 02:44:51PM +0200, Denis Carikli wrote:
> The DRM_PANEL_SIMPLE is needed by the eukrea
> mbimxsd51's displays.
>
> Signed-off-by: Denis Carikli
Applied, thanks.
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On Mon, Apr 07, 2014 at 02:44:45PM +0200, Denis Carikli wrote:
> The imx-drm driver can't use the de-active and
> pixelclk-active display-timings properties yet.
>
> Instead the data-enable and the pixel data clock
> polarity are hardcoded in the imx-drm driver.
>
> So theses properties are now s
Hello,
On 2014-04-07 16:41, Kamil Debski wrote:
Pawel, Marek,
Before taking this to my tree I wanted to get an ACK from one of the
videobuf2 maintainers. Could you spare a moment to look through this
patch?
It's not a bug, it is a feature. This was one of the fundamental design
requirements
On 04/08/2014 10:08 AM, Denis Carikli wrote:
> On 04/08/2014 08:36 AM, Andrzej Hajda wrote:
>>
>> Hi Denis,
> Hi,
>
>>> +#define DRM_MODE_FLAG_POL_PIXDATA_NEGEDGE BIT(1)
>>> +#define DRM_MODE_FLAG_POL_PIXDATA_POSEDGE BIT(2)
>>> +#define DRM_MODE_FLAG_POL_PIXDATA_PRESERVE BIT(3)
>>
>> What is the
Hi Hans,
> That should be new enough, I see no important differences between 3.4
> and 3.14 in this respect. But really, 3.4?
We are moving to 3.10 shortly.
> Question: if you use MEMORY_MMAP instead of USERPTR, does that work?
Unfortunately, this activity is pending (need to get it pushed in pla
From: Hans Verkuil
Add the new CEA-861-F and DMT 4K timings to the list of predefined
timings.
Signed-off-by: Hans Verkuil
---
drivers/media/v4l2-core/v4l2-dv-timings.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/media/v4l2-core/v4l2-dv-timings.c
b/drivers/media/v
From: Hans Verkuil
Add the CEA-861-F timings for 3840x2160p24/25/30/50/60 and
4096x2160p24/25/30/50/60.
Signed-off-by: Hans Verkuil
---
include/uapi/linux/v4l2-dv-timings.h | 70
1 file changed, 70 insertions(+)
diff --git a/include/uapi/linux/v4l2-dv-timi
On 04/08/2014 08:36 AM, Andrzej Hajda wrote:
Hi Denis,
Hi,
+#define DRM_MODE_FLAG_POL_PIXDATA_NEGEDGE BIT(1)
+#define DRM_MODE_FLAG_POL_PIXDATA_POSEDGE BIT(2)
+#define DRM_MODE_FLAG_POL_PIXDATA_PRESERVE BIT(3)
What is the purpose of DRM_MODE_FLAG_POL_PIXDATA_PRESERVE?
If 'pres
Add the new CEA-861-F 4K timings to the list of predefined timings.
This prepares V4L2 for use with HDMI 2.0.
Regards,
Hans
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Hi Jacek,
On 7 April 2014 18:46, Jacek Anaszewski wrote:
> Prevent decompression of a JPEG 4:2:0 with odd width to
> the YUV 4:2:0 compliant formats for Exynos4x12 SoCs and
> adjust capture format to RGB565 in such a case. This is
> required because the configuration would produce a raw
> image w
Hi Jacek,
On 7 April 2014 18:46, Jacek Anaszewski wrote:
> This patch fixes build break occurring when
> there is no support for Device Tree turned on
> in the kernel configuration. In such a case only
> the driver variant for S5PC210 SoC will be available.
>
> Signed-off-by: Jacek Anaszewski
>
On Tue, Apr 8, 2014 at 12:26 PM, Shaik Ameer Basha
wrote:
> Hi John Sheu,
>
> Thanks for the patch.
> Please find the review comments inline.
>
> On Wed, Mar 12, 2014 at 4:22 AM, John Sheu wrote:
>> Explicitly specify sampling period for subsampled chroma formats, so
>> stride and image size are
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