[PATCH 0/5] tools: selftests: riscv: Fix compiler warnings

From: Christoph Müllner When building the RISC-V selftests with a riscv32 compiler I ran into a couple of compiler warnings. While riscv32 support for these tests is questionable, the fixes are so trivial that it is probably best to simply apply them. Note that the missing-include patch and some

[PATCH 3/5] tools: selftests: riscv: Add missing include for vector test

From: Christoph Müllner GCC raises the following warning: warning: 'status' may be used uninitialized The warning comes from the fact, that the signature of waitpid() is unknown and therefore the initialization of GCC cannot be guessed. Let's add the relevant header to address this warning. Si

[PATCH 1/5] tools: selftests: riscv: Fix compile warnings in hwprobe

From: Christoph Müllner GCC prints a couple of format string warnings when compiling the hwprobe test. Let's follow the recommendation in Documentation/printk-formats.txt to fix these warnings. Signed-off-by: Christoph Müllner --- tools/testing/selftests/riscv/hwprobe/hwprobe.c | 4 ++-- 1 fil

[PATCH 4/5] tools: selftests: riscv: Fix compile warnings in vector tests

From: Christoph Müllner GCC prints a couple of format string warnings when compiling the vector tests. Let's follow the recommendation in Documentation/printk-formats.txt to fix these warnings. Signed-off-by: Christoph Müllner --- tools/testing/selftests/riscv/vector/v_initval_nolibc.c | 2 +-

[PATCH 5/5] tools: selftests: riscv: Fix compile warnings in mm tests

From: Christoph Müllner When building the mm tests with a riscv32 compiler, we see a range of shift-count-overflow errors from shifting 1UL by more than 32 bits in do_mmaps(). Since, the relevant code is only called from code that is gated by `__riscv_xlen == 64`, we can just apply the same gatin

[PATCH 2/5] tools: selftests: riscv: Fix compile warnings in cbo

From: Christoph Müllner GCC prints a couple of format string warnings when compiling the cbo test. Let's follow the recommendation in Documentation/printk-formats.txt to fix these warnings. Signed-off-by: Christoph Müllner --- tools/testing/selftests/riscv/hwprobe/cbo.c | 6 +++--- 1 file chan

[RFC PATCH 3/5] uapi: prctl: Add new prctl call to set/get the memory consistency model

From: Christoph Müllner Some ISAs have a weak default memory consistency model and allow to switch to a more strict model at runtime. This patch adds calls to the prctl interface which allow to get and set the current memory consistency model. The implementation follows the way other prctl calls

[RFC PATCH 2/5] RISC-V: Expose Ssdtso via hwprobe API

From: Christoph Müllner This patch adds Ssdtso to the list of extensions which are announced to user-space using te hwprobe API. Signed-off-by: Christoph Müllner --- Documentation/arch/riscv/hwprobe.rst | 3 +++ arch/riscv/include/uapi/asm/hwprobe.h | 1 + arch/riscv/kernel/sys_riscv.c

[RFC PATCH 1/5] RISC-V: Add basic Ssdtso support

<< 6) #define ENVCFG_CBIE_SHIFT 4 diff --git a/arch/riscv/include/asm/dtso.h b/arch/riscv/include/asm/dtso.h new file mode 100644 index ..f8a758c45e05 --- /dev/null +++ b/arch/riscv/include/asm/dtso.h @@ -0,0 +1,74 @@ +/* SPDX-License-Identifier: GPL-

[RFC PATCH 4/5] RISC-V: Implement prctl call to set/get the memory consistency model

Christoph Muellner + */ + +#include +#include +#include + +int riscv_set_memory_consistency_model(unsigned long arg) +{ + switch (arg) { + case PR_MEMORY_CONSISTENCY_MODEL_RISCV_WMO: + dtso_disable(); + break; + case

[RFC PATCH 0/5] RISC-V: Add dynamic TSO support

From: Christoph Müllner The upcoming RISC-V Ssdtso specification introduces a bit in the senvcfg CSR to switch the memory consistency model at run-time from RVWMO to TSO (and back). The active consistency model can therefore be switched on a per-hart base and managed by the kernel on a per-proces

[RFC PATCH 5/5] RISC-V: selftests: Add DTSO tests

000..b9ca33ca6551 --- /dev/null +++ b/tools/testing/selftests/riscv/dtso/dtso.c @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* dtso - used for functional tests of memory consistency model switching + * at run-time. + * + * Copyright (c) 2023 Christoph Muellner + */ + +#include +#incl