Hi All,
This series adds uffd write-protect and soft-dirty tracking support for arm64. I
consider the soft-dirty support (patches 3 and 4) as RFC - see rationale below.
Previous attempts to add these features have failed because of a perceived lack
of available PTE SW bits. However it actually tu
Previously PTE_PROT_NONE was occupying bit 58, one of the bits reserved
for SW use when the PTE is valid. This is a waste of those precious SW
bits since PTE_PROT_NONE can only ever be set when valid is clear.
Instead let's overlay it on what would be a HW bit if valid was set.
We need to be caref
Use the final remaining PTE SW bit (63) for soft-dirty tracking. The
standard handlers are implemented for set/test/clear for both pte and
pmd. Additionally we must also track the soft-dirty state as a pte swp
bit, so use a free swap entry pte bit (61).
There are a few complexities worth calling o
Now that arm64 supports soft-dirty tracking lets enable the tests, which
were previously disabled for arm64 to reduce noise.
This reverts commit f6dd4e223d87 ("selftests/mm: skip soft-dirty tests
on arm64").
Signed-off-by: Ryan Roberts
---
tools/testing/selftests/mm/Makefile| 5 +
Let's use the newly-free PTE SW bit (58) to add support for uffd-wp.
The standard handlers are implemented for set/test/clear for both pte
and pmd. Additionally we must also track the uffd-wp state as a pte swp
bit, so use a free swap entry pte bit (3).
Signed-off-by: Ryan Roberts
---
arch/arm6
Previously soft-dirty was unconditionally exiting with success, even if
one of it's testcases failed. Let's fix that so that failure can be
reported to automated systems properly.
Signed-off-by: Ryan Roberts
---
tools/testing/selftests/mm/soft-dirty.c | 2 +-
1 file changed, 1 insertion(+), 1 de
On 19/04/2024 08:43, Ryan Roberts wrote:
> Hi All,
>
> This series adds uffd write-protect and soft-dirty tracking support for
> arm64. I
> consider the soft-dirty support (patches 3 and 4) as RFC - see rationale
> below.
>
> Previous attempts to add these features have failed because of a perc
(Sorry about the previous HTML email, accidentally used the wrong email client)
Hey All,
>On 19/04/2024 08:43, Ryan Roberts wrote:
>> Hi All,
>>
>> This series adds uffd write-protect and soft-dirty tracking support for
>> arm64. I
>> consider the soft-dirty support (patches 3 and 4) as RFC - s
On 19.04.24 10:33, Shivansh Vij wrote:
(Sorry about the previous HTML email, accidentally used the wrong email client)
Hey All,
On 19/04/2024 08:43, Ryan Roberts wrote:
Hi All,
This series adds uffd write-protect and soft-dirty tracking support for arm64. I
consider the soft-dirty support (p
On Wed, Feb 07, 2024 at 09:26:23AM -0800, Xin Li wrote:
>Enable the secondary VM exit controls to prepare for FRED enabling.
>
>The activation of the secondary VM exit controls is off now, and it
>will be switched on when a VMX feature needing it is enabled.
>
>Signed-off-by: Xin Li
>Tested-by: Sh
On Wed, Feb 07, 2024 at 09:26:24AM -0800, Xin Li wrote:
>The CR4.FRED bit, i.e., CR4[32], is no longer a reserved bit when a guest
>enumerates FRED, otherwise it is still a reserved bit.
>
>Signed-off-by: Xin Li
>Tested-by: Shan Kang
Reviewed-by: Chao Gao
On Wed, Feb 07, 2024 at 09:26:25AM -0800, Xin Li wrote:
>Setup the global vmcs_config for FRED:
>1) Add VM_ENTRY_LOAD_IA32_FRED to KVM_OPTIONAL_VMX_VM_ENTRY_CONTROLS to
> have a FRED CPU load guest FRED MSRs from VMCS upon VM entry.
>2) Add SECONDARY_VM_EXIT_SAVE_IA32_FRED to
> KVM_OPTIONAL_VMX
On Wed, Feb 07, 2024 at 09:26:26AM -0800, Xin Li wrote:
>Clear FRED VM entry/exit controls when initializing a vCPU, and set
>these controls only if FRED is enumerated after set CPUID.
>
>FRED VM entry/exit controls need to be set to establish context
>sufficient to support FRED event delivery imme
On 4/18/24 02:02, Roberto Sassu wrote:
>
> 72374d71c315
>
> Roberto
>
Still FTA (fail to apply), unfortunately.
--
An old man doll... just what I always wanted! - Clara
The save/restore of nr_hugepages was added to the test itself by using
the atexit() functionality. But it is broken as parent exits after
creating child. Hence calling the atexit() function early. That's not
it. The child exits after creating its child and so on.
The parent cannot wait to get the
On Fri, Apr 19, 2024 at 1:59 AM David Gow wrote:
>
> On Fri, 19 Apr 2024 at 05:02, Wander Lairson Costa wrote:
> >
> > If the device register fails, free the allocated memory before
> > returning.
> >
> > Signed-off-by: Wander Lairson Costa
> > Fixes: d03c720e03bd ("kunit: Add APIs for managing
From: David Woodhouse
There was some confusion in kvm_update_guest_time() when software needs
to advance the guest TSC.
In master clock mode, there are two points of time which need to be taken
into account. First there is the master clock reference point, stored in
kvm->arch.master_kernel_ns (a
On Thu, 2024-04-18 at 20:34 +0100, David Woodhouse wrote:
>
> KVM: x86: Remove periodic global clock updates
> KVM: x86: Kill KVM_REQ_GLOBAL_CLOCK_UPDATE
Meh, I might have to put those back. They were originally introduced to
cope with NTP frequency skew which is no longer a problem,
Jakub Kicinski wrote:
> More complex tests often have to spawn a background process,
> like a server which will respond to requests or tcpdump.
>
> Add support for creating such processes using the with keyword:
>
> with bkg("my-daemon", ..):
> # my-daemon is alive in this block
>
> My in
Hi,
These two patches fix some minor error path mistakes in the device
module.
Changes
---
v1->v2
* Add fixes tag
* Add imperative statement in the commit description
v2->v3
* Add a goto exit label kunit_device_register_internal
v3->v4
* Remove some changes requested by Marcus Elfring, as I
If the device register fails, free the allocated memory before
returning.
Signed-off-by: Wander Lairson Costa
Fixes: d03c720e03bd ("kunit: Add APIs for managing devices")
---
lib/kunit/device.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/lib/kunit/device.c b/lib/kunit/device.c
index 25c8
kunit_init_device() should unregister the device on bus register error,
but mistakenly it tries to unregister the bus.
Unregister the device instead of the bus.
Signed-off-by: Wander Lairson Costa
Fixes: d03c720e03bd ("kunit: Add APIs for managing devices")
---
lib/kunit/device.c | 2 +-
1 file
On Wed, Feb 07, 2024 at 09:26:27AM -0800, Xin Li wrote:
>Add FRED MSRs to the valid passthrough MSR list and set FRED MSRs intercept
>based on FRED enumeration.
>
>Signed-off-by: Xin Li
>Tested-by: Shan Kang
Reviewed-by: Chao Gao
two nits below.
>---
>
>Change since v1:
>* Enable FRED MSRs in
On Fri, Apr 19, 2024 at 09:30:06AM -0300, Wander Lairson Costa wrote:
> As a side note, the behavior of device_register() seems
> counterintuitive and error-prone, IMO. If the function returns an
> error, it should ensure it leaks no resource and shouldn't require the
> caller to do any cleanup.
I
On Wed, Feb 07, 2024 at 09:26:28AM -0800, Xin Li wrote:
>Initialize host VMCS FRED fields with host FRED MSRs' value and
>guest VMCS FRED fields to 0.
>
>FRED CPU states are managed in 9 new FRED MSRs, as well as a few
>existing CPU registers and MSRs, e.g., CR4.FRED. To support FRED
>context mana
On Fri, Apr 19, 2024 at 10:25:02AM -0300, Wander Lairson Costa wrote:
> If the device register fails, free the allocated memory before
> returning.
>
> Signed-off-by: Wander Lairson Costa
> Fixes: d03c720e03bd ("kunit: Add APIs for managing devices")
> ---
> lib/kunit/device.c | 1 +
> 1 file ch
On Fri, Apr 19, 2024 at 10:25:01AM -0300, Wander Lairson Costa wrote:
> kunit_init_device() should unregister the device on bus register error,
> but mistakenly it tries to unregister the bus.
>
> Unregister the device instead of the bus.
>
> Signed-off-by: Wander Lairson Costa
> Fixes: d03c720e
On Fri, Apr 19, 2024 at 11:03 AM Greg Kroah-Hartman
wrote:
>
> On Fri, Apr 19, 2024 at 10:25:02AM -0300, Wander Lairson Costa wrote:
> > If the device register fails, free the allocated memory before
> > returning.
> >
> > Signed-off-by: Wander Lairson Costa
> > Fixes: d03c720e03bd ("kunit: Add A
On Wed, Feb 07, 2024 at 09:26:29AM -0800, Xin Li wrote:
>Switch MSR_IA32_FRED_RSP0 between host and guest in
>vmx_prepare_switch_to_{host,guest}().
>
>MSR_IA32_FRED_RSP0 is used during ring 3 event delivery only, thus
>KVM, running on ring 0, can run safely with guest FRED RSP0, i.e.,
>no need to s
On Thu, Apr 18, 2024 at 6:22 PM Jeff Xu wrote:
>
> On Thu, Apr 18, 2024 at 1:19 PM Suren Baghdasaryan wrote:
> >
> > On Tue, Apr 16, 2024 at 12:40 PM Jeff Xu wrote:
> > >
> > > On Tue, Apr 16, 2024 at 8:13 AM Liam R. Howlett
> > > wrote:
> > > >
> > > > * jef...@chromium.org [240415 12:35]:
>
On Apr 18 2024, Alexei Starovoitov wrote:
> On Tue, Apr 16, 2024 at 04:08:24PM +0200, Benjamin Tissoires wrote:
> > We need to teach the verifier about the second argument which is declared
> > as void * but which is of type KF_ARG_PTR_TO_MAP. We could have dropped
> > this extra case if we declare
On Apr 18 2024, Alexei Starovoitov wrote:
> On Tue, Apr 16, 2024 at 04:08:30PM +0200, Benjamin Tissoires wrote:
> > again, copy/paste from bpf_timer_start().
> >
> > Signed-off-by: Benjamin Tissoires
> > ---
> > kernel/bpf/helpers.c | 24
> > 1 file changed, 24 insertion
On Fri, Apr 19, 2024 at 7:57 AM Suren Baghdasaryan wrote:
>
> On Thu, Apr 18, 2024 at 6:22 PM Jeff Xu wrote:
> >
> > On Thu, Apr 18, 2024 at 1:19 PM Suren Baghdasaryan
> > wrote:
> > >
> > > On Tue, Apr 16, 2024 at 12:40 PM Jeff Xu wrote:
> > > >
> > > > On Tue, Apr 16, 2024 at 8:13 AM Liam R.
On Thu, Apr 18, 2024 at 02:42:24PM +0200, Clément Léger wrote:
> Add description for Zca, Zcf, Zcd and Zcb extensions which are part the
> Zc* standard extensions for code size reduction. Additional validation
> rules are added since Zcb depends on Zca, Zcf, depends on Zca and F, Zcd
> depends on Z
On 18/04/2024 20:34, David Woodhouse wrote:
From: David Woodhouse
The kvm_guest_time_update() function scales the host TSC frequency to
the guest's using kvm_scale_tsc() and the v->arch.l1_tsc_scaling_ratio
scaling ratio previously calculated for that vCPU. Then calcuates the
scaling factors fo
On Fri, Apr 19, 2024 at 8:12 AM Benjamin Tissoires wrote:
>
>
> It's something I added while adding the tests. And some tests were passing
> in case I was having a non sleepable callback. But if we have
> bpf_rcu_read_lock(), we are all fine and can reduce the complexity.
Not quite following what
On 18/04/2024 20:34, David Woodhouse wrote:
From: Jack Allister
In the common case (where kvm->arch.use_master_clock is true), the KVM
clock is defined as a simple arithmetic function of the guest TSC, based on
a reference point stored in kvm->arch.master_kernel_ns and
kvm->arch.master_cycle_no
On 18/04/2024 20:34, David Woodhouse wrote:
From: Jack Allister
A VM's KVM/PV clock has an inherent relationship to its TSC (guest). When
either the host system live-updates or the VM is live-migrated this pairing
of the two clock sources should stay the same.
In reality this is not the case w
On 18/04/2024 20:34, David Woodhouse wrote:
From: David Woodhouse
KVM does make an attempt to cope with non-constant TSC, and has notifiers
to handle host TSC frequency changes. However, it *only* adjusts the KVM
clock, and doesn't adjust TSC frequency scaling when the host changes.
This is pr
On Fri, 2024-04-19 at 16:40 +0100, Paul Durrant wrote:
>
> > + * If KVM_REQ_CLOCK_UPDATE is already pending, or if the
> > hv_clock has
> > + * never been generated at all, call
> > kvm_guest_time_update() to do so.
> > + * Might as well use the PVCLOCK_TSC_STABLE_BIT as the
>
On Thu, Apr 18, 2024 at 02:42:26PM +0200, Clément Léger wrote:
> As stated by Zc* spec:
>
> "As C defines the same instructions as Zca, Zcf and Zcd, the rule is that:
> - C always implies Zca
> - C+F implies Zcf (RV32 only)
> - C+D implies Zcd"
>
> Add additionnal validation rules to enforce t
On Fri, Apr 19, 2024 at 8:14 AM Benjamin Tissoires wrote:
>
>
> Honestly I just felt the patch series was big enough for a PoC and
> comparison with sleepable bpf_timer. But if we think this needs not to
> be added, I guess that works too :)
It certainly did its job to compare the two and imo bpf
On 18/04/2024 20:34, David Woodhouse wrote:
From: David Woodhouse
The documentation on TSC migration using KVM_VCPU_TSC_OFFSET is woefully
inadequate. It ignores TSC scaling, and ignores the fact that the host
TSC may differ from one host to the next (and in fact because of the way
the kernel c
On Thu, Apr 18, 2024 at 02:42:31PM +0200, Clément Léger wrote:
> Add description for the Zcmop (Compressed May-Be-Operations) ISA
> extension which was ratified in commit c732a4f39a4 ("Zcmop is
> ratified/1.0") of the riscv-isa-manual.
Acked-by: Conor Dooley
signature.asc
Description: PGP signa
On Thu, Apr 18, 2024 at 02:42:27PM +0200, Clément Léger wrote:
> The Zc* standard extension for code reduction introduces new extensions.
> This patch adds support for Zca, Zcf, Zcd and Zcb. Zce, Zcmt and Zcmp
> are left out of this patch since they are targeting microcontrollers/
> embedded CPUs i
On Fri, 2024-04-19 at 16:49 +0100, Paul Durrant wrote:
> On 18/04/2024 20:34, David Woodhouse wrote:
> > From: David Woodhouse
> >
> > The documentation on TSC migration using KVM_VCPU_TSC_OFFSET is woefully
> > inadequate. It ignores TSC scaling, and ignores the fact that the host
> > TSC may di
On 18/04/2024 20:34, David Woodhouse wrote:
From: David Woodhouse
Commit 53fafdbb8b21 ("KVM: x86: switch KVMCLOCK base to monotonic raw
clock") did so only for 64-bit hosts, by capturing the boot offset from
within the existing clocksource notifier update_pvclock_gtod().
That notifier was adde
On Apr 19 2024, Alexei Starovoitov wrote:
> On Fri, Apr 19, 2024 at 8:12 AM Benjamin Tissoires wrote:
> >
> >
> > It's something I added while adding the tests. And some tests were passing
> > in case I was having a non sleepable callback. But if we have
> > bpf_rcu_read_lock(), we are all fine an
On Thu, Apr 18, 2024 at 02:42:25PM +0200, Clément Léger wrote:
> The Zc* spec states that:
>
> "The C extension is the superset of the following extensions:
> - Zca
> - Zcf if F is specified (RV32 only)
> - Zcd if D is specified
> As C defines the same instructions as Zca, Zcf and Zcd, the rul
On 18/04/2024 20:34, David Woodhouse wrote:
From: David Woodhouse
This effectively reverts commit 332967a3eac0 ("x86: kvm: introduce
periodic global clock updates"). The periodic update was introduced to
propagate NTP corrections to the guest KVM clock, when the KVM clock was
based on CLOCK_MON
On 18/04/2024 20:34, David Woodhouse wrote:
From: David Woodhouse
This was introduced in commit 0061d53daf26 ("KVM: x86: limit difference
between kvmclock updates") to reduce cross-vCPU differences which arose
because the KVM clock was based on CLOCK_MONOTONIC and thus subject to
NTP frequency
On Apr 19 2024, Alexei Starovoitov wrote:
> On Fri, Apr 19, 2024 at 8:14 AM Benjamin Tissoires wrote:
> >
> >
> > Honestly I just felt the patch series was big enough for a PoC and
> > comparison with sleepable bpf_timer. But if we think this needs not to
> > be added, I guess that works too :)
>
On 18/04/2024 20:34, David Woodhouse wrote:
From: David Woodhouse
When in 'master clock mode' (i.e. when host and guest TSCs are behaving
sanely and in sync), the KVM clock is defined in terms of the guest TSC.
When TSC scaling is used, calculating the KVM clock directly from *host*
TSC cycles
On Tue, Apr 16, 2024 at 05:18:56PM -0500, Elizabeth Figura wrote:
> On Tuesday, 16 April 2024 16:18:24 CDT Elizabeth Figura wrote:
> > On Tuesday, 16 April 2024 03:14:21 CDT Peter Zijlstra wrote:
> > > I don't support GE has it in his builds? Last time I tried, building
> > > Wine was a bit of a pa
…
> * Remove some changes requested by Marcus Elfring,
I became curious how affected software components can evolve further.
> as I was alerted he is a known troll.
I would appreciate if this interpretation will be reconsidered somehow.
Regards,
Markus
On 4/19/24 8:43 AM, jef...@chromium.org wrote:
> From: Jeff Xu
>
> fix compile warning reported by test robot
>
> Signed-off-by: Jeff Xu
> Reported-by: kernel test robot
> Closes: https://lore.kernel.org/r/202404190226.ofjoewv8-...@intel.com/
Reviewed-by: Muhammad Usama Anjum
> ---
> tools/
On Thu, Apr 18, 2024 at 11:35:11AM +0200, Peter Zijlstra wrote:
> On Wed, Apr 17, 2024 at 03:03:05PM -0500, Elizabeth Figura wrote:
>
> > Ach. I wrote this with the idea that the race isn't meaningful, but
> > looking at it again you're right—there is a harmful race here.
> >
> > I think it shoul
On Fri, Apr 19, 2024 at 11:45:14AM +0200, David Hildenbrand wrote:
> On 19.04.24 10:33, Shivansh Vij wrote:
> > > On 19/04/2024 08:43, Ryan Roberts wrote:
> > > > Hi All,
> > > >
> > > > This series adds uffd write-protect and soft-dirty tracking support for
> > > > arm64. I
> > > > consider the
> > kunit_init_device() should unregister the device on bus register error,
> > but mistakenly it tries to unregister the bus.
> >
> > Unregister the device instead of the bus.
…
> Reviewed-by: Greg Kroah-Hartman
Would you ever like to distinguish hardware register errors from
item registration f
> >+if (unlikely(vmx->msr_host_fred_rsp0 == 0))
> >+vmx->msr_host_fred_rsp0 =
> read_msr(MSR_IA32_FRED_RSP0);
>
> can we just drop this and use "(unsigned long)task_stack_page(current) +
> THREAD_SIZE"
> as host fred rsp0?
I thought about it, however, don't see a s
On 4/17/24 11:49 PM, Amer Al Shanawany wrote:
> Fix the following warnings by adding return check and error messages.
>
> statmount_test.c: In function ‘cleanup_namespace’:
> statmount_test.c:128:9: warning: ignoring return value of ‘fchdir’
> declared with attribute ‘warn_unused_result’ [-Wunused
On Fri, Apr 19, 2024 at 4:44 AM wrote:
>
> From: Jeff Xu
>
> fix compile warning reported by test robot
>
> Signed-off-by: Jeff Xu
> Reported-by: kernel test robot
> Closes: https://lore.kernel.org/r/202404190226.ofjoewv8-...@intel.com/
> ---
> tools/testing/selftests/mm/mseal_test.c | 3 +--
>
On 4/17/24 9:16 PM, Amer Al Shanawany wrote:
> fix compiler warning and errors when compiling statmount test.
The error description or the compiler with version is required to reproduce
the error easily. I'm unable to reproduce the error by gcc 12 and clang 17.
>
> Signed-off-by: Amer Al Shanawan
Thanks for the fix.
On 4/17/24 9:07 PM, Ryan Roberts wrote:
> Both fchmodat2 and openat2 statically link against libasan (for
> explanation of why, look at the fixes commit). This is done using
> `-static-libasan`. However, it turns out that clang uses a different
> option, `-static-libsan`. This
On 4/17/24 8:37 PM, Nathan Chancellor wrote:
> Commit f7d5bcd35d42 ("selftests: kselftest: Mark functions that
> unconditionally call exit() as __noreturn") marked functions that call
> exit() as __noreturn but it did not change the return type of these
> functions from 'void' to 'int' like it shou
On Fri, Apr 19, 2024 at 3:15 PM Jeff Xu wrote:
>
> On Fri, Apr 19, 2024 at 7:57 AM Suren Baghdasaryan wrote:
> >
> > On Thu, Apr 18, 2024 at 6:22 PM Jeff Xu wrote:
> > >
> > > On Thu, Apr 18, 2024 at 1:19 PM Suren Baghdasaryan
> > > wrote:
> > > >
> > > > On Tue, Apr 16, 2024 at 12:40 PM Jeff
> >+#ifdef CONFIG_X86_64
>
> is this #ifdeffery neccesary?
Yes, otherwise build fails on 32 bit.
>
> I assume kvm_cpu_cap_has(X86_FEATURE_FRED) is always false
> for !CONFIG_X86_64.
> Looks most of FRED changes in core kernel don't have such #ifdeffery.
Because it's not a compile time false, i
> >+case MSR_IA32_FRED_RSP0 ... MSR_IA32_FRED_CONFIG:
> >+/* FRED MSRs should be passthrough to FRED guests only */
>
> This comment sounds weird. It sounds like the code will be something like:
> if guest supports FRED
> return true
>
On 19.04.24 18:30, Mike Rapoport wrote:
On Fri, Apr 19, 2024 at 11:45:14AM +0200, David Hildenbrand wrote:
On 19.04.24 10:33, Shivansh Vij wrote:
On 19/04/2024 08:43, Ryan Roberts wrote:
Hi All,
This series adds uffd write-protect and soft-dirty tracking support for arm64. I
consider the soft
On 4/8/2024 3:07 PM, Jack Allister wrote:
> This test proves that there is an inherent KVM/PV clock drift away from the
> guest TSC when KVM decides to update the PV time information structure due
> to a KVM_REQ_MASTERCLOCK_UPDATE. This drift is exascerbated when a guest is
> using TSC scaling a
On Fri, Apr 19, 2024 at 2:22 AM Jeff Xu wrote:
> The overhead is likely to grow linearly with the number of VMA, since
> it takes time to retrieve VMA's metadata.
>
> Let's use one data sample to look at impact:
>
> Test: munmap 1000 memory range, each memory range has 1 VMA
>
> syscall__ vm
On 19 April 2024 19:40:06 BST, David Woodhouse wrote:
>On 19 April 2024 18:13:16 BST, "Chen, Zide" wrote:
>>I'm wondering what's the underling theory that we definitely can achieve
>>±1ns accuracy? I tested it on a Sapphire Rapids @2100MHz TSC frequency,
>>and I can see delta_corrected=2 in ~2% c
On 19 April 2024 18:13:16 BST, "Chen, Zide" wrote:
>I'm wondering what's the underling theory that we definitely can achieve
>±1ns accuracy? I tested it on a Sapphire Rapids @2100MHz TSC frequency,
>and I can see delta_corrected=2 in ~2% cases.
Hm. Thanks for testing!
So the KVM clock is based o
On Fri Apr 19, 2024 at 2:18 PM EEST, Bagas Sanjaya wrote:
> On 4/18/24 02:02, Roberto Sassu wrote:
> >
> > 72374d71c315
> >
> > Roberto
> >
>
> Still FTA (fail to apply), unfortunately.
Robert, quick suggestion.
Maybe pick recent rc for the patch set, rebase on top of that and
document that to
On Friday, 19 April 2024 11:16:11 CDT Peter Zijlstra wrote:
> On Tue, Apr 16, 2024 at 05:18:56PM -0500, Elizabeth Figura wrote:
> > On Tuesday, 16 April 2024 16:18:24 CDT Elizabeth Figura wrote:
> > > On Tuesday, 16 April 2024 03:14:21 CDT Peter Zijlstra wrote:
> > > > I don't support GE has it in
On Thu, 2024-04-11 at 20:27 +0800, Xu Kuohai wrote:
> From: Xu Kuohai
>
> With lsm return value check, the no-alu32 version
> test_libbpf_get_fd_by_id_opts
> is rejected by the verifier, and the log says:
>
> 0: R1=ctx() R10=fp0
> ; int BPF_PROG(check_access, struct bpf_map *map, fmode_t fm
On 4/19/2024 4:18 AM, Bagas Sanjaya wrote:
On 4/18/24 02:02, Roberto Sassu wrote:
72374d71c315
Roberto
Still FTA (fail to apply), unfortunately.
Sorry, looks like I didn't regenerate the patches after rebasing to the
latest kernel. The current ones are still based on 6.8-rc3, but they
s
On Thu, Apr 18, 2024 at 1:01 PM Samuel Holland
wrote:
>
> Hi Atish,
>
> On 2024-04-18 2:47 AM, Atish Patra wrote:
> >
> > On 4/16/24 21:02, Samuel Holland wrote:
> >> Hi Atish,
> >>
> >> On 2024-04-16 1:44 PM, Atish Patra wrote:
> >>> SBI v2.0 SBI introduced PMU snapshot feature which adds the fol
This series implements SBI PMU improvements done in SBI v2.0[1] i.e. PMU
snapshot
and fw_read_hi() functions.
SBI v2.0 introduced PMU snapshot feature which allows the SBI implementation
to provide counter information (i.e. values/overflow status) via a shared
memory between the SBI implementati
The counter overflow CSR name is "scountovf" not "sscountovf".
Fix the csr name.
Fixes: 4905ec2fb7e6 ("RISC-V: Add sscofpmf extension support")
Reviewed-by: Clément Léger
Reviewed-by: Conor Dooley
Reviewed-by: Anup Patel
Reviewed-by: Andrew Jones
Signed-off-by: Atish Patra
---
arch/riscv/in
SBI v2.0 added another function to SBI PMU extension to read
the upper bits of a counter with width larger than XLEN.
Add the definition for that function.
Reviewed-by: Andrew Jones
Reviewed-by: Clément Léger
Acked-by: Conor Dooley
Reviewed-by: Anup Patel
Signed-off-by: Atish Patra
---
arch
SBI v2.0 introduced a explicit function to read the upper 32 bits
for any firmware counter width that is longer than 32bits.
This is only applicable for RV32 where firmware counter can be
64 bit.
Reviewed-by: Andrew Jones
Acked-by: Palmer Dabbelt
Reviewed-by: Conor Dooley
Reviewed-by: Anup Pate
It is a good practice to use BIT() instead of (1 << x).
Replace the current usages with BIT().
Take this opportunity to replace few (1UL << x) with BIT() as well
for consistency.
Reviewed-by: Andrew Jones
Signed-off-by: Atish Patra
---
arch/riscv/include/asm/sbi.h | 20 ++--
dr
SBI PMU Snapshot function optimizes the number of traps to
higher privilege mode by leveraging a shared memory between the S/VS-mode
and the M/HS mode. Add the definitions for that extension and new error
codes.
Reviewed-by: Andrew Jones
Reviewed-by: Anup Patel
Acked-by: Palmer Dabbelt
Signed-o
SBI_STA_SHMEM_DISABLE is a macro to invoke disable shared memory
commands. As this can be invoked from other SBI extension context
as well, rename it to more generic name as SBI_SHMEM_DISABLE.
Reviewed-by: Andrew Jones
Signed-off-by: Atish Patra
---
arch/riscv/include/asm/sbi.h | 2 +-
arch/ri
As per the SBI specification, minor version is encoded in the
lower 24 bits only. Make sure that the SBI version is computed
with the appropriate mask.
Currently, there is no minor version in use. Thus, it doesn't
change anything functionality but it is good to be compliant with
the specification.
For RV32, used_hw_ctrs can have more than 1 word if the firmware chooses
to interleave firmware/hardware counters indicies. Even though it's a
unlikely scenario, handle that case by iterating over all the words
instead of just using the first word.
Reviewed-by: Andrew Jones
Signed-off-by: Atish P
SBI v2.0 SBI introduced PMU snapshot feature which adds the following
features.
1. Read counter values directly from the shared memory instead of
csr read.
2. Start multiple counters with initial values with one SBI call.
These functionalities optimizes the number of traps to the higher
privilege
The initial sample period value when counter value is not assigned
should be set to maximum value supported by the counter width.
Otherwise, it may result in spurious interrupts.
Reviewed-by: Andrew Jones
Signed-off-by: Atish Patra
---
arch/riscv/kvm/vcpu_pmu.c | 2 +-
1 file changed, 1 inserti
The virtual counter value is updated during pmu_ctr_read. There is no need
to update it in reset case. Otherwise, it will be counted twice which is
incorrect.
Fixes: 0cb74b65d2e5 ("RISC-V: KVM: Implement perf support without sampling")
Reviewed-by: Anup Patel
Reviewed-by: Andrew Jones
Signed-off
Currently, we return a linux error code if creating a perf event failed
in kvm. That shouldn't be necessary as guest can continue to operate
without perf profiling or profiling with firmware counters.
Return appropriate SBI error code to indicate that PMU configuration
failed. An error message in
PMU Snapshot function allows to minimize the number of traps when the
guest access configures/access the hpmcounters. If the snapshot feature
is enabled, the hypervisor updates the shared memory with counter
data and state of overflown counters. The guest can just read the
shared memory instead of
KVM enables perf for guest via counter virtualization. However, the
sampling can not be supported as there is no mechanism to enabled
trap/emulate scountovf in ISA yet. Rely on the SBI PMU snapshot
to provide the counter overflow data via the shared memory.
In case of sampling event, the host firs
The SBI v2.0 introduced a fw_read_hi function to read 64 bit firmware
counters for RV32 based systems.
Add infrastructure to support that.
Reviewed-by: Andrew Jones
Reviewed-by: Anup Patel
Signed-off-by: Atish Patra
---
arch/riscv/include/asm/kvm_vcpu_pmu.h | 4 ++-
arch/riscv/kvm/vcpu_pmu.c
Rename the function to indicate that it is meant for firmware
counter read. While at it, add a range sanity check for it as
well.
Reviewed-by: Andrew Jones
Signed-off-by: Atish Patra
---
arch/riscv/include/asm/kvm_vcpu_pmu.h | 2 +-
arch/riscv/kvm/vcpu_pmu.c | 7 ++-
arch/riscv/
The SBI definitions will continue to grow. Move the sbi related
definitions to its own header file from processor.h
Suggested-by: Andrew Jones
Reviewed-by: Andrew Jones
Signed-off-by: Atish Patra
---
.../selftests/kvm/include/riscv/processor.h | 39 ---
.../testing/selftests/kvm/
__vcpu_has_ext can check both SBI and ISA extensions when the first
argument is properly converted to SBI/ISA extension IDs. Introduce
two helper functions to make life easier for developers so they
don't have to worry about the conversions.
Replace the current usages as well with new helpers.
Re
The KVM RISC-V allows Sscofpmf extension for Guest/VM so let us
add this extension to get-reg-list test.
Reviewed-by: Anup Patel
Reviewed-by: Andrew Jones
Signed-off-by: Atish Patra
---
tools/testing/selftests/kvm/riscv/get-reg-list.c | 4
1 file changed, 4 insertions(+)
diff --git a/too
The SBI PMU extension definition is required for upcoming SBI PMU
selftests.
Reviewed-by: Andrew Jones
Reviewed-by: Anup Patel
Signed-off-by: Atish Patra
---
.../testing/selftests/kvm/include/riscv/sbi.h | 66 +++
1 file changed, 66 insertions(+)
diff --git a/tools/testing/sel
This test implements basic sanity test and cycle/instret event
counting tests.
Reviewed-by: Anup Patel
Reviewed-by: Andrew Jones
Signed-off-by: Atish Patra
---
tools/testing/selftests/kvm/Makefile | 1 +
.../selftests/kvm/riscv/sbi_pmu_test.c| 369 ++
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