Re: [PATCH v3 09/13] riscv: vector: Support xtheadvector save/restore

2024-07-01 Thread Samuel Holland
Hi Charlie, A couple of suggestions for simplification below. On 2024-06-19 6:57 PM, Charlie Jenkins wrote: > Use alternatives to add support for xtheadvector vector save/restore > routines. > > Signed-off-by: Charlie Jenkins > Reviewed-by: Conor Dooley > --- > arch/riscv/include/asm/csr.h

Re: [PATCH v3 03/13] riscv: dts: allwinner: Add xtheadvector to the D1/D1s devicetree

2024-07-01 Thread Samuel Holland
Hi Conor, Charlie, On 2024-07-01 11:07 AM, Conor Dooley wrote: > On Mon, Jul 01, 2024 at 10:27:01AM -0500, Samuel Holland wrote: >> On 2024-06-19 6:57 PM, Charlie Jenkins wrote: >>> The D1/D1s SoCs support xtheadvector so it can be included in the >>> devicetree. Als

Re: [PATCH v3 07/13] riscv: csr: Add CSR encodings for VCSR_VXRM/VCSR_VXSAT

2024-07-01 Thread Samuel Holland
Hi Charlie, On 2024-06-19 6:57 PM, Charlie Jenkins wrote: > The VXRM vector csr for xtheadvector has an encoding of 0xa and VXSAT > has an encoding of 0x9. > > Co-developed-by: Heiko Stuebner > Signed-off-by: Heiko Stuebner > Signed-off-by: Charlie Jenkins > --- > arch/riscv/include/asm/csr.h

Re: [PATCH v3 03/13] riscv: dts: allwinner: Add xtheadvector to the D1/D1s devicetree

2024-07-01 Thread Samuel Holland
Hi Charlie, On 2024-06-19 6:57 PM, Charlie Jenkins wrote: > The D1/D1s SoCs support xtheadvector so it can be included in the > devicetree. Also include vlenb for the cpu. > > Signed-off-by: Charlie Jenkins > Reviewed-by: Conor Dooley > --- > arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 3 +

Re: [PATCH v8 09/24] drivers/perf: riscv: Implement SBI PMU snapshot function

2024-04-22 Thread Samuel Holland
Hi Atish, On 2024-04-20 10:17 AM, Atish Patra wrote: > SBI v2.0 SBI introduced PMU snapshot feature which adds the following > features. > > 1. Read counter values directly from the shared memory instead of > csr read. > 2. Start multiple counters with initial values with one SBI call. > > These

Re: [PATCH v8 08/24] drivers/perf: riscv: Fix counter mask iteration for RV32

2024-04-19 Thread Samuel Holland
Hi Atish, On 2024-04-20 10:17 AM, Atish Patra wrote: > For RV32, used_hw_ctrs can have more than 1 word if the firmware chooses > to interleave firmware/hardware counters indicies. Even though it's a > unlikely scenario, handle that case by iterating over all the words > instead of just using the

Re: [PATCH v7 08/24] drivers/perf: riscv: Implement SBI PMU snapshot function

2024-04-18 Thread Samuel Holland
Hi Atish, On 2024-04-18 2:47 AM, Atish Patra wrote: > > On 4/16/24 21:02, Samuel Holland wrote: >> Hi Atish, >> >> On 2024-04-16 1:44 PM, Atish Patra wrote: >>> SBI v2.0 SBI introduced PMU snapshot feature which adds the following >>> features. >&g

Re: [RFC PATCH 2/5] RISC-V: Expose Ssdtso via hwprobe API

2023-11-27 Thread Samuel Holland
Hi Christoph, On 2023-11-24 1:21 AM, Christoph Muellner wrote: > From: Christoph Müllner > > This patch adds Ssdtso to the list of extensions which > are announced to user-space using te hwprobe API. > > Signed-off-by: Christoph Müllner > --- > Documentation/arch/riscv/hwprobe.rst | 3 +++ >