On 11/13, Eugeniy Paltsev wrote:
> Hi Stephen, Michael,
>
> Please treat this message as a polite reminder to review my patch.
> It would be really nice to see this patch in 4.15.
Sorry I don't have this in my queue. It might make v4.15 but the
mere window is open now and I lost this patch someho
On 11/14, Alexey Brodkin wrote:
> Hi Vladimir,
>
> On Tue, 2017-11-14 at 19:01 +0200, Vladimir Zapolskiy wrote:
> > On 11/14/2017 02:20 PM, Eugeniy Paltsev wrote:
> > >
> > > Add option to set initial output frequency of plls via
> > > "clock-frequency" property in pll's device tree node.
> > > T
On 04/15, Alexey Brodkin wrote:
> Hi Stephen,
>
> On Mon, 2016-04-11 at 15:03 -0700, sb...@codeaurora.org wrote:
> > On 04/11, Alexey Brodkin wrote:
> > >
> > > On Mon, 2016-04-11 at 11:41 +0100, Jose Abreu wrote:
> > > >
> > >
On 04/11, Alexey Brodkin wrote:
> On Mon, 2016-04-11 at 11:41 +0100, Jose Abreu wrote:
> > + * warranty of any kind, whether express or implied.
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
>
> "linux/platform_device.h" includes "linux/device.h" so you
On 11/25, Y.T. Tang wrote:
> Hi Scott,
>
> > -Original Message-
> > From: Scott Wood
> > Sent: Thursday, November 24, 2016 4:21 PM
> > To: Y.T. Tang ; mturque...@baylibre.com
> > Cc: sb...@codeaurora.org; linux-...@vger.kernel.org; linux-
>
On 12/08, Scott Wood wrote:
> On 12/08/2016 05:10 PM, sb...@codeaurora.org wrote:
> > On 11/25, Y.T. Tang wrote:
> >> Hi Scott,
> >>
> >>> -Original Message-
> >>> From: Scott Wood
> >>> Sent: Thursday, November 24, 2016 4:2
On 03/02, Leonard Crestez wrote:
> On Tue, 2017-02-28 at 00:05 -0800, sb...@codeaurora.org wrote:
> > Sure. clk_get_sys() could be called and then we could have
> > something sprintf the dev_id there. A quick grep doesn't show any
> > place where that happens though
On 02/25, Leonard Crestez wrote:
> On Fri, 2017-02-24 at 12:44 -0800, Stephen Boyd wrote:
> > On 02/20, Leonard Crestez wrote:
> > > Some drivers use sprintf to build clk connection id names but the
> > > clk
> > > core will save those strings and occasionally print them back.
> > > Duplicate
> > >
On 04/05, Vlad Zakharov wrote:
> Hi Stephen,
>
> On Tue, 2017-04-04 at 18:35 -0700, Stephen Boyd wrote:
> > > + .pll_table = (struct pll_of_table []){
> > > + {
> > > + .prate = 2700,
> >
> > Can this be another clk in the framework instead of hardcoding
>
On 07/12, Eugeniy Paltsev wrote:
> On Tue, 2017-07-11 at 22:25 -0700, Stephen Boyd wrote:
> > On 06/21, Eugeniy Paltsev wrote:
> > > AXS10X boards manages it's clocks using various PLLs. These PLL has
> > > same
> > > dividers and corresponding control registers mapped to different
> > > addresses.
On 03/09, Y.T. Tang wrote:
> Hi Michael and Stephen,
>
> This patch set was acked by Rob Herring. Do you have any comments on them?
>
> BTW: Scott should stay in author, do I need to resend them with author
> changed or you can change it when applying?
>
Please resend these two patches.
--
On 08/09, Eugeniy Paltsev wrote:
> On Thu, 2017-08-03 at 18:53 -0700, Stephen Boyd wrote:
> > On 07/14, Eugeniy Paltsev wrote:
> > > + /* input divider = reg.idiv + 1 */
> > > + idiv = 1 + ((val & CGU_PLL_CTRL_IDIV_MASK) >>
> > > CGU_PLL_CTRL_IDIV_SHIFT);
> > > + /* fb divider = 2*(reg.fbdiv + 1) *
On 04/17, Andy Tang wrote:
> Hi Stephen and Michael,
>
> This patch set has been pending for more than two months since it was first
> sent.
> I have not received any response from you until now.
>
> Could you give some comments on it?
>
Hmm I think it was sent near the merge window so I put i
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