Hello,
I have couple of questions.
1) In case of UP how is jiffies(timer) get updated while holding spin
lock using spinlock_irq_save?
2)My understanding is in smp environment jiffies updation cannot be
done on processor holding spinlock irrespective of spinlock API.So
timer interrupt should be en
Hi
I have MV78460 based board with Marvell LION2 device connected to
8-ports of PCIe.
LION2 consists of 8 PCIe device.
MV78460 PCIe -->8-devices of LION2 are mapped as given here
pcie,0.0
pcie0.1
pcie 0.2
pcie 0.3
pcie 1.0
pcie 1.1
pcie 2.0
pcie 3.0
I am running linux-4.0.4 with modified device
Hello,
I am working on a card which as GPIOs connected to external I/O's. The
board consists of ARMADAXP 78460 host cpu.
Board currently runs Linux-4.1 with modified armada-xp-gp.dtb for ArmadaXP.
I enabled "orion-gpio" driver to initialize GPIOs as given in armada-xp-mv78460.
The driver while
->name=(null)
drivers/gpio/gpio-mvebu.c mvebu_gpio_probe 859
I will try to dig in more information in the probe & irq_domain_add_simple
On Tue, Aug 4, 2015 at 9:04 PM, Andrew Lunn wrote:
> On Tue, Aug 04, 2015 at 08:52:17PM +0530, raghu MG wrote:
>> Hello,
>>
>>
l needs bit more
tweaking to suit the board & devices connected to gpio.
I would appreciate bit of guidance here
On Tue, Aug 4, 2015 at 9:04 PM, Andrew Lunn wrote:
> On Tue, Aug 04, 2015 at 08:52:17PM +0530, raghu MG wrote:
>> Hello,
>>
>> I am working on a card which
ited to
request_irq, but registering domain & then IRQ is bit not clear.
Regards
Raghu
On Wed, Aug 5, 2015 at 9:51 PM, Andrew Lunn wrote:
> On Wed, Aug 05, 2015 at 08:31:27PM +0530, raghu MG wrote:
>> Hi Andrew,
>>
>> The issue I found was irq_alloc_descs is called twice
Ok,I think I need to understand more about this gpio driver.
As you said its registering chained handler,but why are they(IRQs) not
visible in cat /proc/interrupts.
What could be the reason.?
Do I need to further initialize marvell GPIO registers to trigger
these events. The driver is unmasking a
Ok...
my bad never realised DT entries are necessary.
will try this & post the results.
Regards
Raghu
On Thu, Aug 6, 2015 at 10:43 PM, Andrew Lunn wrote:
> On Thu, Aug 06, 2015 at 10:28:12PM +0530, raghu MG wrote:
>> Ok,I think I need to understand more about this gpio driver.
>
Hi Andrew,
I added these entries into armada-xp-gp.dtb
gpio_rtm {
compatible = "gpio-rtm";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&keys_pin>;
pinctrl-names = "default";
rtm@57 {
Hi,
This mail is regarding Linux smp boot on ARMADA-XP MV2860
.
CPU-1 doesnt boot/go through the boot sequence & it fails to come
online & dumps this message
CPU1:failed to come online .
The CPU-1 boot register is programmed with physical address of
-->armada_xp_secondary_startup function & then
Hi,
This mail is regarding Linux smp boot on ARMADA-XP MV2860
.
CPU-1 doesnt boot/go through the boot sequence & it fails to come
online & dumps this message
CPU1:failed to come online .
The CPU-1 boot register is programmed with physical address of
-->armada_xp_secondary_startup function & then
.Hi,
This mail is regarding Linux smp boot on ARMADA-XP MV2860.
CPU-1 doesnt boot/go through the boot sequence & it fails to come
online & dumps this message
CPU1:failed to come online .
The CPU-1 boot register is programmed with physical address of
-->armada_xp_secondary_startup function & then
e, 19 May 2015 14:15:49 +0530, raghu MG wrote:
>
>> I am trying latest stable release from kernel.org -->linux-4.0.3.
>>
>> I have seen this issue in linux-3.10.39 & linux-3.10.32 for which
>> Marvell has provided lsp.
>>
>> This issue doesnt crop up in
Thank you for clarifying.
On Mon, Oct 26, 2015 at 4:18 PM, Russell King - ARM Linux
wrote:
> On Mon, Oct 26, 2015 at 12:19:31PM +0530, raghu MG wrote:
>> Hello,
>> I have couple of questions.
>> 1) In case of UP how is jiffies(timer) get updated while holding spin
>> l
14 matches
Mail list logo
