ication per transaction then? I guess
Florian sufficiently illustrated how this would be implemented.
> Hope this helps...
It does, thanks a lot for the information!
Thanks, Phil
13 +633,22 @@ static int bcm2835_power_probe(struct platform_device
> *pdev)
> power->dev = dev;
> power->base = pm->base;
> power->rpivid_asb = pm->rpivid_asb;
> + power->argon_asb = pm->argon_asb;
>
> - id = ASB_READ(ASB_AXI_BRDG_ID);
> + id = ASB_READ(ASB_AXI_BRDG_ID, false);
> if (id != 0x62726467 /* "BRDG" */) {
> - dev_err(dev, "ASB register ID returned 0x%08x\n", id);
> + dev_err(dev, "RPiVid ASB register ID returned 0x%08x\n", id);
> return -ENODEV;
> }
>
> + if (pm->argon_asb) {
> + id = ASB_READ(ASB_AXI_BRDG_ID, true);
> + if (id != 0x62726467 /* "BRDG" */) {
> + dev_err(dev, "Argon ASB register ID returned
> 0x%08x\n", id);
> + return -ENODEV;
> + }
> + }
> +
Surely these are the same register. Is this the result of a bad merge?
Thanks,
Phil
Nicolas,
On Tue, 9 Feb 2021 at 14:00, Nicolas Saenz Julienne
wrote:
>
> On Tue, 2021-02-09 at 13:19 +, Phil Elwell wrote:
> > Hi Nicolas,
> >
> > On Tue, 9 Feb 2021 at 13:00, Nicolas Saenz Julienne
> > wrote:
> > >
> > > In BCM2711 the n
this patch allowing the arm64 DMA zone be configurable.
Signed-off-by: Alix Wu
Signed-off-by: YJ Chiang
Signed-off-by: Phil Chang
---
Hi
For some devices, the main memory split into 2 part due to the memory
architecture,
the efficient and less inefficient part.
One of the use case is fine
The count field is meant to tell if an update to nr_running
is an add or a subtract. Make it do so by adding the missing
minus sign.
Fixes: 9d246053a691 ("sched: Add a tracepoint to track rq->nr_running")
Signed-off-by: Phil Auld
---
kernel/sched/sched.h | 2 +-
1 file changed
ice 5
function 0.
Severity: Critical
Message ID: PCI1308
I reverted this single patch and the errors went away.
Thoughts?
Phil Oester
table->handle);
> + net->nft.base_seq);
>
> audit_log_nfcfg(buf,
> family,
Why did you leave the object-related logs in place? They should reappear
at commit time just like chains and sets for instance, no?
Thanks, Phil
On Thu, Mar 18, 2021 at 02:37:03PM -0400, Richard Guy Briggs wrote:
> On 2021-03-18 17:30, Phil Sutter wrote:
[...]
> > Why did you leave the object-related logs in place? They should reappear
> > at commit time just like chains and sets for instance, no?
>
> There are
un-time between running or stopped auditd, at least for
large rulesets. Individual calls suffer from added audit logging, but
that's expected of course.
Tested-by: Phil Sutter
Thanks, Phil
&&
> >> + !migrate_degrades_capacity(p, env))
> >> + tsk_cache_hot = 0;
> >
> > ... I'm starting to wonder if we should not rename the
> > tsk_cache_hot variable to something else to make this
> > code more readable. Probably in another patch :)
> >
>
> I'd tend to agree, but naming is hard. "migration_harmful" ?
I thought Rik meant tsk_cache_hot, for which I'd suggest at least
buying a vowel and putting an 'a' in there :)
Cheers,
Phil
>
> > --
> > All Rights Reversed.
>
--
On Mon, Apr 19, 2021 at 06:17:47PM +0100 Valentin Schneider wrote:
> On 19/04/21 08:59, Phil Auld wrote:
> > On Fri, Apr 16, 2021 at 10:43:38AM +0100 Valentin Schneider wrote:
> >> On 15/04/21 16:39, Rik van Riel wrote:
> >> > On Thu, 2021-04-15 at 18:58 +
> In this sense, I suggest limit burst buffer to 16 times of quota or around.
> That should be enough for users to
> improve tail latency caused by throttling. And users might choose a smaller
> one or even none, if the interference
> is unacceptable. What do you think?
>
Having quotas that can regularly be exceeded by 16 times seems to make the
concept of a quota
meaningless. I'd have thought a burst would be some small percentage.
What if several such containers burst at the same time? Can't that lead to
overcommit that can effect
other well-behaved containers?
Cheers,
Phil
--
our patch and it resolves the regression. It does not
trigger the warning message you added.
Phil
On Tue, Jan 05, 2021 at 12:41:04AM +0100, Arnd Bergmann wrote:
> Phil Oester reported that a fix for a possible buffer overrun that I
> sent caused a regression that manifests in this output:
>
> Event Message: A PCI parity error was detected on a component at bus 0
> devi
locally revert that patch, and take
the maintenance hit ourselves for the implications of that. (Here 'we'
= the volunteer community still supporting the device because of its
longevity.)
Cheers,
Phil
--
People generally seem to want software to be free as in speech and/or
free as in beer
From: Guido Piasenza
The extra entry in the table makes SCIFA0_B, and all peripherals after it, fail.
Signed-off-by: Phil Edworthy
---
drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
b/drivers
There is a missing 0 entry from the MOD_SEL3 table.
Signed-off-by: Phil Edworthy
---
drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
index 56f62dc..a823b5b
r need to make up
> random bus numbers or put them in DT.
>
> Using multiple domains is way cleaner for this, even if we have to
> make up the numbers.
Maybe this is a stupid question, but why would you want to specify the domain
in the DT at all? Doesn't every instance of a driver
return;
> + }
> +
> + if (restype == PCI_BASE_ADDRESS_MEM_PREFETCH)
> + flags |= PCI_BASE_ADDRESS_MEM_PREFETCH;
Since IORESOURCE_TYPE_BITS is 0x1f00, and
PCI_BASE_ADDRESS_MEM_PREFETCH is 0x08, this will never match. I think you
are mixing up different sets of definitio
ibution.
But you are forgetting section #3, which kicks in if you distribute in
compiled or executable form. It limits the fee for separate source code
delivery to "no more than your cost of physically performing source
distribution"
Only your customers are entitled to that service, th
review it, too.
Thanks for doing this work!
Phil
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Hi Laurent,
On 08 July 2015 00:08, Laurent wrote:
> Hi Phil,
>
> Thank you for the patch.
>
> On Tuesday 07 July 2015 12:52:43 Phil Edworthy wrote:
> > These changes allow a PHY driver to trigger a VBUS interrupt and
> > to provide the value of VBUS.
> >
Hi,
(Full-quoting here due to added maling lists.)
Looks like this is a problem of slow systems. I will try to reproduce
and come up with a similar fix as in commit 685a015 ("rhashtable: Allow
other tasks to be scheduled in large lookup loops").
Thanks for reporting,
Phil
On Mon, Au
ignware pci driver is being
modified.
Please see
http://lists.infradead.org/pipermail/linux-arm-kernel/2015-July/353421.html
Of course, as a quick fix for the compile test failure, this is fine.
Best regards
Phil
>
> Signed-off-by: Geert Uytterhoeven
> ---
> drivers/pci/host/Kconfi
Hi,
I found the problem, it was a bug in my own code. For details see below:
On Wed, Aug 12, 2015 at 05:09:31PM +0200, Phil Sutter wrote:
[...]
> Here is the reproducer code (kthread_test.c) I used:
>
> ---8<--
alf a second on my
local VM with two cores. Running 200 threads took about four seconds. If
slow systems suffer too much from this though, the default could be
lowered or even set to zero so this extended test does not run at all by
default.
Signed-off-by: Phil Sutter
---
lib/test_rhashtable.c
On Sun, Aug 16, 2015 at 08:12:35PM +0200, Florian Westphal wrote:
> Phil Sutter wrote:
> > After having tested insertion, lookup, table walk and removal, spawn a
> > number of threads running operations on the same rhashtable. Each of
> > them will:
>
> [..]
>
34.896936] Traversal complete: counted=49993, nelems=5,
> > entries=5, table-jumps=12
> > [ 34.897056] Test failed: Total count mismatch ^^^
>
> I do see count mismatches as well due to the design of the walker
> which restarts and thus sees certain entries
On Fri, Jul 17, 2015 at 12:26:36PM +0200, Phil Sutter wrote:
> On Fri, Jul 17, 2015 at 10:04:56AM +0200, Thomas Graf wrote:
> > On 07/02/15 at 10:09pm, Meelis Roos wrote:
> > > [ 33.425061] Running rhashtable test nelem=8, max_size=65536,
> > > shrinking=0
&
too easily
and just build their scripts around them - the same scripts we have to
keep compatible to then.
Cheers, Phil
On Thu, Apr 14, 2016 at 08:44:40AM -0700, Eric Dumazet wrote:
> On Thu, 2016-04-14 at 17:34 +0200, Jiri Kosina wrote:
> > On Thu, 14 Apr 2016, Phil Sutter wrote:
> >
> > > OTOH some qdiscs (CBQ, DRR, DSMARK, HFSC, HTB, QFQ) assign the default
> > > one upon deleti
Hi Marc,
On 11 November 2015 16:38, Marc Zyngier wrote:
> On Tue, 10 Nov 2015 16:52:33 +0100
> Thierry Reding wrote:
>
> > On Mon, Nov 09, 2015 at 06:01:49PM +, Phil Edworthy wrote:
> > > Hi Thierry,
> > >
> > > On 09 November 2015 17:24, Phi
Hi Liviu, Arnd,
On 11 November 2015 18:25, LIviu wrote:
> On Mon, Nov 09, 2015 at 12:32:13PM +0000, Phil Edworthy wrote:
> > Hi Liviu, Will,
> >
> > On 04 November 2015 15:19, Phil wrote:
> > > On 04 November 2015 15:02, Liviu wrote:
> > > > On Wed, Nov 0
Hi Arnd,
On 12 November 2015 09:49, Arnd Bergmann wrote:
> On Thursday 12 November 2015 09:26:33 Phil Edworthy wrote:
> > On 11 November 2015 18:25, LIviu wrote:
> > > On Mon, Nov 09, 2015 at 12:32:13PM +, Phil Edworthy wrote:
>
> > > I think you're mixing
Hi Marc,
On 12 November 2015 20:31, Marc Zyngier wrote:
> Phil Edworthy wrote:
> > On 11 November 2015 16:38, Marc Zyngier wrote:
> > > On Tue, 10 Nov 2015 16:52:33 +0100
> > > Thierry Reding wrote:
> > >
> > > > On Mon, Nov 09, 2015 at 06:
Hi Arnd,
On 12 November 2015 16:17, Arnd Bergmann wrote:
> On Thursday 12 November 2015 15:33:41 Phil Edworthy wrote:
> > On 12 November 2015 09:49, Arnd Bergmann wrote:
> > > On Thursday 12 November 2015 09:26:33 Phil Edworthy wrote:
> > > > On 11 November 2015 18
On 13 November 2015 14:00, Arnd Bergmann wrote:
> On Friday 13 November 2015 13:03:11 Phil Edworthy wrote:
> >
> > > > Then pci_device_add() sets the devices coherent_dma_mask to 4GiB
> before
> > > > calling of_pci_dma_configure(). I assume it does this on
me every single test with 50 threads was
successful.
HTH, Phil
[ 5196.212230] Running rhashtable test nelem=8, max_size=0, shrinking=0
[ 5196.243846] Test 00:
[ 5196.245990] Adding 5 keys
[ 5196.250787] Info: encountered resize
[ 5196.251631] Info: encountered resize
[ 5196.252773] In
On Fri, Dec 04, 2015 at 09:45:20AM -0800, Eric Dumazet wrote:
> On Fri, 2015-12-04 at 18:01 +0100, Phil Sutter wrote:
> > On Fri, Dec 04, 2015 at 10:39:56PM +0800, Herbert Xu wrote:
> > > On Thu, Dec 03, 2015 at 08:08:39AM -0800, Eric Dumazet wrote:
> > > >
> >
file in the comments.
> >
> > Cc: Simon Horman
> > Cc: Bjorn Helgaas
> > Cc: linux-...@vger.kernel.org
> > Cc: linux...@vger.kernel.org
> > Signed-off-by: Paul Gortmaker
It doesn't apply, would you mind rebasing onto:
https://git.kernel.org/cgit/linux/kerne
The first patch removes code that is no longer used. The next two allow us to
use runtim PM. The last patch is for PHY setup in order to get PCIe compliance
apparently. For that last patch, I've been told that this is what I must set.
Phil Edworthy (4):
PCI: rcar: remove unused pci_sys
Commit b3a72384fe29 ("ARM/PCI: Replace pci_sys_data->align_resource
with global function pointer") removed the struct pci_sys_data
dependency from the ARM pcibios functions, so remove it from this
driver.
Signed-off-by: Phil Edworthy
---
drivers/pci/host/pcie-rcar.c | 9
If runtime PM is enabled in the kernel config, simply enable the
clocks once during probe.
Signed-off-by: Phil Edworthy
---
drivers/pci/host/pcie-rcar.c | 44
1 file changed, 32 insertions(+), 12 deletions(-)
diff --git a/drivers/pci/host/pcie
For PCIe compliance, the PHY registers need setting as per the
manual.
Signed-off-by: Phil Edworthy
---
drivers/pci/host/pcie-rcar.c | 27 ---
1 file changed, 24 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
index
as long as it has also been transitioned to L1 link state.
So, when attempting a config access, check to see if the card has gone
into L1, and if so, do the same for the host controller.
This is based on a patch by Hien Dang
Signed-off-by: Phil Edworthy
---
drivers/pci/host/pcie-r
Hi Wolfram,
On 17 December 2015 13:31, Wolfram Sang wrote:
> Hi Phil,
>
> > + /* Wait until we are in L1 */
> > + while (!(val & L1FAEG))
> > + val = rcar_pci_read_reg(pcie, PMSR);
>
> No timeout?
Since the hardware doesn&
rcar_pci_write_reg(pcie, 0x0001, GEN2_PCIEPHYCTRL);
> > + rcar_pci_write_reg(pcie, 0x0006, GEN2_PCIEPHYCTRL);
>
> I'd vote for a comment saying where these magic values come from, i.e.
> which manual, which chapter, etc...
Ok, will do.
Thanks
Phil
--
To unsubscribe from th
);
> >
> > No timeout?
>
> And no cpu_relax() in each iteration.
Sure, I'll fix that.
Thanks
Phil
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
> ge...@linux-m68k.or
Hi Marc,
On 16 November 2015 18:31, Marc Zyngier wrote:
> On 13/11/15 09:36, Phil Edworthy wrote:
> > Since the stack trace doesn't help that much I added some tracing:
> > pci_msi_setup_msi_irqs()
> > calls pci_msi_get_domain()
> > calls dev_get_msi_
.
Herbert, did you manage to reproduce the problem meanwhile? If so, was
there any progress on fixing rhashtable? Otherwise, I could respin my
patch from [1] to cover only -EBUSY case by default and add a parameter
to make non-permanent -ENOMEM visible.
Cheers, Phil
[1]: https://lkml.org/lkml/2
On Mon, Nov 30, 2015 at 05:37:55PM +0800, Herbert Xu wrote:
> Phil Sutter wrote:
> > The following series aims to improve lib/test_rhashtable in different
> > situations:
> >
> > Patch 1 allows the kernel to reschedule so the test does not block too
> >
old one. Not pretty, but reliable.
Another insentive to rework those drivers and phase out this API.
Reported-by: Phil Edworthy
Tested-by: Phil Edworthy
Signed-off-by: Marc Zyngier
---
drivers/pci/msi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/msi.c
row the table one of them may be tricked into doing a rehash
> > instead.
> >
> > I'm working on a fix.
>
> OK this patch fixes the EBUSY problem as far as I can tell. Please
> let me know if you still observe EBUSY with it. I'll respond to the
> ENOMEM probl
t speak for netlink, but if you apply patch 1/3 from this thread,
test_rhashtable.c starts generating many insert failures during the
multiple thread test.
Cheers, Phil
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord.
-clock";
clocks = <&clk_core>;
#clock-cells = <0>;
clock-div = <1>;
clock-mult = <2>;
};
};
Phil
On 10/09/2015 16:57, Martin Sperl wrote:
>> On 10.09.2015, at 17:48, Noralf Trønnes wrote:
>>
&g
rked as v2 and acks, etc added.
Harunobu Kurokawa (1):
PCI: pcie-rcar: Add support for R-Car H3.
Phil Edworthy (2):
PCI: rcar: Convert to DT resource parsing API
Revert "PCI: rcar: Build pcie-rcar.c only on ARM"
Documentation/devicetree/bindings/pci/rcar-pci.txt | 3 +-
driv
Now that we can build on arm64, revert commit 7c537c67d2e4
("PCI: rcar: Build pcie-rcar.c only on ARM").
Signed-off-by: Phil Edworthy
---
v2: No changes
---
drivers/pci/host/Kconfig | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/pci/host/Kconfig b/driver
From: Harunobu Kurokawa
R-Car H3 device is r8a7795
Signed-off-by: Harunobu Kurokawa
Acked-by: Wolfram Sang
Tested-by: Wolfram Sang
---
v2: No changes
---
Documentation/devicetree/bindings/pci/rcar-pci.txt | 3 ++-
drivers/pci/host/pcie-rcar.c | 1 +
2 files changed, 3 i
"PCI: generic: Convert to DT resource parsing API".
Signed-off-by: Phil Edworthy
Reported-by: Wolfram Sang
Tested-by: Wolfram Sang
Acked-by: Simon Horman
---
v2:
- Remove incorrect res_valid check
---
drivers/pci/host/pcie-rcar.c | 116 +++--
HI Bjorn,
On 25 November 2015 16:41, Bjorn Helgaas wrote:
> Hi Phil,
>
> On Wed, Nov 25, 2015 at 03:30:36PM +0000, Phil Edworthy wrote:
> > The first patches fixes the build problem
>
> I'm trying to figure out if v4.4 has a build problem we need to fix.
> If I und
is
> > hardware
> > related.
>
> Any news if this is really HW related?
I found out that the PCIe controller HW only supports 32-bit AXI bus addresses,
so it
works fine if you limit the available memory. The driver will need some work to
use
the IPMMU at some point.
Thanks
Ph
he driver will need some
> > work to
> use
> > the IPMMU at some point.
>
> Ah, okay.
>
> Can you send the dts patches, too? I checked the BSP this time, but to
> no avail...
I will once I sort out the arm64 IO resources problem and the MSI problem.
Thanks
Phil
--
Hi Geert,
On 21 December 2015 13:17, Geert Uytterhoeven wrote:
> On Mon, Dec 21, 2015 at 11:52 AM, Phil Edworthy
> wrote:
> > On 18 December 2015 14:04, Wolfram Sang wrote:
> >> > Since the hardware doesn't support hot plug, I believe this loop will
> >&
iting until we are in L1.
PATCh 4/4 - Added comment about where the PHY settings come from.
Phil Edworthy (4):
PCI: rcar: remove unused pci_sys_data structure in pcie-rcar
PCI: rcar: Support runtime PM link state L1 handling in pcie-rcar
PCI: rcar: Add runtime PM support to pcie-rcar
PCI:
Commit b3a72384fe29 ("ARM/PCI: Replace pci_sys_data->align_resource
with global function pointer") removed the struct pci_sys_data
dependency from the ARM pcibios functions, so remove it from this
driver.
Signed-off-by: Phil Edworthy
---
v2:
- No changes.
---
drivers/pci/hos
as long as it has also been transitioned to L1 link state.
So, when attempting a config access, check to see if the card has gone
into L1, and if so, do the same for the host controller.
This is based on a patch by Hien Dang
Signed-off-by: Phil Edworthy
---
v2:
- Use readl_poll_timeout_atomic wh
If runtime PM is enabled in the kernel config, simply enable the
clocks once during probe.
Signed-off-by: Phil Edworthy
---
v2:
- No changes.
---
drivers/pci/host/pcie-rcar.c | 44
1 file changed, 32 insertions(+), 12 deletions(-)
diff --git a
For PCIe compliance, the PHY registers need setting as per the
manual.
Signed-off-by: Phil Edworthy
---
v2:
- Added comment about where the PHY settings come from.
---
drivers/pci/host/pcie-rcar.c | 31 ---
1 file changed, 28 insertions(+), 3 deletions(-)
diff
;tx_queue_len) {
dev->priv_flags |= IFF_NO_QUEUE;
+ dev->tx_queue_len = 1;
+ }
dev->num_tx_queues = txqs;
dev->real_num_tx_queues = txqs;
Unless there is concern, I will formally submit this later.
Thanks, Phil
On Wed, Feb 17, 2016 at 01:57:42PM +, Mathieu Desnoyers wrote:
> - On Feb 17, 2016, at 7:47 AM, Phil Sutter p...@nwl.cc wrote:
>
> > Hi,
> >
> > On Tue, Feb 16, 2016 at 07:56:23PM -0500, Mathieu Desnoyers wrote:
> >> This reverts commit 348e3435cbefa815
ial handling of tx_queue_len ==
0")
Tested-by: Mathieu Desnoyers
Signed-off-by: Phil Sutter
---
net/core/dev.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/net/core/dev.c b/net/core/dev.c
index 3f4071a84a03f..75383f40e7ced 100644
--- a/net/core/dev.c
+++ b/net/c
Hi Dmitry,
On 14 November 2014 22:22, Dmitry wrote:
>
> Return value of irq_of_parse_and_map() is unsigned int, with 0
> indicating failure, so testing for negative result never works.
>
> Signed-off-by: Dmitry Torokhov
Acked-by: Phil Edworthy
Thanks
Phil
> ---
>
&
On Tue, Feb 24, 2015 at 9:42 AM, Bartosz Golaszewski
wrote:
>
> Searching for the member of an array closest to 'x' is
> duplicated in several places.
>
> Add two macros that implement this algorithm for arrays
> sorted both in ascending and descending order.
I don't see the point here. You're n
out as
intuitive as the fact that kernel IPsec tunnel mode does not naturally
provide an own interface. Firewall setup on top of that might become a
matter of try-and-error. Maybe having a VTI interface and merely moving
the default route instead of fiddling with policies all the time might
make t
On 14/03/2016 11:19 PM, Geert Uytterhoeven wrote:
This allows to set multiple outputs using a single SPI transfer.
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Phil Reid
I do have a general question about GPIO drivers.
pca953x does not update the cached data unless the write operation
fault qdisc by setting tx_queue_len in tun_setup().
>
> Fixes: f84bb1eac027 ("net: fix IFF_NO_QUEUE for drivers using alloc_netdev")
> Cc: Phil Sutter
> Signed-off-by: Jason Wang
Acked-by: Phil Sutter
/boot/dts/r8a7791-koelsch.dts
> >>> @@ -660,6 +660,7 @@
> >>>};
> >>>
> >>>&pcie_bus_clk {
> >>> + clock-frequency = <1>;
>
> >> Hmmm, looking at the Koelsch schematics, I don'
u16 *) val))
--
Regards
Phil Reid
this would be allowed?
>
> I will be grateful for any pointers.
This isn't a socket level operation, except to connect to the proxy.
Google suggests using libproxy and/or libcurl.
HTH,
Phil
On 30/03/2016 2:49 PM, Yong Li wrote:
The current implementation only uses the first byte in val,
the second byte is always 0. Change it to use cpu_to_le16
to write the two bytes into the register
Signed-off-by: Yong Li
Reviewed-by: Phil Reid
---
drivers/gpio/gpio-pca953x.c | 3 ++-
1
Hi Bjorn,
On 29 October 2015 23:03, Bjorn wrote:
> On Thu, Oct 29, 2015 at 07:48:00PM +0100, Wolfram Sang wrote:
> > On Thu, Oct 29, 2015 at 04:44:06PM +0000, Phil Edworthy wrote:
> > > Hi Wolfram,
> > >
> > > On 29 October 2015 16:40, Wolfram wrote:
> &g
Hi Bjorn,
On 30 October 2015 07:19, Phil wrote
> On 29 October 2015 23:03, Bjorn wrote:
> > On Thu, Oct 29, 2015 at 07:48:00PM +0100, Wolfram Sang wrote:
> > > On Thu, Oct 29, 2015 at 04:44:06PM +, Phil Edworthy wrote:
> > > > Hi Wolfram,
> > > >
Hi Bjorn,
On 30 October 2015 07:24, Phil wrote:
> On 30 October 2015 07:19, Phil wrote
> > On 29 October 2015 23:03, Bjorn wrote:
> > > On Thu, Oct 29, 2015 at 07:48:00PM +0100, Wolfram Sang wrote:
> > > > On Thu, Oct 29, 2015 at 04:44:06PM +, Phil Edwort
Hi Wolfram,
On 29 October 2015 18:48, Wolfram wrote:
> On Thu, Oct 29, 2015 at 04:44:06PM +0000, Phil Edworthy wrote:
> > Hi Wolfram,
> >
> > On 29 October 2015 16:40, Wolfram wrote:
> > > > Ouch, my bad. I have been working with our out-of-tree BSP fo
Hi Bjorn,
On 30 October 2015 13:32, Bjorn wrote:
> On Fri, Oct 30, 2015 at 09:00:20AM +0000, Phil Edworthy wrote:
> > Hi Bjorn,
> >
> > On 30 October 2015 07:24, Phil wrote:
> > > On 30 October 2015 07:19, Phil wrote
> > > > On 29 October 2015 23:03, Bjor
a1cb757550 ("PCI/MSI: Let pci_msi_get_domain use struct device::msi_domain")
I'll look into this, but it doesn't stop us from applying these patches.
Harunobu Kurokawa (1):
PCI: pcie-rcar: Add support for R-Car H3.
Phil Edworthy (2):
PCI: pcie-rcar: Convert to DT resource p
Now that we can build on arm64, revert commit 7c537c67d2e4
("PCI: rcar: Build pcie-rcar.c only on ARM").
Signed-off-by: Phil Edworthy
---
drivers/pci/host/Kconfig | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kco
"PCI: generic: Convert to DT resource parsing API".
Signed-off-by: Phil Edworthy
---
drivers/pci/host/pcie-rcar.c | 117 +++
1 file changed, 74 insertions(+), 43 deletions(-)
diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rc
From: Harunobu Kurokawa
R-Car H3 device is r8a7795
Signed-off-by: Harunobu Kurokawa
---
Documentation/devicetree/bindings/pci/rcar-pci.txt | 3 ++-
drivers/pci/host/pcie-rcar.c | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/b
non-threaded test to retry insert operations, too.
Suggested-by: Thomas Graf
Signed-off-by: Phil Sutter
---
lib/test_rhashtable.c | 53 ---
1 file changed, 29 insertions(+), 24 deletions(-)
diff --git a/lib/test_rhashtable.c b/lib/test_rhashtable.c
exact number of objects upon table init won't
suffice as that value is being rounded down to the next power of two -
anticipate this by rounding up to the next power of two in beforehand.
Signed-off-by: Phil Sutter
---
lib/test_rhashtable.c | 8 +---
1 file changed, 5 insertions(
This should fix for soft lockup bugs triggered on slow systems.
Signed-off-by: Phil Sutter
---
lib/test_rhashtable.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/lib/test_rhashtable.c b/lib/test_rhashtable.c
index 8c1ad1c..63654e3 100644
--- a/lib/test_rhashtable.c
+++ b/lib
at it
contains.
- Add patch 4 as a debugging aid.
Phil Sutter (4):
rhashtable-test: add cond_resched() to thread test
rhashtable-test: retry insert operations
rhashtable-test: calculate max_entries value by default
rhashtable-test: allow to retry even if -ENOMEM was returned
lib/test_rhashta
This is rather a hack to expose the current issue with rhashtable to
under high pressure sometimes return -ENOMEM even though system memory
is not exhausted and a consecutive insert may succeed.
Signed-off-by: Phil Sutter
---
lib/test_rhashtable.c | 14 +-
1 file changed, 13
On Fri, Nov 20, 2015 at 06:17:20PM +0100, Phil Sutter wrote:
> This is rather a hack to expose the current issue with rhashtable to
> under high pressure sometimes return -ENOMEM even though system memory
> is not exhausted and a consecutive insert may succeed.
Please note that this pro
Hi Marc,
On 20 November 2015 09:49, Marc Zyngier wrote:
> On 18/11/15 18:01, Phil Edworthy wrote:
> > Hi Marc,
> >
> > On 16 November 2015 18:31, Marc Zyngier wrote:
> >> On 13/11/15 09:36, Phil Edworthy wrote:
> >
> >>> Since the stack t
iver
to be accessed, so using them from userspace is not as simple as with
padlock or AESNI. This was the reasoning behind the various cryptodev
implementations and af_alg. Using those to establish a TLS connection
with OpenSSL means to fetch encrypted data to userspace first and then
feed it to
; based on vbus and id signals read via gpios.
>
> >> Signed-off-by: Phil Edworthy
> >> ---
> >> arch/arm/boot/dts/r8a7791-koelsch.dts | 7 ---
> >> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> >> diff --git a/arch/arm/boot/dts/r8a7791-k
These changes allow a PHY driver to trigger a VBUS interrupt and
to provide the value of VBUS.
Signed-off-by: Phil Edworthy
---
v2:
- vbus variables changed from int to bool.
- dev_info() changed to dev_err()
---
drivers/usb/renesas_usbhs/common.h | 2 ++
drivers/usb/renesas_usbhs
.
Note: the R-Car USB PHY only allows this Host/Function switching
on channel 0.
This has been tested on a r8a7791 based Koelsch board, which uses
a MAX3355 device to supply vbus power when needed.
Signed-off-by: Phil Edworthy
---
Tested with patch "usb: renesas_usbhs: Allow an OTG PHY driv
301 - 400 of 731 matches
Mail list logo
