Oswald Buddenhagen wrote:
>
> > The problem with these things it that sometimes such a task may hold
> > a lock, which can prevent higher-priority tasks from running.
> >
> true ... three ideas:
> - a sort of temporary priority elevation (the opposite of SCHED_YIELD)
> as long as the process ho
D]>
CC: Zdenek Kabelac <[EMAIL PROTECTED]>, ludovic <[EMAIL PROTECTED]>
References: <[EMAIL PROTECTED]>
<[EMAIL PROTECTED]>
On Thu, Mar 08, 2001 at 12:24:41PM +, Alan Cox wrote:
> > > locking problem you mention but the idea of background low priority
> &g
Hello,
For hackers,
The following patch makes the kernel preemptable.
It is against 2.4.0-prerelease on for i386 only.
It should work for UP and SMP even though I
didn't validate it on SMP.
Comments are welcome.
NOTES: since the lock implementation is modified,
you need obviously to re-compile a
Daniel Phillips wrote:
>
> The key idea here is to disable preemption on spin lock and reenable on
> spin unlock. That's a practical idea, highly compatible with the
> current way of doing things. Its a fairly heavy hit on spinlock
> performance, but maybe the overall performance hit is small.
Hello Nigel,
Nigel Gamble wrote:
>
> Hi Ludo,
>
> I didn't realise you were still working on this. Did you know that
> I am also? Our most recent version is at:
>
> ftp://ftp.mvista.com/pub/Area51/preemptible_kernel/
>
I was on vacation and had a little time to kill...
Going through your READ
Roger Larsson wrote:
> On Thursday 04 January 2001 09:43, ludovic fernandez wrote:
>
> > I'm not convinced a full preemptive kernel is something
> > interesting mainly due to the context switch cost (actually mmu contex
> > switch).
>
> It will NOT be fully,
Nigel Gamble wrote:
> On Thu, 4 Jan 2001, ludovic fernandez wrote:
> > This is not the point I was trying to make .
> > So far we are talking about real time behaviour. This is a very
>interesting/exciting
> > thing and we all agree it's a huge task which g
george anzinger wrote:
> Roger Larsson wrote:
> >
>
> > This part can probably be put in a proper non inline function.
> > Cache issues...
> > +/*
> > +* At that point a scheduling is healthy iff:
> > +* - a scheduling request is pending.
> > +
works perfectly.
So, I wonder why the sk98lin driver is not up to date in the 2.6.x kernels ?
Cheers,
--
Ludovic DROLEZ Linbox / Free&ALter Soft
www.linbox.com www.linbox.org
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
to happen, for a 40GB restoration than for a 10GB one.
So less system calls to the DM/LVM2 layer seems to give less corruption
probability.
Any ideas ? Newer kernel releases could have fixed such a problem ?
--
Ludovic DROLEZ Linbox / Free&ALter Soft
http://lrs.
The USART device provides a fractional baud rate generator to get a more
accurate baud rate. It can be used only when the USART is configured in
'normal mode' and this feature is not available on AT91RM9200 SoC.
Signed-off-by: Ludovic Desroches
---
drivers/tty/serial/atmel_ser
On Mon, Aug 07, 2017 at 01:15:18PM +0530, Arvind Yadav wrote:
> Replace '%d' by '%zu' to fix the compilation warning:-
>"format ‘%d’ expects argument of type ‘int’,but argument has type ‘size_t’
> [-Wformat=]"
>
> Signed-off-by: Arvin
On Mon, Aug 07, 2017 at 01:15:19PM +0530, Arvind Yadav wrote:
> clk_prepare_enable() can fail here and we must check its return value.
>
> Signed-off-by: Arvind Yadav
Acked-by: Ludovic Desroches
Thanks
> ---
> drivers/dma/at_xdmac.c | 5 -
> 1 file changed, 4 inserti
ff-by: Quentin Schulz
Acked-by: Ludovic Desroches
Thanks
> ---
> drivers/mmc/host/sdhci-of-at91.c | 147
> ++-
> 1 file changed, 82 insertions(+), 65 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-of-at91.c
> b/drivers/mmc/host/s
ce VDD core has been shut down
> when entering deepest state on the SAMA5D2. The clocks need to be
> reconfigured as well.
>
> The other registers and init process are taken care of by the SDHCI
> core.
>
> Signed-off-by: Quentin Schulz
Acked-by: Ludovic Desroches
>
_suspended)
> >> + return ret;
> >
> > Suspending while runtime suspended seems like a bad idea. Have you
> > considered just adding sdhci_at91_set_clks_presets() to
> > sdhci_at91_runtime_resume()?
> >
>
> Adding sdhci_at91_se
e the transfer to PIO does it behave ? Does the controller in
> > fact need to siwtch to PIO for SMBUS ?
>
> Like, what if I disable DMA?
>
> I saw no way to do that, short of short-cutting a few things in the
> driver code. So, did that and I cannot tickle the bug. But I don&
to kernel coding, I really would like to hear your
> comments on this patchset.
IMO, it sounds pretty good.
Regards
Ludovic
>
> [1] https://marc.info/?t=15082400481&r=1&w=1
> [2] https://www.kernel.org/doc/Documentation/i2c/slave-interface
>
> Juergen Fitschen (4):
esp. init
> function instead of the master mode functions after the shared general
> code has been executed.
>
> This concept has been influenced by the i2c-designware driver.
>
> Signed-off-by: Juergen Fitschen
Acked-by: Ludovic Desroches
> ---
> d
> The code itself hasn't been touched. Shared functions only had to be made
> non-static. Furthermore, includes have been cleaned up.
>
> Signed-off-by: Juergen Fitschen
Acked-by: Ludovic Desroches
> ---
> MAINTAINERS |3 +-
> drive
On Fri, Oct 27, 2017 at 05:12:17PM +0200, Juergen Fitschen wrote:
> Some AT91 hardware has no slave mode included or only limited features
> (i.e. no fifos).
>
I am wondering if it won't be better to squash this patch into the
previous one:
Without it, it seems that we can set slave_detected for
+
> +int at91_twi_probe_slave(struct platform_device *pdev,
> + u32 phy_addr, struct at91_twi_dev *dev)
> +{
> + int rc;
> +
> + rc = devm_request_irq(&pdev->dev, dev->irq, atmel_twi_interrupt_slave,
> + 0, dev_n
Hi Peter,
On Wed, Oct 25, 2017 at 11:40:50PM +0200, Peter Rosin wrote:
> Hi Ludovic,
>
> On 2017-10-17 09:58, Ludovic Desroches wrote:
> > Hi Peter,
> >
> > On Fri, Oct 13, 2017 at 05:01:04PM +0200, Peter Rosin wrote:
> >> On 2017-10-13 15:29, Alan Cox wrote
Hi Dmitry,
On Mon, Oct 30, 2017 at 04:06:58PM -0700, Dmitry Torokhov wrote:
> Hi Ludovic,
>
> On Fri, Oct 20, 2017 at 03:31:17PM +0200, Ludovic Desroches wrote:
> > Add description of the Atmel PTC subsystem bindings.
> >
> > Signed-off-by: Ludovic Desroches
Hi Dmitry,
On Mon, Oct 30, 2017 at 04:30:41PM -0700, Dmitry Torokhov wrote:
> Hi Ludovic,
>
> On Fri, Oct 20, 2017 at 03:31:18PM +0200, Ludovic Desroches wrote:
> > The Atmel Peripheral Touch Controller subsystem offers built-in hardware
> > for capacitive touch measur
On Wed, Nov 01, 2017 at 12:16:36PM +0100, Juergen Fitschen wrote:
> Hello Ludovic,
>
> Thank you very much for your feedback!
>
> On Tue, Oct 31, 2017 at 04:22:50PM +0100, Ludovic Desroches wrote:
> > On Fri, Oct 27, 2017 at 05:12:17PM +0200, Juergen Fitschen wrote:
> &g
On Wed, Nov 01, 2017 at 02:04:18PM +0100, Juergen Fitschen wrote:
> Helle Ludovic,
>
> while going through this patch a question related to the Atmel / Microchip HW
> came into mind:
>
> On Fri, Oct 27, 2017 at 05:12:00PM +0200, Juergen Fitschen wrote:
> > diff --git
From: Ludovic Barre
This patch adds support of external interrupt (exti)
for stm32h743.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32h743.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
index
From: Ludovic Barre
Move irq_set_wake on interrupt mask, needed to wake up from
low power mode as the event mask is not able to do so.
Signed-off-by: Ludovic Barre
---
drivers/irqchip/irq-stm32-exti.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers
From: Ludovic Barre
This series adds:
-Management of multi-bank of external interrupts
stm32h7 has up to 96 inputs (3 banks of 32 inputs).
-Fix initial value after cold/hot boot (wakeup issue).
Changes v2:
-Remove irq_mask and adds const on struct stm32_exti_bank
-Add wrapper functions pending
From: Ludovic Barre
-Prepare to manage multi-bank of external interrupts
(N banks of 32 inputs).
-Prepare to manage registers offsets by compatible
(registers offsets could be different follow per stm32 platform).
Signed-off-by: Ludovic Barre
---
drivers/irqchip/irq-stm32-exti.c | 151
From: Ludovic Barre
-After cold boot, imr default value depends on hardware configuration.
-After hot reboot the registers must be cleared to avoid residue.
Signed-off-by: Ludovic Barre
---
drivers/irqchip/irq-stm32-exti.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers
From: Ludovic Barre
This patch adds support of external interrupt (exti) on
all gpio ports of stm32h743.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32h743-pinctrl.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/stm32h743
From: Ludovic Barre
This patch adds system config support for stm32h743.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32h743.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
index 6b2fb4c..b17aa5c 100644
From: Ludovic Barre
This patch updates stm32-exti documentation with stm32h7-exti
compatible string.
Signed-off-by: Ludovic Barre
---
.../devicetree/bindings/interrupt-controller/st,stm32-exti.txt| 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
a/Documentation
From: Ludovic Barre
stm32h7 has up to 96 inputs
(3 banks of 32 inputs max).
Signed-off-by: Ludovic Barre
---
drivers/irqchip/irq-stm32-exti.c | 42
1 file changed, 42 insertions(+)
diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq
From: Ludovic Barre
This patch adds GENERIC_IRQ_CHIP to stm32 exti
config.
Signed-off-by: Ludovic Barre
---
drivers/irqchip/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 9d8a1dd..c067aae 100644
--- a/drivers/irqchip/Kconfig
From: Ludovic Barre
This series adds:
-Fix: to avoid compilation warning with older compiler
versions such as gcc-4.6.
This topic has been discussed on 2 threads with Geert and Arnd
https://lkml.org/lkml/2017/9/15/70
https://www.spinics.net/lists/arm-kernel/msg606269.html
-Fix: abort prefetching
From: Ludovic Barre
-Change the license text with long template.
-Change Copyright to STMicroelectronics.
Signed-off-by: Ludovic Barre
---
drivers/mtd/spi-nor/stm32-quadspi.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi-nor/stm32
.
Fixes: 0d43d7ab277a048c ("mtd: spi-nor: add driver for STM32 quad spi flash
controller")
Signed-off-by: Geert Uytterhoeven
Acked-by: Ludovic Barre
Signed-off-by: Ludovic Barre
---
drivers/mtd/spi-nor/stm32-quadspi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/d
From: Ludovic Barre
When memory-mapped mode is used, a prefetching mechanism fully
managed by the hardware allows to optimize the read from external
the QSPI memory. A 32-bytes FIFO is used for prefetching.
When the limit of flash size - fifo size is reached the prefetching
mechanism tries to
From: Ludovic Barre
When memory-mapped mode is used, a prefetching mechanism fully
managed by the hardware allows to optimize the read from external
the QSPI memory. A 32-bytes FIFO is used for prefetching.
When the limit of flash size - fifo size is reached the prefetching
mechanism tries to
From: Ludovic Barre
This series adds:
-Fix: to avoid compilation warning with older compiler
versions such as gcc-4.6.
This topic has been discussed on 2 threads with Geert and Arnd
https://lkml.org/lkml/2017/9/15/70
https://www.spinics.net/lists/arm-kernel/msg606269.html
-Fix: abort prefetching
From: Ludovic Barre
-Change the license text with long template.
-Change Copyright to STMicroelectronics.
Signed-off-by: Ludovic Barre
---
drivers/mtd/spi-nor/stm32-quadspi.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi-nor/stm32
.
Fixes: 0d43d7ab277a048c ("mtd: spi-nor: add driver for STM32 quad spi flash
controller")
Signed-off-by: Geert Uytterhoeven
Acked-by: Ludovic Barre
Signed-off-by: Ludovic Barre
---
drivers/mtd/spi-nor/stm32-quadspi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/d
Hi Juergen,
On Wed, Nov 01, 2017 at 12:16:36PM +0100, Juergen Fitschen wrote:
> Hello Ludovic,
>
> Thank you very much for your feedback!
>
> On Tue, Oct 31, 2017 at 04:22:50PM +0100, Ludovic Desroches wrote:
> > On Fri, Oct 27, 2017 at 05:12:17PM +0200, Juergen Fitschen w
On Fri, Nov 03, 2017 at 03:07:32PM +0100, Juergen Fitschen wrote:
> Hello Ludovic,
>
> On Fri, Nov 03, 2017 at 09:46:02AM +0100, Ludovic Desroches wrote:
> > > > > diff --git a/drivers/i2c/busses/i2c-at91.h
> > > > > b/drivers/i2c/busses/i2c-at91.h
From: Ludovic Barre
This patch updates stm32-exti documentation with stm32h7-exti
compatible string.
Signed-off-by: Ludovic Barre
Acked-by: Rob Herring
---
.../devicetree/bindings/interrupt-controller/st,stm32-exti.txt| 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff
From: Ludovic Barre
-Prepare to manage multi-bank of external interrupts
(N banks of 32 inputs).
-Prepare to manage registers offsets by compatible
(registers offsets could be different follow per stm32 platform).
Signed-off-by: Ludovic Barre
---
drivers/irqchip/irq-stm32-exti.c | 149
From: Ludovic Barre
This patch adds system config support for stm32h743.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32h743.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
index 6b2fb4c..b17aa5c 100644
From: Ludovic Barre
This patch adds support of external interrupt (exti) on
all gpio ports of stm32h743.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32h743-pinctrl.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/stm32h743
From: Ludovic Barre
This patch adds GENERIC_IRQ_CHIP to stm32 exti
config.
Signed-off-by: Ludovic Barre
---
drivers/irqchip/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index 9d8a1dd..c067aae 100644
--- a/drivers/irqchip/Kconfig
From: Ludovic Barre
stm32h7 has up to 96 inputs
(3 banks of 32 inputs max).
Signed-off-by: Ludovic Barre
---
drivers/irqchip/irq-stm32-exti.c | 42
1 file changed, 42 insertions(+)
diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq
From: Ludovic Barre
-After cold boot, imr default value depends on hardware configuration.
-After hot reboot the registers must be cleared to avoid residue.
Signed-off-by: Ludovic Barre
---
drivers/irqchip/irq-stm32-exti.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers
From: Ludovic Barre
This patch adds support of external interrupt (exti)
for stm32h743.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32h743.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
index
From: Ludovic Barre
Move irq_set_wake on interrupt mask, needed to wake up from
low power mode as the event mask is not able to do so.
Signed-off-by: Ludovic Barre
---
drivers/irqchip/irq-stm32-exti.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers
From: Ludovic Barre
This series adds:
-Management of multi-bank of external interrupts
stm32h7 has up to 96 inputs (3 banks of 32 inputs).
-Fix initial value after cold/hot boot (wakeup issue).
Changes v3:
-remove chip.name and handler, already done by
irq_alloc_domain_generic_chips
-add Rob
Hi Julien
thank for your review
On 10/26/2017 04:36 PM, Julien Thierry wrote:
Hi Ludovic,
On 25/10/17 18:10, Ludovic Barre wrote:
From: Ludovic Barre
-Prepare to manage multi-bank of external interrupts
(N banks of 32 inputs).
-Prepare to manage registers offsets by compatible
(registers
thanks Cyrille
indeed, the "Signed-off" on Geert'commit was a mistake
BR
Ludo
On 10/29/2017 06:50 PM, Cyrille Pitchen wrote:
Hi Ludovic,
Le 26/10/2017 à 17:12, Ludovic Barre a écrit :
From: Geert Uytterhoeven
With gcc 4.1.2:
drivers/mtd/spi-nor/stm32-quadspi
ehaves just
> as newer kernels, i.e. equally bad. The patch doesn't revert cleanly, but
> reverting the patch and quick-n-dirty-fixing the conflict on vanilla 4.2
> makes the problem go away.
>
> I have attached what I actually reverted.
>
> Cheers,
> Peter
>
Ludo
On Thu, Oct 08, 2015 at 08:01:23PM +0200, Ulf Hansson wrote:
> +Russell
>
> On 17 September 2015 at 10:16, Ludovic Desroches
> wrote:
> > The Atmel sdhci device needs a new quirk. sdhci_set_clock set the Clock
> > Control Register to 0 before computing the new valu
eter Rosin
Signed-off-by: Ludovic Desroches
Cc: sta...@vger.kernel.org #4.1
---
drivers/i2c/busses/i2c-at91.c | 58 +--
1 file changed, 50 insertions(+), 8 deletions(-)
diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c
index 1c758c
On Tue, Oct 13, 2015 at 08:01:34PM +0200, Peter Rosin wrote:
> On 2015-10-13 18:47, Cyrille Pitchen wrote:
> > Le 13/10/2015 17:19, Peter Rosin a écrit :
> >> On 2015-10-13 16:21, Ludovic Desroches wrote:
> >>> From: Cyrille Pitchen
> >>>
> >>>
Add (read help!) to DEBUG_AT91_UART prompt. It is not obvious there are
such useful information to set DEBUG_UART_PHYS.
Signed-off-by: Ludovic Desroches
---
arch/arm/Kconfig.debug | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
Add sdmmc and flexcom devices
Signed-off-by: Ludovic Desroches
Signed-off-by: Cyrille Pitchen
---
arch/arm/boot/dts/at91-sama5d2_xplained.dts | 106
1 file changed, 106 insertions(+)
diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
b/arch/arm/boot/dts
Big update of the sama5d2.dtsi file since many patches have reached te
mainline:
- add generated clocks
- enable crypto devices
- add flexcom devices
- add tdes device
- add sdmmc devices
Signed-off-by: Ludovic Desroches
Signed-off-by: Nicolas Ferre
Signed-off-by: Cyrille Pitchen
---
arch/arm
Add SAMA5D2 SoC plus Atmel flexcom and Atmel sdhci devices.
Signed-off-by: Ludovic Desroches
---
arch/arm/configs/sama5_defconfig | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig
index 31eb951..6e806f5
Hi Sascha,
Any comments about this version? Maybe you missed it since you answered
me on the RFC version. Of course I'll do the changes you requested for
the next version (remove gpio_request_*() stuff and add macros for gpio
muxing case).
Thanks
Ludovic
On Tue, Aug 11, 2015 at 10:28
On Thu, Oct 15, 2015 at 03:24:51PM +0200, Alexandre Belloni wrote:
> Hi,
>
> On 14/10/2015 at 14:11:24 +0200, Ludovic Desroches wrote :
> > Add SAMA5D2 SoC plus Atmel flexcom and Atmel sdhci devices.
> >
> > Signed-off-by: Ludovic Desroches
> > ---
> >
On Thu, Oct 15, 2015 at 04:04:45PM +0200, Alexandre Belloni wrote:
> On 14/10/2015 at 09:24:42 +0200, Ludovic Desroches wrote :
> > Add (read help!) to DEBUG_AT91_UART prompt. It is not obvious there are
> > such useful information to set DEBUG_UART_PHYS.
> >
> > Signe
On Thu, Oct 15, 2015 at 05:42:53PM +0200, Nicolas Ferre wrote:
> Le 15/10/2015 17:31, Ludovic Desroches a écrit :
> > On Thu, Oct 15, 2015 at 03:24:51PM +0200, Alexandre Belloni wrote:
> >> Hi,
> >>
> >> On 14/10/2015 at 14:11:24 +0200, Ludovic Desroches wrot
Hi,
This set of patches enables several devices for the freshly introduced SAMA5D2
SoC. dts and defconfig files are updated to enable SAMA5D2 and its new devices
such as Flexcom and AT91 SDHCI.
Changes:
- v2:
- update whole Atmel defconfigs
- update multi_v7_defconfig
Ludovic Desroches (8
Add sdmmc and flexcom devices
Signed-off-by: Ludovic Desroches
Signed-off-by: Cyrille Pitchen
---
arch/arm/boot/dts/at91-sama5d2_xplained.dts | 106
1 file changed, 106 insertions(+)
diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
b/arch/arm/boot/dts
Big update of the sama5d2.dtsi file since many patches have reached te
mainline:
- add generated clocks
- enable crypto devices
- add flexcom devices
- add tdes device
- add sdmmc devices
Signed-off-by: Ludovic Desroches
Signed-off-by: Nicolas Ferre
Signed-off-by: Cyrille Pitchen
---
arch/arm
Trivial savedefconfig update.
Signed-off-by: Ludovic Desroches
---
arch/arm/configs/at91_dt_defconfig | 15 ---
1 file changed, 15 deletions(-)
diff --git a/arch/arm/configs/at91_dt_defconfig
b/arch/arm/configs/at91_dt_defconfig
index 090c5b2..1b1e5ac 100644
--- a/arch/arm/configs
Trivial savedefconfig update.
Signed-off-by: Ludovic Desroches
---
arch/arm/configs/sama5_defconfig | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig
index 31eb951..3b2f686 100644
--- a/arch/arm
Add SAMA5D2 SoC plus Atmel flexcom and Atmel sdhci devices.
Signed-off-by: Ludovic Desroches
---
arch/arm/configs/sama5_defconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig
index 3b2f686..a0c57ac 100644
--- a/arch
The Flexcom device has been introduced with Atmel SAMA5D2 SoC.
Signed-off-by: Ludovic Desroches
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index 63703fa..6dcc048 100644
Add Atmel SAMA5D2 SoC family to multi_v7 image.
Signed-off-by: Ludovic Desroches
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index bf099b7..63703fa 100644
--- a/arch/arm
The AT91 SDHCI device has been introduced with Atmel SAMA5D2 SoC.
Signed-off-by: Ludovic Desroches
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index 6dcc048..844e921 100644
Add suspend and resume PM ops.
Signed-off-by: Ludovic Desroches
---
drivers/mmc/host/sdhci-of-at91.c | 55 +++-
1 file changed, 54 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci-of-at91.c b/drivers/mmc/host/sdhci-of-at91.c
index 06d0b50
On Wed, Oct 21, 2015 at 09:42:40AM +0200, Peter Rosin wrote:
> On 2015-10-21 09:21, Peter Rosin wrote:
> > On 2015-10-20 15:27, Ludovic Desroches wrote:
> >> On Mon, Oct 19, 2015 at 12:49:03PM +0200, Peter Rosin wrote:
> >>> On 2015-10-19 10:51, Ludovic De
eter Rosin
Signed-off-by: Ludovic Desroches
Tested-by: Peter Rosin
Cc: sta...@vger.kernel.org #4.1
---
drivers/i2c/busses/i2c-at91.c | 58 +--
1 file changed, 50 insertions(+), 8 deletions(-)
diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/
-off-by: Ludovic Desroches
Fixes: 93563a6a71bb ("i2c: at91: fix a race condition when using the DMA
controller")
Reported-by: Peter Rosin
Tested-by: Peter Rosin
Cc: sta...@vger.kernel.org #4.1
---
drivers/i2c/busses/i2c-at91.c | 33 +
1 file changed, 25
Hi Peter,
On Fri, Oct 16, 2015 at 11:08:42AM +0200, Peter Rosin wrote:
> On 2015-10-16 01:47, Peter Rosin wrote:
> > On 2015-10-14 07:43, Ludovic Desroches wrote:
> >> On Tue, Oct 13, 2015 at 08:01:34PM +0200, Peter Rosin wrote:
> >>> On 2015-10-13 18:47, Cyrille
On Fri, Oct 16, 2015 at 06:33:44PM +0200, Ulf Hansson wrote:
> On 16 October 2015 at 17:01, Ludovic Desroches
> wrote:
> > Add suspend and resume PM ops.
> >
> > Signed-off-by: Ludovic Desroches
>
> I have no problem with this patch, nice and easy.
>
> Alt
On Mon, Oct 19, 2015 at 12:49:03PM +0200, Peter Rosin wrote:
> On 2015-10-19 10:51, Ludovic Desroches wrote:
> > Hi Peter,
> >
> > On Fri, Oct 16, 2015 at 11:08:42AM +0200, Peter Rosin wrote:
> >> On 2015-10-16 01:47, Peter Rosin wrote:
> >>> On
-off-by: Ludovic Desroches
Fixes: 93563a6a71bb ("i2c: at91: fix a race condition when using the DMA
controller")
Reported-by: Peter Rosin
Tested-by: Peter Rosin
Cc: sta...@vger.kernel.org #4.1
---
Changes from v2:
- fix smatch warning: variable 'sr' set but not used
drivers
eturn ...;
> )
>...
> }
> //
>
> Signed-off-by: Julia Lawall
Acked-by: Ludovic Desroches
>
> ---
> drivers/pinctrl/pinctrl-at91.c |5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pinctrl/pinctrl-at91.c b/drive
On Wed, Sep 30, 2015 at 06:11:01PM +0200, Alexandre Belloni wrote:
> From: Boris Brezillon
>
> Only enable available IRQs in case writing to a reserved bit has an armful
> effect.
You probably mean disable instead of enable and s/armful/harmful.
>
> Signed-off-by: Boris Brezillon
> Signed-off
inux-next I discovered that some
> adaptations were missing. So, I don't know if you were aware but here
> are my fixes in case you don't have them already.
>
> +Cc: Thomas and Stephen in case these errors happen while building
> linux-next...
Yes it happens, fixes sent
Hi Richard,
On Fri, Jul 27, 2018 at 04:39:17PM +0200, Richard Genoud wrote:
> Hi Ludovic,
>
> On 19/07/2018 10:47, Ludovic Desroches wrote:
> > From: Nicolas Ferre
> >
> > When mode is set in atmel_config_iso7816() we backup last RS232 mode
> > for comi
Hi,
This patchset adds support for the ISO7816 standard. The USART devices in
Microchip SoCs have an ISO7816 mode. It allows to let the USART managing
the CLK and I/O signals of a smart card.
Changes:
- v3
- add IOCTLs to parisc arch.
- rework atmel_config_iso7816 according to the comments by
, add check on fidi ratio, checkpatch
fixes]
Signed-off-by: Ludovic Desroches
---
drivers/tty/serial/atmel_serial.c | 211 +++---
drivers/tty/serial/atmel_serial.h | 6 +-
2 files changed, 201 insertions(+), 16 deletions(-)
diff --git a/drivers/tty/serial
: Ludovic Desroches
---
arch/alpha/include/uapi/asm/ioctls.h | 2 ++
arch/mips/include/uapi/asm/ioctls.h| 2 ++
arch/parisc/include/uapi/asm/ioctls.h | 2 ++
arch/powerpc/include/uapi/asm/ioctls.h | 2 ++
arch/sh/include/uapi/asm/ioctls.h | 2 ++
arch/sparc/include/uapi/asm/ioctls.h
On 06/20/2018 03:29 PM, Guenter Roeck wrote:
On 06/20/2018 06:24 AM, Ludovic BARRE wrote:
On 06/20/2018 11:19 AM, Guenter Roeck wrote:
On 06/20/2018 12:53 AM, Ludovic Barre wrote:
From: Ludovic Barre
This patch adds config data to manage specific properties by
compatible. Adds stm32mp1
From: Ludovic Barre
This patch adds independent watchdog support for stm32mp157c.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32mp157c.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
index
From: Ludovic Barre
This patch adds config data to manage specific properties by
compatible. Adds stm32mp1 config which requires pclk clock.
Signed-off-by: Ludovic Barre
---
.../devicetree/bindings/watchdog/st,stm32-iwdg.txt | 21 +++-
drivers/watchdog/stm32_iwdg.c | 116
From: Ludovic Barre
This patch activates independent watchdog support for
stm32mp157c board.
Signed-off-by: Ludovic Barre
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts
b/arch/arm/boot/dts/stm32mp157c
From: Ludovic Barre
This patch series updates stm32_iwdg driver to manage config
by compatible. stm32mp1 config requires a pclk clock.
v3:
-remove stm32_iwdg_config structure, just assign the
boolean directly to .dat
Ludovic Barre (3):
watchdog: stm32: add pclk feature for stm32mp1
ARM
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