[Patch] vmbus: Simply hv_get_next_write_location() function

From: Tianyu Lan The "next" variable is redundant in hv_get_next_write_location(). This patch is to remove it and return write_index directly. Signed-off-by: Tianyu Lan --- drivers/hv/ring_buffer.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/hv/ring_buffer.c

[PATCH v2] vmbus/ring_buffer: remove some redundant helper function.

From: Tianyu Lan Some hv_get/set** helper functions in ring_buffer code are only called once or not used. This patch is to clear up these codes. Signed-off-by: Tianyu Lan --- Change since v1: Clear up more hv_get/set** functions. --- drivers/hv/ring_buffer.c | 49 --

[PATCH V2 1/2] KVM/VMX: Check ept_pointer before flushing ept tlb

From: Lan Tianyu This patch is to initialize ept_pointer to INVALID_PAGE and check it before flushing ept tlb. If ept_pointer is invalid, bypass the flush request. Signed-off-by: Lan Tianyu --- arch/x86/kvm/vmx.c | 13 +++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git

[PATCH V2 2/2] KVM/VMX: Fix max line length problem in the vmx_hv_remote_flush_tlb()

From: Lan Tianyu Fix max line length problem. Signed-off-by: Lan Tianyu --- arch/x86/kvm/vmx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 6577ec8cbb0f..2356118ea440 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @

[Resend PATCH V5 8/10] KVM/MMU: Move tlb flush in kvm_set_pte_rmapp() to kvm_mmu_notifier_change_pte()

From: Lan Tianyu This patch is to move tlb flush in kvm_set_pte_rmapp() to kvm_mmu_notifier_change_pte() in order to avoid redundant tlb flush. Signed-off-by: Lan Tianyu --- arch/x86/kvm/mmu.c | 8 ++-- virt/kvm/kvm_main.c | 5 - 2 files changed, 6 insertions(+), 7 deletions(-) diff

[Resend PATCH V5 9/10] KVM/MMU: Flush tlb directly in the kvm_set_pte_rmapp()

From: Lan Tianyu This patch is to flush tlb directly in the kvm_set_pte_rmapp() and return 0. Signed-off-by: Lan Tianyu --- arch/x86/kvm/mmu.c | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index 3b0f60e88f54..64bd848f021e 100644 --- a/arch/x86

[Resend PATCH V5 10/10] KVM/MMU: Flush tlb directly in the kvm_zap_gfn_range()

From: Lan Tianyu Originally, flush tlb is done by slot_handle_level_range(). This patch is to flush tlb directly in the kvm_zap_gfn_range() when range flush is available. Signed-off-by: Lan Tianyu --- Change since v4: Move operation of setting flush_tlb out of for loop. --- arch/x86/kv

[Resend PATCH V5 7/10] KVM: Make kvm_set_spte_hva() return int

From: Lan Tianyu The patch is to make kvm_set_spte_hva() return int and caller can check return value to determine flush tlb or not. Signed-off-by: Lan Tianyu --- arch/arm/include/asm/kvm_host.h | 2 +- arch/arm64/include/asm/kvm_host.h | 2 +- arch/mips/include/asm/kvm_host.h| 2 +-

[Resend PATCH V5 6/10] KVM: Replace old tlb flush function with new one to flush a specified range.

From: Lan Tianyu This patch is to replace kvm_flush_remote_tlbs() with kvm_flush_ remote_tlbs_with_address() in some functions without logic change. Signed-off-by: Lan Tianyu --- arch/x86/kvm/mmu.c | 31 +-- arch/x86/kvm/paging_tmpl.h | 3 ++- 2 files chang

[Resend PATCH V5 2/10] x86/hyper-v: Add HvFlushGuestAddressList hypercall support

From: Lan Tianyu Hyper-V provides HvFlushGuestAddressList() hypercall to flush EPT tlb with specified ranges. This patch is to add the hypercall support. Reviewed-by: Michael Kelley Signed-off-by: Lan Tianyu --- Change sincd v4: - Expose function hyperv_fill_flush_guest_mapping_list()

[Resend PATCH V5 0/10] x86/KVM/Hyper-v: Add HV ept tlb range flush hypercall support in KVM

From: Lan Tianyu For nested memory virtualization, Hyper-v doesn't set write-protect L1 hypervisor EPT page directory and page table node to track changes while it relies on guest to tell it changes via HvFlushGuestAddressLlist hypercall. HvFlushGuestAddressLlist hypercall provides a way to flus

[Resend PATCH V5 1/10] KVM: Add tlb_remote_flush_with_range callback in kvm_x86_ops

From: Lan Tianyu Add flush range call back in the kvm_x86_ops and platform can use it to register its associated function. The parameter "kvm_tlb_range" accepts a single range and flush list which contains a list of ranges. Signed-off-by: Lan Tianyu --- Change since v1: Change "end_gfn"

[Resend PATCH V5 3/10] x86/Hyper-v: Add trace in the hyperv_nested_flush_guest_mapping_range()

From: Lan Tianyu This patch is to trace log in the hyperv_nested_flush_ guest_mapping_range(). Signed-off-by: Lan Tianyu --- arch/x86/hyperv/nested.c| 1 + arch/x86/include/asm/trace/hyperv.h | 14 ++ 2 files changed, 15 insertions(+) diff --git a/arch/x86/hyperv/nest

[Resend PATCH V5 4/10] KVM/VMX: Add hv tlb range flush support

From: Lan Tianyu This patch is to register tlb_remote_flush_with_range callback with hv tlb range flush interface. Signed-off-by: Lan Tianyu --- Change since v4: - Use new function kvm_fill_hv_flush_list_func() to fill flush request. Change since v3: - Merge Vitaly's don'

[Resend PATCH V5 5/10] KVM/MMU: Add tlb flush with range helper function

From: Lan Tianyu This patch is to add wrapper functions for tlb_remote_flush_with_range callback and flush tlb directly in kvm_mmu_zap_collapsible_spte(). kvm_mmu_zap_collapsible_spte() returns flush request to the slot_handle_leaf() and the latter does flush on demand. When range flush is availa

[PATCH] KVM/VMX: Avoid return error when flush tlb successfully in the hv_remote_flush_tlb_with_range()

From: Lan Tianyu The "ret" is initialized to be ENOTSUPP. The return value of __hv_remote_flush_tlb_with_range() will be Or with "ret" when ept table potiners are mismatched. This will cause return ENOTSUPP even if flush tlb successfully. This patch is to fix the issue and set "ret" to 0. Fix: a

[PATCH 00/11] X86/KVM/Hyper-V: Add HV ept tlb range list flush support in KVM

From: Lan Tianyu This patchset is to introduce hv ept tlb range list flush function support in the KVM MMU component. Flushing ept tlbs of several address range can be done via single hypercall and new list flush function is used in the kvm_mmu_commit_zap_page() and FNAME(sync_page). This patchse

[PATCH 1/11] X86/Hyper-V: Add parameter offset for hyperv_fill_flush_guest_mapping_list()

From: Lan Tianyu Add parameter offset to specify start position to add flush ranges in guest address list of struct hv_guest_mapping_flush_list. Signed-off-by: Lan Tianyu --- arch/x86/hyperv/nested.c| 4 ++-- arch/x86/include/asm/mshyperv.h | 2 +- arch/x86/kvm/vmx/vmx.c | 2 +

[PATCH 2/11] KVM/VMX: Fill range list in kvm_fill_hv_flush_list_func()

From: Lan Tianyu Populate ranges on the flush list into struct hv_guest_mapping_flush_list when flush list is available in the struct kvm_tlb_range. Signed-off-by: Lan Tianyu --- arch/x86/kvm/vmx/vmx.c | 18 -- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/arch

[PATCH 6/11] KVM/MMU: Flush tlb with range list in sync_page()

From: Lan Tianyu This patch is to flush tlb via flush list function. Signed-off-by: Lan Tianyu --- arch/x86/kvm/paging_tmpl.h | 16 ++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h index 833e8855bbc9..866ccd

[PATCH 4/11] KVM/MMU: Introduce tlb flush with range list

From: Lan Tianyu This patch is to introduce tlb flush with range list interface and use struct kvm_mmu_page as list entry. Use flush list function in the kvm_mmu_commit_zap_page(). Signed-off-by: Lan Tianyu --- arch/x86/include/asm/kvm_host.h | 7 +++ arch/x86/kvm/mmu.c | 24

[PATCH 3/11] KVM: Add spte's point in the struct kvm_mmu_page

From: Lan Tianyu It's necessary to check whether mmu page is last or large page when add mmu page into flush list. "spte" is needed for such check and so add spte point in the struct kvm_mmu_page. Signed-off-by: Lan Tianyu --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/mmu.c

[PATCH 10/11] KVM: Add flush parameter for kvm_age_hva()

From: Lan Tianyu This patch is to add flush parameter for kvm_aga_hva() and inside code can check whether tlb flush is necessary when associated sptes are changed. The platform may just flush affected address tlbs instead of entire table's. Signed-off-by: Lan Tianyu --- arch/arm/include/asm/kv

[PATCH 9/11] KVM/MMU: Flush tlb in the kvm_mmu_write_protect_pt_masked()

From: Lan Tianyu This patch is to flush tlb in the kvm_mmu_write_protect_pt_masked() when tlb range flush is available and make kvm_mmu_write_protect_pt_masked() return flush request. Signed-off-by: Lan Tianyu --- arch/x86/kvm/mmu.c | 25 ++--- 1 file changed, 18 insertions

[PATCH 5/11] KVM/MMU: Flush tlb directly in the kvm_mmu_slot_gfn_write_protect()

From: Lan Tianyu This patch is to flush tlb directly in the kvm_mmu_slot_gfn_write_protect() when range flush is available. Signed-off-by: Lan Tianyu --- arch/x86/kvm/mmu.c | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index d3272c5066ea..6d4f

[PATCH 7/11] KVM: Remove redundant check in the kvm_get_dirty_log_protect()

From: Lan Tianyu The dirty bits have already been checked in the previous check of "dirty_bitmap" and mask must be non-zero value at this point. Signed-off-by: Lan Tianyu --- virt/kvm/kvm_main.c | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/virt/kvm/kvm_main.c b/v

[PATCH 11/11] KVM/MMU: Flush tlb in the kvm_age_rmapp()

From: Lan Tianyu This patch is to flush tlb in the kvm_age_rmapp() when tlb range flush is available and flush request is true. Signed-off-by: Lan Tianyu --- arch/x86/kvm/mmu.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index a5728f51bf7d

[PATCH 8/11] KVM: Make kvm_arch_mmu_enable_log_dirty_pt_masked() return value

From: Lan Tianyu This patch is to make kvm_arch_mmu_enable_log_dirty_pt_masked() return value and caller can use it to determine whether tlb flush is necessary. kvm_get_dirty_log_protect() and kvm_clear_dirty_log_protect() use the return value of kvm_arch_mmu_enable_log_dirty_pt_masked() to popul

[Resend PATCH V5 10/10] KVM/MMU: Flush tlb directly in the kvm_zap_gfn_range()

From: Lan Tianyu Originally, flush tlb is done by slot_handle_level_range(). This patch is to flush tlb directly in the kvm_zap_gfn_range() when range flush is available. Signed-off-by: Lan Tianyu --- Change since v4: Move operation of setting flush_tlb out of for loop. --- arch/x86/kv

[Resend PATCH V5 9/10] KVM/MMU: Flush tlb directly in the kvm_set_pte_rmapp()

From: Lan Tianyu This patch is to flush tlb directly in the kvm_set_pte_rmapp() and return 0. Signed-off-by: Lan Tianyu --- arch/x86/kvm/mmu.c | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index b13b419166c4..39e0e2572710 100644 --- a/arch/x86

[Resend PATCH V5 8/10] KVM/MMU: Move tlb flush in kvm_set_pte_rmapp() to kvm_mmu_notifier_change_pte()

From: Lan Tianyu This patch is to move tlb flush in kvm_set_pte_rmapp() to kvm_mmu_notifier_change_pte() in order to avoid redundant tlb flush. Signed-off-by: Lan Tianyu --- arch/x86/kvm/mmu.c | 8 ++-- virt/kvm/kvm_main.c | 5 - 2 files changed, 6 insertions(+), 7 deletions(-) diff

[PATCH V4 11/15] KVM/MMU: Replace tlb flush function with range list flush function

From: Lan Tianyu This patch is to use range list flush function in the mmu_sync_children(), kvm_mmu_commit_zap_page() and FNAME(sync_page)(). Signed-off-by: Lan Tianyu --- arch/x86/kvm/mmu.c | 26 +++--- arch/x86/kvm/paging_tmpl.h | 5 - 2 files changed, 27 ins

[PATCH V4 2/15] KVM/MMU: Add tlb flush with range helper function

From: Lan Tianyu This patch is to add wrapper functions for tlb_remote_flush_with_range callback. Signed-off-by: Lan Tianyu --- Change sicne V3: Remove code of updating "tlbs_dirty" Change since V2: Fix comment in the kvm_flush_remote_tlbs_with_range() --- arch/x86/kvm/mmu.c | 40

[PATCH V4 5/15] KVM/MMU: Move tlb flush in kvm_set_pte_rmapp() to kvm_mmu_notifier_change_pte()

From: Lan Tianyu This patch is to move tlb flush in kvm_set_pte_rmapp() to kvm_mmu_notifier_change_pte() in order to avoid redundant tlb flush. Signed-off-by: Lan Tianyu --- arch/x86/kvm/mmu.c | 8 ++-- virt/kvm/kvm_main.c | 5 - 2 files changed, 6 insertions(+), 7 deletions(-) diff

[PATCH V4 6/15] KVM/MMU: Flush tlb directly in the kvm_set_pte_rmapp()

From: Lan Tianyu This patch is to flush tlb directly in the kvm_set_pte_rmapp() and return 0. Signed-off-by: Lan Tianyu --- arch/x86/kvm/mmu.c | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index 5d3a180c57e2..f3742ff4ec18 100644 --- a/arch/x86

[PATCH V4 9/15] KVM: Add flush_link and parent_pte in the struct kvm_mmu_page

From: Lan Tianyu PV EPT tlb flush function will accept a list of flush ranges and use struct kvm_mmu_page as the list entry. Signed-off-by: Lan Tianyu --- arch/x86/include/asm/kvm_host.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/

[PATCH V4 12/15] x86/hyper-v: Add HvFlushGuestAddressList hypercall support

From: Lan Tianyu Hyper-V provides HvFlushGuestAddressList() hypercall to flush EPT tlb with specified ranges. This patch is to add the hypercall support. Reviewed-by: Michael Kelley Signed-off-by: Lan Tianyu --- Change since v2: Fix some coding style issues - Move HV_MAX_FLUSH_P

[PATCH V4 15/15] KVM/VMX: Add hv tlb range flush support

From: Lan Tianyu This patch is to register tlb_remote_flush_with_range callback with hv tlb range flush interface. Signed-off-by: Lan Tianyu --- Change since v3: Merge Vitaly's don't pass EPT configuration info to vmx_hv_remote_flush_tlb() fix. Change since v1: Pass flush range w

[PATCH V4 14/15] KVM/VMX: Change hv flush logic when ept tables are mismatched.

From: Lan Tianyu If ept table pointers are mismatched, flushing tlb for each vcpus via hv flush interface still helps to reduce vmexits which are triggered by IPI and INEPT emulation. Signed-off-by: Lan Tianyu --- arch/x86/kvm/vmx.c | 15 --- 1 file changed, 8 insertions(+), 7 dele

[PATCH V4 10/15] KVM: Add spte's point in the struct kvm_mmu_page

From: Lan Tianyu It's necessary to check whether mmu page is last or large page when add mmu page into flush list. "spte" is needed for such check and so add spte point in the struct kvm_mmu_page. Signed-off-by: Lan Tianyu --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/mmu.c

[PATCH V4 7/15] KVM/MMU: Flush tlb directly in the kvm_zap_gfn_range()

From: Lan Tianyu Originally, flush tlb is done by slot_handle_level_range(). This patch is to flush tlb directly in the kvm_zap_gfn_range() when range flush is available. Signed-off-by: Lan Tianyu --- arch/x86/kvm/mmu.c | 16 +--- 1 file changed, 13 insertions(+), 3 deletions(-) d

[PATCH V4 8/15] KVM/MMU: Flush tlb directly in kvm_mmu_zap_collapsible_spte()

From: Lan Tianyu kvm_mmu_zap_collapsible_spte() returns flush request to the slot_handle_leaf() and the latter does flush on demand. When range flush is available, make kvm_mmu_zap_collapsible_spte() to flush tlb with range directly to avoid returning range back to slot_handle_leaf(). Signed-off

[PATCH V4 13/15] x86/Hyper-v: Add trace in the hyperv_nested_flush_guest_mapping_range()

From: Lan Tianyu This patch is to trace log in the hyperv_nested_flush_ guest_mapping_range(). Signed-off-by: Lan Tianyu --- arch/x86/hyperv/nested.c| 1 + arch/x86/include/asm/trace/hyperv.h | 14 ++ 2 files changed, 15 insertions(+) diff --git a/arch/x86/hyperv/nest

[Update PATCH] x86/Hyper-V: Fix definition HV_MAX_FLUSH_REP_COUNT

From: Lan Tianyu The max flush rep count of HvFlushGuestPhysicalAddressList hypercall is equal with how many entries of union hv_gpa_page_range can be populated into the input parameter page. The origin code lacks parenthesis around PAGE_SIZE - 2 * sizeof(u64). This patch is to fix it. Cc: Fixs

[PATCH V2] x86/Hyper-V: Fix definition HV_MAX_FLUSH_REP_COUNT

From: Lan Tianyu The max flush rep count of HvFlushGuestPhysicalAddressList hypercall is equal with how many entries of union hv_gpa_page_range can be populated into the input parameter page. The origin code lacks parenthesis around PAGE_SIZE - 2 * sizeof(u64). This patch is to fix it. Cc: Fixe

[Resend PATCH V5 0/3] x86/Hyper-V/IOMMU: Add Hyper-V IOMMU driver to support x2apic mode

From: Lan Tianyu On the bare metal, enabling X2APIC mode requires interrupt remapping function which helps to deliver irq to cpu with 32-bit APIC ID. Hyper-V doesn't provide interrupt remapping function so far and Hyper-V MSI protocol already supports to deliver interrupt to the CPU whose virtual

[Resend PATCH V5 3/3] MAINTAINERS: Add Hyper-V IOMMU driver into Hyper-V CORE AND DRIVERS scope

From: Lan Tianyu This patch is to add Hyper-V IOMMU driver file into Hyper-V CORE and DRIVERS scope. Reviewed-by: Michael Kelley Signed-off-by: Lan Tianyu --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9f64f8d..5fb6306 100644 --- a/MAINTAIN

[Resend PATCH V5 2/3] HYPERV/IOMMU: Add Hyper-V stub IOMMU driver

From: Lan Tianyu On the bare metal, enabling X2APIC mode requires interrupt remapping function which helps to deliver irq to cpu with 32-bit APIC ID. Hyper-V doesn't provide interrupt remapping function so far and Hyper-V MSI protocol already supports to deliver interrupt to the CPU whose virtual

[Resend PATCH V5 1/3] x86/Hyper-V: Set x2apic destination mode to physical when x2apic is available

From: Lan Tianyu Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic, set x2apic destination mode to physcial mode when x2apic is available and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs have 8-bit APIC id. Reviewed-by: Thomas Gleixner Reviewed-by: Michael K

[Update PATCH V3 1/10] X86/Hyper-V: Add parameter offset for hyperv_fill_flush_guest_mapping_list()

From: Lan Tianyu Add parameter offset to specify start position to add flush ranges in guest address list of struct hv_guest_mapping_flush_list. Signed-off-by: Lan Tianyu --- Update "offset" parameter's type of hyperv_fill_flush_guest_mapping_list() arch/x86/hyperv/nested.c| 4 ++-- a

[Update PATCH V3 2/10] KVM/VMX: Fill range list in kvm_fill_hv_flush_list_func()

From: Lan Tianyu Populate ranges on the flush list into struct hv_guest_mapping_flush_list when flush list is available in the struct kvm_tlb_range. Signed-off-by: Lan Tianyu --- Update: - Add check of return value "offset" in the kvm_fill_hv_flush_list_func() Change since v2:

[PATCH V6 0/3] x86/Hyper-V/IOMMU: Add Hyper-V IOMMU driver to support x2apic mode

From: Lan Tianyu On the bare metal, enabling X2APIC mode requires interrupt remapping function which helps to deliver irq to cpu with 32-bit APIC ID. Hyper-V doesn't provide interrupt remapping function so far and Hyper-V MSI protocol already supports to deliver interrupt to the CPU whose virtual

[PATCH V6 1/3] x86/Hyper-V: Set x2apic destination mode to physical when x2apic is available

From: Lan Tianyu Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic, set x2apic destination mode to physcial mode when x2apic is available and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs have 8-bit APIC id. Reviewed-by: Thomas Gleixner Reviewed-by: Michael K

[PATCH V6 2/3] IOMMU/Hyper-V: Add Hyper-V stub IOMMU driver

From: Lan Tianyu On the bare metal, enabling X2APIC mode requires interrupt remapping function which helps to deliver irq to cpu with 32-bit APIC ID. Hyper-V doesn't provide interrupt remapping function so far and Hyper-V MSI protocol already supports to deliver interrupt to the CPU whose virtual

[PATCH V6 3/3] MAINTAINERS: Add Hyper-V IOMMU driver into Hyper-V CORE AND DRIVERS scope

From: Lan Tianyu This patch is to add Hyper-V IOMMU driver file into Hyper-V CORE and DRIVERS scope. Reviewed-by: Michael Kelley Signed-off-by: Lan Tianyu --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9f64f8d..5fb6306 100644 --- a/MAINTAIN

[PATCH V4 0/3] x86/Hyper-V/IOMMU: Add Hyper-V IOMMU driver to support x2apic mode

From: Lan Tianyu On the bare metal, enabling X2APIC mode requires interrupt remapping function which helps to deliver irq to cpu with 32-bit APIC ID. Hyper-V doesn't provide interrupt remapping function so far and Hyper-V MSI protocol already supports to deliver interrupt to the CPU whose virtual

[PATCH V4 2/3] HYPERV/IOMMU: Add Hyper-V stub IOMMU driver

From: Lan Tianyu On the bare metal, enabling X2APIC mode requires interrupt remapping function which helps to deliver irq to cpu with 32-bit APIC ID. Hyper-V doesn't provide interrupt remapping function so far and Hyper-V MSI protocol already supports to deliver interrupt to the CPU whose virtual

[PATCH V4 1/3] x86/Hyper-V: Set x2apic destination mode to physical when x2apic is available

From: Lan Tianyu Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic, set x2apic destination mode to physcial mode when x2apic is available and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs have 8-bit APIC id. Reviewed-by: Thomas Gleixner Signed-off-by: Lan Tia

[PATCH V4 3/3] MAINTAINERS: Add Hyper-V IOMMU driver into Hyper-V CORE AND DRIVERS scope

From: Lan Tianyu This patch is to add Hyper-V IOMMU driver file into Hyper-V CORE and DRIVERS scope. Signed-off-by: Lan Tianyu --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9f64f8d..5fb6306 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -701

[PATCH] x86/Hyper-V: Fix overflow issue in the fill_gva_list()

From: Tianyu Lan fill_gva_list() populates gva list and adds offset HV_TLB_FLUSH_UNIT(0x100) to variable "cur" in the each loop. When diff between "end" and "cur" is less than HV_TLB_FLUSH_UNIT, the gva entry should be the last one and the loop should be end. If cur is equal or greater than

[PATCH] x86/Hyper-V: Fix build error with CONFIG_HYPERV_TSCPAGE=N

From: Tianyu Lan Both Hyper-V tsc page and Hyper-V tsc MSR code use variable hv_sched_clock_offset for their sched clock callback and so define the variable regardless of CONFIG_HYPERV_TSCPAGE setting. Signed-off-by: Tianyu Lan --- This patch is based on the top of "git.kernel.org/pub/scm/linu

[PATCH V4 3/3] KVM/Hyper-V/VMX: Add direct tlb flush support

From: Vitaly Kuznetsov Hyper-V provides direct tlb flush function which helps L1 Hypervisor to handle Hyper-V tlb flush request from L2 guest. Add the function support for VMX. Signed-off-by: Vitaly Kuznetsov Signed-off-by: Tianyu Lan --- Change since v3: - Update changlog Change since

[PATCH V4 2/3] KVM/Hyper-V: Add new KVM capability KVM_CAP_HYPERV_DIRECT_TLBFLUSH

From: Tianyu Lan Hyper-V direct tlb flush function should be enabled for guest that only uses Hyper-V hypercall. User space hypervisor(e.g, Qemu) can disable KVM identification in CPUID and just exposes Hyper-V identification to make sure the precondition. Add new KVM capability KVM_CAP_ HYPERV_D

[PATCH V2] x86/Hyper-V: Fix overflow issue in the fill_gva_list()

From: Tianyu Lan When the 'start' parameter is >= 0xFF00 on 32-bit systems, or >= 0x'FF00 on 64-bit systems, fill_gva_list gets into an infinite loop. With such inputs, 'cur' overflows after adding HV_TLB_FLUSH_UNIT and always compares as less than end. Memory is filled with gu

[PATCH] x86/Hyper-V: Fix reference of pv_ops with CONFIG_PARAVIRT=N

From: Tianyu Lan hv_setup_sched_clock() references pv_ops and this should be under CONFIG_PARAVIRT=Y. Fix it. Signed-off-by: Tianyu Lan --- This patch is based on git://git.kernel.org/pub/scm/linux/ kernel/git/tip/tip.git timers/core. arch/x86/kernel/cpu/mshyperv.c | 2 ++ 1 file changed, 2 i

[RFC PATCH] mm: set memory section offline when all its pages are offline.

From: Tianyu Lan If size of offline memory region passed to offline_pages() is not aligned with PAGES_PER_SECTION, memory section will be set to offline in the offline_mem_sections() with some pages of memory section online. Fix it, Update memory section status after marking offline pages as "res

[PATCH] mm/resource: Move child to new resource when release mem region.

From: Tianyu Lan When release mem region, old mem region may be splited to two regions. Current allocate new struct resource for high end mem region but not move child resources whose ranges are in the high end range to new resource. When adjust old mem region's range, adjust_resource() detects c

[PATCH V3 3/3] KVM/Hyper-V/VMX: Add direct tlb flush support

From: Vitaly Kuznetsov This patch is to enable Hyper-V direct tlb flush function for vmx. Signed-off-by: Vitaly Kuznetsov Signed-off-by: Tianyu Lan --- Change since v2: - Move hv assist page(hv_pa_pg) from struct kvm to struct kvm_hv. --- arch/x86/include/asm/hyperv-tlfs.h | 4

[PATCH 0/2] clocksource/Hyper-V: Add Hyper-V specific sched clock function

From: Tianyu Lan Hyper-V guests use the default native_sched_clock() in pv_ops.time.sched_clock on x86. But native_sched_clock() directly uses the raw TSC value, which can be discontinuous in a Hyper-V VM. Add the generic hv_setup_sched_clock() to set the sched clock function appropriately. O

[PATCH 2/2] clocksource/Hyper-V: Add Hyper-V specific sched clock function

From: Tianyu Lan Hyper-V guests use the default native_sched_clock() in pv_ops.time.sched_clock on x86. But native_sched_clock() directly uses the raw TSC value, which can be discontinuous in a Hyper-V VM. Add the generic hv_setup_sched_clock() to set the sched clock function appropriately. On x

[PATCH 1/2] clocksource/Hyper-v: Allocate Hyper-V tsc page statically

From: Tianyu Lan This is to prepare to add Hyper-V sched clock callback and move Hyper-V reference TSC initialization much earlier in the boot process when timestamp is 0. So no discontinuity is observed when pv_ops.time.sched_clock to calculate its offset. This earlier initialization requires th

[PATCH V3 0/3] x86/Hyper-V/IOMMU: Add Hyper-V IOMMU driver to support x2apic mode

From: Lan Tianyu On the bare metal, enabling X2APIC mode requires interrupt remapping function which helps to deliver irq to cpu with 32-bit APIC ID. Hyper-V doesn't provide interrupt remapping function so far and Hyper-V MSI protocol already supports to deliver interrupt to the CPU whose virtual

[PATCH V3 1/3] x86/Hyper-V: Set x2apic destination mode to physical when x2apic is available

From: Lan Tianyu Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic, set x2apic destination mode to physcial mode when x2apic is available and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs have 8-bit APIC id. Signed-off-by: Lan Tianyu --- Change since v2:

[PATCH V3 2/3] HYPERV/IOMMU: Add Hyper-V stub IOMMU driver

From: Lan Tianyu On the bare metal, enabling X2APIC mode requires interrupt remapping function which helps to deliver irq to cpu with 32-bit APIC ID. Hyper-V doesn't provide interrupt remapping function so far and Hyper-V MSI protocol already supports to deliver interrupt to the CPU whose virtual

[PATCH V3 3/3] MAINTAINERS: Add Hyper-V IOMMU driver into Hyper-V CORE AND DRIVERS scope

From: Lan Tianyu This patch is to add Hyper-V IOMMU driver file into Hyper-V CORE and DRIVERS scope. Signed-off-by: Lan Tianyu --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9f64f8d..5fb6306 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -701

[PATCH V2 00/10] X86/KVM/Hyper-V: Add HV ept tlb range list flush support in KVM

From: Lan Tianyu This patchset is to introduce hv ept tlb range list flush function support in the KVM MMU component. Flushing ept tlbs of several address range can be done via single hypercall and new list flush function is used in the kvm_mmu_commit_zap_page() and FNAME(sync_page). This patchse

[PATCH V2 00/10] X86/KVM/Hyper-V: Add HV ept tlb range list flush support in KVM

From: Lan Tianyu This patchset is to introduce hv ept tlb range list flush function support in the KVM MMU component. Flushing ept tlbs of several address range can be done via single hypercall and new list flush function is used in the kvm_mmu_commit_zap_page() and FNAME(sync_page). This patchse

[PATCH V2 1/10] X86/Hyper-V: Add parameter offset for hyperv_fill_flush_guest_mapping_list()

From: Lan Tianyu Add parameter offset to specify start position to add flush ranges in guest address list of struct hv_guest_mapping_flush_list. Signed-off-by: Lan Tianyu --- arch/x86/hyperv/nested.c| 4 ++-- arch/x86/include/asm/mshyperv.h | 2 +- arch/x86/kvm/vmx/vmx.c | 2 +-

[PATCH V2 3/10] KVM/MMU: Add last_level in the struct mmu_spte_page

From: Lan Tianyu This patch is to add last_level in the struct kvm_mmu_page. When build flush tlb range list, last_level will be used to identify whehter the page should be added into list. Signed-off-by: Lan Tianyu --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/mmu.c | 3

[PATCH V2 7/10] KVM: Add kvm_get_memslot() to get memslot via slot id

From: Lan Tianyu This patch is to add kvm_get_memslot() to get struct kvm_memory_slot via slot it and remove redundant codes. The function will also be used in the following changes. Signed-off-by: Lan Tianyu --- include/linux/kvm_host.h | 1 + virt/kvm/kvm_main.c | 45 ++

[PATCH V2 9/10] KVM: Add flush parameter for kvm_age_hva()

From: Lan Tianyu This patch is to add flush parameter for kvm_aga_hva() and move tlb flush from kvm_mmu_notifier_clear_flush_young() to kvm_age_hva(). kvm_age_hva() can check whether tlb flush is necessary when return value young is more than 0. Flush tlb if both conditions are met. Signed-off-b

[PATCH V2 5/10] KVM/MMU: Flush tlb with range list in sync_page()

From: Lan Tianyu This patch is to flush tlb via flush list function. Put page into flush list when return value of set_spte() includes flag SET_SPTE_NEED_REMOTE_TLB_FLUSH. kvm_flush_remote_ tlbs_with_list() checks whether the flush list is empty or not. It also checks whether range tlb flush is a

[PATCH V2 8/10] KVM: Use tlb range flush in the kvm_vm_ioctl_get/clear_dirty_log()

From: Lan Tianyu This patch is to use tlb range flush to flush memslot's in the kvm_vm_ioctl_get/clear_dirty_log() instead of flushing tlbs of entire ept page table when range flush is available. Signed-off-by: Lan Tianyu --- arch/x86/kvm/mmu.c | 8 +--- arch/x86/kvm/mmu.h | 7 +++ a

[PATCH V2 6/10] KVM/MMU: Flush tlb directly in the kvm_mmu_slot_gfn_write_protect()

From: Lan Tianyu This patch is to flush tlb directly in the kvm_mmu_slot_gfn_write_protect() when range flush is available. Signed-off-by: Lan Tianyu --- arch/x86/kvm/mmu.c | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index d57574b49823..6b5e

[PATCH V2 4/10] KVM/MMU: Introduce tlb flush with range list

From: Lan Tianyu This patch is to introduce tlb flush with range list interface and use struct kvm_mmu_page as list entry. Use flush list function in the kvm_mmu_commit_zap_page(). Signed-off-by: Lan Tianyu --- arch/x86/kvm/mmu.c | 25 - 1 file changed, 24 insertions(+)

[PATCH V2 2/10] KVM/VMX: Fill range list in kvm_fill_hv_flush_list_func()

From: Lan Tianyu Populate ranges on the flush list into struct hv_guest_mapping_flush_list when flush list is available in the struct kvm_tlb_range. Signed-off-by: Lan Tianyu --- Change since v1: Make flush list as a "hlist" instead of a "list" in order to keep struct kvm_mmu_pag

[PATCH] Revert "KVM: Eliminate extra function calls in kvm_get_dirty_log_protect()"

From: Lan Tianyu The value of "dirty_bitmap[i]" is already check before setting its value to mask. The following check of "mask" is redundant. The check of "mask" was introduced by commit 58d2930f4ee3(("KVM: Eliminate extra function calls in kvm_get_dirty_log_protect()"). This patch is to revert

[PATCH V2 0/3] x86/Hyper-V/IOMMU: Add Hyper-V IOMMU driver to support x2apic mode

From: Lan Tianyu On the bare metal, enabling X2APIC mode requires interrupt remapping function which helps to deliver irq to cpu with 32-bit APIC ID. Hyper-V doesn't provide interrupt remapping function so far and Hyper-V MSI protocol already supports to deliver interrupt to the CPU whose virtual

[PATCH V2 2/3] HYPERV/IOMMU: Add Hyper-V stub IOMMU driver

From: Lan Tianyu On the bare metal, enabling X2APIC mode requires interrupt remapping function which helps to deliver irq to cpu with 32-bit APIC ID. Hyper-V doesn't provide interrupt remapping function so far and Hyper-V MSI protocol already supports to deliver interrupt to the CPU whose virtual

[PATCH V2 1/3] x86/Hyper-V: Set x2apic destination mode to physical when x2apic is available

From: Lan Tianyu Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic, set x2apic destination mode to physcial mode when x2apic is available and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs have 8-bit APIC id. Signed-off-by: Lan Tianyu --- Change since v1:

[PATCH V2 3/3] MAINTAINERS: Add Hyper-V IOMMU driver into Hyper-V CORE AND DRIVERS scope

From: Lan Tianyu This patch is to add Hyper-V IOMMU driver file into Hyper-V CORE and DRIVERS scope. Signed-off-by: Lan Tianyu --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9f64f8d..5fb6306 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -701

[PATCH V2 3/3] KVM/Hyper-V/VMX: Add direct tlb flush support

From: Vitaly Kuznetsov This patch is to enable Hyper-V direct tlb flush function for vmx. Signed-off-by: Vitaly Kuznetsov Signed-off-by: Tianyu Lan --- arch/x86/include/asm/hyperv-tlfs.h | 4 arch/x86/kvm/vmx/evmcs.h | 2 ++ arch/x86/kvm/vmx/vmx.c | 38 +++

[PATCH V2 0/3] KVM/Hyper-V: Add Hyper-V direct tlb flush support

From: Tianyu Lan This patchset is to add Hyper-V direct tlb support in KVM. Hyper-V in L0 can delegate L1 hypervisor to handle tlb flush request from L2 guest when direct tlb flush is enabled in L1. Patch 2 introduces new cap KVM_CAP_HYPERV_DIRECT_TLBFLUSH to enable feature from user space. User

[PATCH V2 0/2] clocksource/Hyper-V: Add Hyper-V specific sched clock

From: Tianyu Lan Hyper-V guests use the default native_sched_clock() in pv_ops.time.sched_clock on x86. But native_sched_clock() directly uses the raw TSC value, which can be discontinuous in a Hyper-V VM. Add the generic hv_setup_sched_clock() to set the sched clock function appropriately. On

[PATCH V2 1/2] clocksource/Hyper-v: Allocate Hyper-V tsc page statically

From: Tianyu Lan Prepare to add Hyper-V sched clock callback and move Hyper-V Reference TSC initialization much earlier in the boot process. Earlier initialization is needed so that it happens while the timestamp value is still 0 and no discontinuity in the timestamp will occur when pv_ops.time.

[PATCH V2 2/2] clocksource/Hyper-V: Add Hyper-V specific sched clock function

From: Tianyu Lan Hyper-V guests use the default native_sched_clock() in pv_ops.time.sched_clock on x86. But native_sched_clock() directly uses the raw TSC value, which can be discontinuous in a Hyper-V VM. Add the generic hv_setup_sched_clock() to set the sched clock function appropriately. On x

[PATCH 3/3] KVM/Hyper-V/VMX: Add direct tlb flush support

From: Vitaly Kuznetsov This patch is to enable Hyper-V direct tlb flush function for VMX. Signed-off-by: Vitaly Kuznetsov Signed-off-by: Tianyu Lan --- arch/x86/include/asm/hyperv-tlfs.h | 16 +++- arch/x86/kvm/vmx/evmcs.h | 2 ++ arch/x86/kvm/vmx/vmx.c | 38

[PATCH] x86/Hyper-V: Fix definition HV_MAX_FLUSH_REP_COUNT

From: Lan Tianyu The max flush rep count of HvFlushGuestPhysicalAddressList hypercall is equal with how many entries of union hv_gpa_page_range can be populated into the input parameter page. The origin code lacks parenthesis around PAGE_SIZE - 2 * sizeof(u64). This patch is to fix it. Cc: Fixs

[PATCH V3 00/10] X86/KVM/Hyper-V: Add HV ept tlb range list flush support in KVM

From: Lan Tianyu This patchset is to introduce hv ept tlb range list flush function support in the KVM MMU component. Flushing ept tlbs of several address range can be done via single hypercall and new list flush function is used in the kvm_mmu_commit_zap_page() and FNAME(sync_page). This patchse

[PATCH V3 4/10] KVM/MMU: Use range flush in sync_page()

From: Lan Tianyu This patch is to use range flush to flush tlbs of input struct kvm_mmu_page in the sync_page(). If range flush is not available, kvm_flush_remote_tlbs_with_address() will call kvm_flush_remote_tlbs(). Signed-off-by: Lan Tianyu --- arch/x86/kvm/paging_tmpl.h | 5 +++-- 1 file c

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