On 7/10/2013 3:05 PM, Linus Walleij wrote:
On Thu, Jun 27, 2013 at 11:08 PM, Hanumant Singh
wrote:
Add a new device tree enabled pinctrl driver for
Qualcomm MSM SoC's. This driver provides an extensible
framework to interface all MSM's that use a TLMM pinmux,
with the pinctrl subsy
for respective situations.
Please let me know if you believe there is a better way to handle use case 2
and 3
Thanks
Hanumant
--
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
Forum, hosted by The Linux Foundat
On 04/17/2013 09:05 AM, Linus Walleij wrote:
On Tue, Apr 16, 2013 at 10:18 PM, hanumant wrote:
I am trying to implement a pinctrl driver.
I have given a brief description of the relevant pinctrl hw features as well
as a the use cases and my proposed solution for them. Please advise/comment
On 06/24/2013 05:18 AM, Linus Walleij wrote:
>> +
>> + - qcom,gp-pull: Pull up/down configuration.
>> + - qcom,gp-drv: Drive strength configuration.
>> + - qcom,gp-dir: Pull up/down configuration in power down mode.
>
> Rebase this to use the generic pin config mappings and parsing
> code that
On 06/27/2013 01:26 AM, Linus Walleij wrote:
> On Tue, Jun 25, 2013 at 7:41 PM, hanumant wrote:
>> On 06/24/2013 05:18 AM, Linus Walleij wrote:
>
>>>> + The following pin configurations are properties are supported by SDC
>>>> pins
>>>> + - qco
On 7/29/2013 9:37 AM, Linus Walleij wrote:
On Wed, Jul 24, 2013 at 11:41 PM, Hanumant Singh
wrote:
Add a new device tree enabled pinctrl driver for
Qualcomm MSM SoC's. This driver provides an extensible
framework to interface all MSM's that use a TLMM pinmux,
with the pinctrl subsy
nding. But that
would mean ensuring that your pin type occurs at a certain order in
Device tree.
The pinctrl_add_gpio_range() would have really helped here in specifying
the gpio range at device tree parsing time.
Is there a more elegant option rather then hard coding the order of pin
types
lue add to having a private data field for the framework
pin descriptor that can be overloaded for every pin to take care of
these kinds of problems?
Thanks
Hanumant
--
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
For
ht now,
as well as, only two of the different pin types present on the
TLMM v3 pinmux.
Pintype 1: General purpose pins.
Pintype 2: SDC pins.
Signed-off-by: Hanumant Singh
---
.../devicetree/bindings/pinctrl/msm-pinctrl.txt| 181 +
drivers/pinctrl/Kconfig| 10
ht now,
as well as, only two of the different pin types present on the
TLMM v3 pinmux.
Pintype 1: General purpose pins.
Pintype 2: SDC pins.
Signed-off-by: Hanumant Singh
---
.../devicetree/bindings/pinctrl/msm-pinctrl.txt| 187 +
drivers/pinctrl/Kconfig| 10
ht now,
as well as, only two of the different pin types present on the
TLMM v3 pinmux.
Pintype 1: General purpose pins.
Pintype 2: SDC pins.
Signed-off-by: Hanumant Singh
---
.../devicetree/bindings/pinctrl/msm-pinctrl.txt| 171 +
drivers/pinctrl/Kconfig| 10
On 8/14/2013 12:29 PM, Linus Walleij wrote:
On Tue, Jul 30, 2013 at 1:39 AM, Bjorn Andersson wrote:
On Wed, Jul 24, 2013 at 1:41 PM, Hanumant Singh wrote:
As a general note on the patch, the pins and pin groups are defined by
the soc, I'm therefore not convinced that these shou
On 8/15/2013 1:47 PM, Linus Walleij wrote:
On Thu, Aug 15, 2013 at 7:44 PM, Hanumant Singh wrote:
Ok i can switch to using pin groups defined in per soc files.
But in our case we have one soc going into different types of boards.
(atleast 3). In each of the boards the same external devices
On 8/15/2013 2:50 PM, Josh Cartwright wrote:
On Thu, Aug 15, 2013 at 10:44:03AM -0700, Hanumant Singh wrote:
On 8/14/2013 12:29 PM, Linus Walleij wrote:
On Tue, Jul 30, 2013 at 1:39 AM, Bjorn Andersson wrote:
On Wed, Jul 24, 2013 at 1:41 PM, Hanumant Singh wrote:
As a general note on the
On 8/15/2013 4:10 PM, Josh Cartwright wrote:
On Thu, Aug 15, 2013 at 02:58:31PM -0700, Hanumant Singh wrote:
On 8/15/2013 2:50 PM, Josh Cartwright wrote:
On Thu, Aug 15, 2013 at 10:44:03AM -0700, Hanumant Singh wrote:
On 8/14/2013 12:29 PM, Linus Walleij wrote:
On Tue, Jul 30, 2013 at 1:39
On 7/30/2013 2:22 PM, Stephen Warren wrote:
On 07/30/2013 03:10 PM, hanumant wrote:
...
We actually have the same TLMM pinmux used by several socs of a family.
The number of pins on each soc may vary.
Also a given soc gets used in a number of boards.
The device tree for a given soc is split
On 7/30/2013 5:08 PM, Stephen Warren wrote:
On 07/30/2013 06:01 PM, Hanumant Singh wrote:
On 7/30/2013 2:22 PM, Stephen Warren wrote:
On 07/30/2013 03:10 PM, hanumant wrote:
...
We actually have the same TLMM pinmux used by several socs of a family.
The number of pins on each soc may vary
On 7/30/2013 8:59 PM, Stephen Warren wrote:
On 07/30/2013 06:13 PM, Hanumant Singh wrote:
On 7/30/2013 5:08 PM, Stephen Warren wrote:
On 07/30/2013 06:01 PM, Hanumant Singh wrote:
On 7/30/2013 2:22 PM, Stephen Warren wrote:
On 07/30/2013 03:10 PM, hanumant wrote:
...
We actually have the
On 7/31/2013 2:06 PM, Stephen Warren wrote:
On 07/31/2013 01:46 PM, Hanumant Singh wrote:
On 7/30/2013 8:59 PM, Stephen Warren wrote:
On 07/30/2013 06:13 PM, Hanumant Singh wrote:
On 7/30/2013 5:08 PM, Stephen Warren wrote:
On 07/30/2013 06:01 PM, Hanumant Singh wrote:
On 7/30/2013 2:22 PM
On 7/31/2013 5:17 PM, Hanumant Singh wrote:
On 7/31/2013 2:06 PM, Stephen Warren wrote:
On 07/31/2013 01:46 PM, Hanumant Singh wrote:
On 7/30/2013 8:59 PM, Stephen Warren wrote:
On 07/30/2013 06:13 PM, Hanumant Singh wrote:
On 7/30/2013 5:08 PM, Stephen Warren wrote:
On 07/30/2013 06:01 PM
On 7/29/2013 4:39 PM, Bjorn Andersson wrote:
On Wed, Jul 24, 2013 at 1:41 PM, Hanumant Singh wrote:
Add a new device tree enabled pinctrl driver for
Qualcomm MSM SoC's. This driver provides an extensible
framework to interface all MSM's that use a TLMM pinmux,
with the pinctr
platform_device *pdev)
+{
+ struct msm_pinctrl_dd *dd;
+ struct device *dev = &pdev->dev;
+ struct resource *res;
+ int ret;
+
+ dd = devm_kzalloc(dev, sizeof(*dd), GFP_KERNEL);
+ if (!dd) {
+ dev_err(dev, "Alloction failed for driver d
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