On Tue, Apr 9, 2019 at 11:11 PM Andy Shevchenko
wrote:
>
> Intel Comet Lake has the same LPSS than Intel Cannon Lake.
> Add the new IDs to the list of supported devices.
>
> Signed-off-by: Andy Shevchenko
> ---
> drivers/mfd/intel-lpss-pci.c | 13 +
> 1 file changed, 13 insertions(+)
Add PCI IDs for SPI on Comet Lake.
Signed-off-by: Evan Green
---
drivers/spi/spi-pxa2xx.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
index b6ddba833d021..493223e1d032d 100644
--- a/drivers/spi/spi-pxa2xx.c
+++ b/drivers/spi/spi
ey use.
>
> The sdm845 interconnect provider DT node is already present, but the
> header file with the resources is not included, so let's fix this.
>
> Signed-off-by: Georgi Djakov
Reviewed-by: Evan Green
On Wed, Mar 13, 2019 at 6:00 PM David Dai wrote:
>
>
> On 3/8/2019 10:35 AM, Evan Green wrote:
> > On Fri, Feb 8, 2019 at 9:22 AM Georgi Djakov
> > wrote:
> >> From: David Dai
> >>
> >> Add support for wake and sleep commands by using a tag to in
On Fri, Feb 1, 2019 at 9:56 AM Stephen Boyd wrote:
>
> Quoting Evan Green (2019-01-23 14:11:34)
> > Expose a reset controller that the phy can use to perform its
> > initialization in a single callback.
> >
> > Also, change the use of the phy functions from ufs-
On Fri, Feb 1, 2019 at 10:00 AM Stephen Boyd wrote:
>
> Quoting Evan Green (2019-01-23 14:11:35)
> > @@ -1144,6 +1150,8 @@ static const struct qmp_phy_cfg sdm845_ufsphy_cfg = {
> >
> > .is_dual_lane_phy = true,
> >
On Fri, Feb 1, 2019 at 10:43 AM Stephen Boyd wrote:
>
> Quoting Evan Green (2019-01-23 14:11:37)
> > The phy code was using implicit sequencing between the PHY driver
> > and the UFS driver to implement certain hardware requirements.
> > Specifically, the PHY reset regist
On Tue, Feb 5, 2019 at 9:52 AM Marc Gonzalez wrote:
>
> On 05/02/2019 18:24, Marc Gonzalez wrote:
>
> > /*** system hangs here for several seconds, then reboots ***/
>
> Silly me. The system crashes in ufshcd_dump_regs() which is a bug
> I fixed myself. Once I cherry-pick the appropriate fix, the
on in suspend that shouldn't
be.
This new scheme gives the UFS reset to the PHY, so that it can fully
initialize itself in a single callback. We can then turn regulators on
during poweron and off during poweroff.
Signed-off-by: Evan Green
Reviewed-by: Rob Herring
Reviewed-by: Stephen Boyd
ps (Stephen).
- Use devm_* to get the reset (Stephen)
- Clear ufs_reset on error getting it
- Remove needless error print (Stephen)
- Use devm_ to get the reset (Stephen)
- Removed whitespace changes (Stephen)
Evan Green (8):
dt-bindings: ufs: Add #reset-cells for Qualcomm controllers
dt-bin
Enable Qualcomm UFS controllers to expose the PHY reset via a reset
controller.
Signed-off-by: Evan Green
Reviewed-by: Rob Herring
Reviewed-by: Stephen Boyd
---
Fixing up this aspect of it made me notice that this patch [1]
hasn't landed yet. It really ought to.
[1]
https://lore.kerne
through the PHY framework.
Signed-off-by: Evan Green
Reviewed-by: Rob Herring
Reviewed-by: Stephen Boyd
---
Changes in v3: None
Changes in v2:
- Added resets to example (Stephen).
Documentation/devicetree/bindings/ufs/ufs-qcom.txt | 5 -
1 file changed, 4 insertions(+), 1 deletion
Move the PHY reset from ufs-qcom into the respective PHYs. This will
allow us to merge the two phases of UFS PHY initialization.
Signed-off-by: Evan Green
---
Changes in v3:
- Refactored to move reset control in a single commit (Stephen)
- Use no_pcs_sw_reset as an indicator of UFS reset in
Wire up the reset controller in the Qcom UFS controller for the PHY.
This will be used to toggle PHY reset during initialization of the PHY.
Signed-off-by: Evan Green
Reviewed-by: Stephen Boyd
---
This commit is based atop the series at [1]. Patches 1 and 2 of that
series have landed, but 3, 4
allback specific to 14/20nm.
Signed-off-by: Evan Green
---
Changes in v3:
- Refactor init => poweron for all PHYs and UFS in one step (Stephen)
Changes in v2:
- Use devm_ to get the reset (Stephen)
- Removed whitespace changes (Stephen)
drivers/phy/qualcomm/phy-qcom-qmp.c | 80 +++
Add the reset controller for the UFS controller, and wire it up
so that the UFS PHY can initialize itself without relying on
implicit sequencing between the two drivers.
Signed-off-by: Evan Green
Reviewed-by: Stephen Boyd
---
Changes in v3: None
Changes in v2: None
arch/arm64/boot/dts/qcom
Expose a reset controller that the phy will later use to control its
own PHY reset in the UFS controller. This will enable the combining
of PHY init functionality into a single function.
Signed-off-by: Evan Green
---
Note: The remaining changes in this series need this change, since
the PHYs
On Fri, Feb 1, 2019 at 1:42 AM Yong Wu wrote:
>
> On Thu, 2019-01-31 at 11:23 -0800, Evan Green wrote:
> > On Wed, Jan 30, 2019 at 10:59 PM Yong Wu wrote:
> > >
> > > On Wed, 2019-01-30 at 10:28 -0800, Evan Green wrote:
> > > > On M
On Fri, Jan 25, 2019 at 2:29 AM Asutosh Das (asd)
wrote:
>
> On 1/24/2019 10:22 PM, Evan Green wrote:
> > On Wed, Jan 23, 2019 at 11:02 PM Asutosh Das
> > wrote:
> >>
> >> Adapt to the new ICB framework for bus bandwidth voting.
> >>
> >> Th
at [2].
Signed-off-by: Evan Green
[1] https://lore.kernel.org/lkml/20190321171800.104681-1-evgr...@chromium.org/
[2] https://lore.kernel.org/lkml/43768d77-80b7-9cdc-b6e0-08ec4a026...@free.fr/
---
I haven't tested this. Marc, I'm hoping you'll test this out and hijack this
patch if
On Tue, Mar 26, 2019 at 10:14 AM Marc Gonzalez wrote:
>
> On 26/03/2019 18:05, Evan Green wrote:
>
> > With the new refactoring at [1], the UFS phy now controls its own
> > destiny in toggling the phy reset bit within the UFS host controller.
> > Add the DT pieces ne
slp_s0_residency_usec_range to usermode as well, which returns
the maximum value this counter could have. Consumers can use this to
manage rollovers.
Signed-off-by: Evan Green
---
Note: I also looked at a similar bit of functionality in
intel_pmc_s0ix_counter_read(), but noticed it's doing a 64-bit register
acces
rm/ec/+/1501512
Changes in v2:
- Made unions anonymous
- Replaced reserved union members with a comment
- Removed unnecessary version assignment (Guenter)
- Changed WARN to WARN_ONCE (Guenter)
- Fixed C code to use anonymous unions
- insize is only bigger for resume events.
Evan Green (2):
mf
the system if that change does not occur in
time.
Signed-off-by: Evan Green
---
Changes in v2:
- Made unions anonymous
- Replaced reserved union members with a comment
include/linux/mfd/cros_ec_commands.h | 57
1 file changed, 57 insertions(+)
diff --git a
accept the sleep parameter
from outside the driver, and return the response information to
usermode or elsewhere.
Signed-off-by: Evan Green
---
Changes in v2:
- Removed unnecessary version assignment (Guenter)
- Changed WARN to WARN_ONCE (Guenter)
- Fixed C code to use anonymous unions
- insize is
Oops, I missed a piece of Guenter's feedback. Will post a v3 momentarily.
Apologies for the spam.
-Evan
ons
- insize is only bigger for resume events.
Evan Green (2):
mfd: cros_ec: Add host_sleep_event_v1 command
platform/chrome: Add support for v1 of host sleep event
drivers/mfd/cros_ec.c | 39 ++---
drivers/platform/chrome/cros_ec_proto.c | 6 +++
include/linu
the system if that change does not occur in
time.
Signed-off-by: Evan Green
---
Changes in v3: None
Changes in v2:
- Made unions anonymous
- Replaced reserved union members with a comment
include/linux/mfd/cros_ec_commands.h | 57
1 file changed, 57 insertions
accept the sleep parameter
from outside the driver, and return the response information to
usermode or elsewhere.
Signed-off-by: Evan Green
---
Changes in v3:
- Consolidated boolean logic for host_sleep_v1 (Guenter)
Changes in v2:
- Removed unnecessary version assignment (Guenter)
- Changed WARN
don't need the property.
>
> And IOMMU also know which larb this consumer connects with from
> iommu id in the "iommus=" property.
>
> Signed-off-by: Yong Wu
Reviewed-by: Evan Green
On Mon, Dec 31, 2018 at 8:52 PM Yong Wu wrote:
>
> MediaTek IOMMU don't have its power-domain. all the consumer connect
> with smi-larb, then connect with smi-common.
>
> M4U
> |
> smi-common
> |
> -
> | |...
> | |
> larb1 lar
On Mon, Dec 31, 2018 at 8:52 PM Yong Wu wrote:
>
> Normally, If the smi-larb HW need work, we should enable the smi-common
> HW power and clock firstly.
> This patch adds device-link between the smi-larb dev and the smi-common
> dev. then If pm_runtime_get_sync(smi-larb-dev), the pm_runtime_get_sy
On Mon, Dec 31, 2018 at 8:52 PM Yong Wu wrote:
>
> The iommu consumer should use device_link to connect with the
> smi-larb(supplier). then the smi-larb should run before the iommu
> consumer. Here we delay the iommu driver until the smi driver is
> ready, then all the iommu consumer always is aft
seems fine
as-is to me.
Reviewed-by: Evan Green
u Tsai
> Signed-off-by: Yong Wu
Reviewed-by: Evan Green
On Mon, Dec 31, 2018 at 8:52 PM Yong Wu wrote:
>
> DL_FLAG_AUTOREMOVE_CONSUMER/SUPPLIER means "Remove the link
> automatically on consumer/supplier driver unbind", that means we should
> remove whole the device_link when there is no this driver no matter what
> the ref_count of the link is.
>
> CC
ffany Lin
> Signed-off-by: Yong Wu
Reviewed-by: Evan Green
> Signed-off-by: Yong Wu
Reviewed-by: Evan Green
On Mon, Dec 31, 2018 at 8:53 PM Yong Wu wrote:
>
> After adding device_link between the IOMMU consumer and smi,
> the mediatek,larb is unnecessary now.
>
> CC: Matthias Brugger
> Signed-off-by: Yong Wu
Reviewed-by: Evan Green
On Mon, Dec 31, 2018 at 8:53 PM Yong Wu wrote:
>
> MediaTek IOMMU should wait for smi larb which need wait for the
> power domain(mtk-scpsys.c) and the multimedia ccf who both are
> module init. Thus, subsys_initcall for MediaTek IOMMU is not helpful.
> Switch to builtin_platform_driver.
>
> Meanw
Hu
> CC: Philipp Zabel
> Signed-off-by: Yong Wu
Nice cleanup.
Reviewed-by: Evan Green
On Mon, Dec 31, 2018 at 8:53 PM Yong Wu wrote:
>
> After adding device_link between the IOMMU consumer and smi,
> the mediatek,larb is unnecessary now.
>
> CC: Matthias Brugger
> Signed-off-by: Yong Wu
Reviewed-by: Evan Green
Signed-off-by: Marc Gonzalez
Whoops, I lost track of this. Thanks for cleaning this up, Marc.
Reviewed-by: Evan Green
On Thu, Feb 14, 2019 at 10:00 AM Evan Green wrote:
>
> On Wed, Feb 13, 2019 at 6:40 PM Martin K. Petersen
> wrote:
> >
> >
> > Evan,
> >
> > > If the backing device for a loop device is a block device, then mirror
> > > the discard prop
On Wed, Feb 13, 2019 at 6:32 PM Martin K. Petersen
wrote:
>
>
> Evan,
>
> > Properly plumb out EOPNOTSUPP from loop driver operations, which may
> > get returned when for instance a discard operation is attempted but
> > not supported by the underlying block device. Before this change,
> > everyth
On Sun, May 17, 2020 at 3:47 AM Rakesh Pillai wrote:
>
> Add device node for the ath10k SNOC platform driver probe
> and add resources required for WCN3990 on sc7180 soc.
>
> Signed-off-by: Rakesh Pillai
> ---
> Changes from v8:
> - Removed the qcom,msa-fixed-perm
> ---
> arch/arm64/boot/dts/qco
On Wed, May 20, 2020 at 6:03 PM Stephen Boyd wrote:
>
> The modem node has an address of 408 and thus should come after tlmm
> and before gpu. Move the node to the right place to maintainer proper
> address sort order.
>
> Cc: Evan Green
> Cc: Sibi Sankar
> Fixes: e
On Tue, May 19, 2020 at 8:57 PM Rakesh Pillai wrote:
>
> Add device node for the ath10k SNOC platform driver probe
> and add resources required for WCN3990 on sc7180 soc.
>
> Signed-off-by: Rakesh Pillai
Reviewed-by: Evan Green
On Mon, Aug 17, 2020 at 11:33 AM Raj, Ashok wrote:
>
> Hi Evan
>
> Some details below,
>
> On Mon, Aug 17, 2020 at 11:12:17AM -0700, Evan Green wrote:
> > Hi Ashok,
> > Thank you, Srikanth, and Sukumar for some very impressive debugging here.
> >
> >
On Sat, Nov 21, 2020 at 9:43 PM Bjorn Andersson
wrote:
>
> A graceful shutdown of the Qualcomm remote processors where
> traditionally performed by invoking a shared memory state signal and
> waiting for the associated ack.
>
> This was later superseded by the "sysmon" mechanism, where some form o
On Tue, Jan 5, 2021 at 2:25 AM Wolfram Sang wrote:
>
> On Fri, Nov 20, 2020 at 10:59:12AM -0800, Evan Green wrote:
> > On Thu, Nov 19, 2020 at 7:24 AM Andy Shevchenko
> > wrote:
> > >
> > > On Thu, Nov 19, 2020 at 1:40 AM Evan Green wrote:
> > >
an opt-out parameter
so there's an emergency valve for people who are deliberately running
old firmware, or as an escape hatch in case of unforeseen regressions.
Signed-off-by: Evan Green
---
drivers/firmware/google/gsmi.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-
r)
- Limit scope of dev_handle (Peter)
Changes in v2:
- Make it compile properly when !CONFIG_ACPI (Randy)
- Update commit message regarding i2c-parent (Peter)
Evan Green (2):
i2c: i2c-mux-gpio: Factor out pdev->dev in _probe_dt()
i2c: i2c-mux-gpio: Enable this driver in ACPI land
drive
i2c-mux-gpio is
instantiated.
Signed-off-by: Evan Green
---
Changes in v3:
- Update commit message again (Peter)
- Added missing \n (Peter)
- adr64 overflow check (Peter)
- Don't initialize child (Peter)
- Limit scope of dev_handle (Peter)
Changes in v2:
- Make it compile properly when
Factor out &pdev->dev into a local variable in preparation for
the ACPI enablement of this function, which will utilize the variable
more.
Signed-off-by: Evan Green
---
Changes in v3:
- Introduced minor &pdev->dev to dev refactor (Peter)
drivers/i2c/muxes/i2c-mux-gpio.c | 5
Very sorry to ping. Is there anything I can do to help get this reviewed?
-Evan
On Mon, Nov 30, 2020 at 11:11 AM Evan Green wrote:
>
> Hi Andy, Peter,
>
> On Fri, Nov 20, 2020 at 10:59 AM Evan Green wrote:
> >
> > On Thu, Nov 19, 2020 at 7:24 AM Andy Shevchenko
> &
Hi Andy, Peter,
On Fri, Nov 20, 2020 at 10:59 AM Evan Green wrote:
>
> On Thu, Nov 19, 2020 at 7:24 AM Andy Shevchenko
> wrote:
> >
> > On Thu, Nov 19, 2020 at 1:40 AM Evan Green wrote:
> > >
> > > Enable i2c-mux-gpio devices to be defined via ACPI. T
On Sun, Jan 17, 2021 at 3:54 AM Wolfram Sang wrote:
>
> On Wed, Nov 18, 2020 at 03:40:25PM -0800, Evan Green wrote:
> > Enable i2c-mux-gpio devices to be defined via ACPI. The idle-state
> > property translates directly to a fwnode_property_*() call. The child
> >
On Thu, Nov 19, 2020 at 7:24 AM Andy Shevchenko
wrote:
>
> On Thu, Nov 19, 2020 at 1:40 AM Evan Green wrote:
> >
> > Enable i2c-mux-gpio devices to be defined via ACPI. The idle-state
> > property translates directly to a fwnode_property_*() call. The child
> > reg
On Sun, May 8, 2016 at 1:25 AM, Paul E. McKenney
wrote:
> On Fri, May 06, 2016 at 04:25:16PM +1000, Ross Green wrote:
>> On Sun, Apr 3, 2016 at 6:18 PM, Paul E. McKenney
>> wrote:
>> > On Thu, Mar 31, 2016 at 08:42:55AM -0700, Paul E. McKenney wrote:
>> >>
I too have traced a similar RCU stall all the way back to 3.17.
Seems to affect RCU preempt code as well.
I had not been able to find a sure fail way to trigger this and it
could take several days running before problem arises.
Ross
--
To unsubscribe from this list: send the line "unsubscribe li
Hi... looks good, just some small general comments.
On 15 December 2015 at 06:42, Joshua Henderson
wrote:
> From: Andrei Pistirica
>
> This driver supports the SDHCI host controller found on a PIC32.
>
> Signed-off-by: Andrei Pistirica
> Signed-off-by: Joshua Henderson
> Cc: Ralf Baechle
> --
way back to 3.17.
Most recent kernels have included 4.4-rc5 4.4-rc6 and 4.4-rc7
Regards,
Ross
On Fri, Dec 11, 2015 at 10:17 PM, Ross Green wrote:
> I have been getting these stalls in kernels going back to 3.17.
>
> This stall occurs usually under light load but often requires several
!
Please see the attachments.
Regards,
Ross
On Sun, Jan 3, 2016 at 5:17 PM, Paul E. McKenney
wrote:
> On Sun, Jan 03, 2016 at 04:29:11PM +1100, Ross Green wrote:
>> Still seeing these rcu_preempt stalls on kernels through to 4.4-rc7
>>
>> Still have not found a sure fire
induce these stalls
with heavy loading of the system. The only method I can be sure of is
to leave the system quiet and let time go by till a stall occurs.
Regards,
Ross
On Mon, Jan 4, 2016 at 9:00 AM, Ross Green wrote:
> Thanks Paul for your analysis and investigation,
>
> I unders
Appreciate your efforts!
Just trying to make sure it does not get lost.
Introduced in rc1, not fixed by ... rc4.
Anyway, I will continue to test, lots of other things still to chase
even in rc4!
Regards,
Ross Green
On Wed, Feb 17, 2016 at 2:24 AM, Kalle Valo wrote:
> Ross Green wri
gt; On Tue, Feb 16, 2016 at 09:45:49PM -0800, Paul E. McKenney wrote:
>> > > > On Tue, Feb 09, 2016 at 09:11:55PM +1100, Ross Green wrote:
>> > > > > Continued testing with the latest linux-4.5-rc3 release.
>> > > > >
>> > > > > Pl
On Fri, Feb 19, 2016 at 10:14 AM, Mathieu Desnoyers
wrote:
> - On Feb 18, 2016, at 6:51 AM, Ross Green rgker...@gmail.com wrote:
>
>> On Thu, Feb 18, 2016 at 10:19 AM, Paul E. McKenney
>> wrote:
>>> On Wed, Feb 17, 2016 at 12:28:29PM -0800, Paul E. McKenney wrote
On Fri, Feb 19, 2016 at 3:22 PM, Paul E. McKenney
wrote:
> On Thu, Feb 18, 2016 at 11:14:21PM +, Mathieu Desnoyers wrote:
>> - On Feb 18, 2016, at 6:51 AM, Ross Green rgker...@gmail.com wrote:
>>
>> > On Thu, Feb 18, 2016 at 10:19 AM, Paul E. McKenney
>>
On Mon, Feb 8, 2016 at 9:05 AM, Emil Goode wrote:
> Hello,
>
> On Tue, Feb 02, 2016 at 05:05:38PM +0100, Sebastian Reichel wrote:
>> On Tue, Feb 02, 2016 at 04:41:13PM +1100, Ross Green wrote:
>> > On Tue, Feb 2, 2016 at 3:34 PM, Sebastian Reichel wrote:
>> > >
completion and then leave the system idle away with just a few daemons
running.
the self detected stalls in this instance turned up after a days run time.
There were NO heavy artificial computational loads on the machine.
Regards,
Ross Green
dmesg-4.5-rc3
Description: Binary data
size brings the module back to
>> it's functional state.
>>
>> Fixes: 3719c17e1816 ("wlcore/wl18xx: fw logger over sdio")
>> Reported-by: Ross Green
>> Signed-off-by: Emil Goode
>> [kv...@codeaurora.org: improved commit log]
>
> Thanks, app
On Wed, Feb 24, 2016 at 7:55 AM, Paul E. McKenney
wrote:
> On Tue, Feb 23, 2016 at 08:34:11PM +, Mathieu Desnoyers wrote:
>> - On Feb 21, 2016, at 1:15 PM, Ross Green rgker...@gmail.com wrote:
>>
>> > On Sun, Feb 21, 2016 at 4:04 PM, Ross Green wrote:
>> &
On Wed, Feb 17, 2016 at 4:34 PM, Ross Green wrote:
> Appreciate your efforts!
>
> Just trying to make sure it does not get lost.
> Introduced in rc1, not fixed by ... rc4.
>
> Anyway, I will continue to test, lots of other things still to chase
> even in rc4!
>
> Reg
On Thu, Feb 25, 2016 at 11:11 AM, Emil Goode wrote:
> Hello Ross
>
> On Wed, Feb 24, 2016 at 04:40:50PM +1100, Ross Green wrote:
>> On Wed, Feb 17, 2016 at 4:34 PM, Ross Green wrote:
>> > Appreciate your efforts!
>> >
>> > Just trying to make sure it
On Thu, Feb 25, 2016 at 1:13 PM, Ross Green wrote:
> On Thu, Feb 25, 2016 at 11:11 AM, Emil Goode wrote:
>> Hello Ross
>>
>> On Wed, Feb 24, 2016 at 04:40:50PM +1100, Ross Green wrote:
>>> On Wed, Feb 17, 2016 at 4:34 PM, Ross Green wrote:
>>> > Apprec
On Wed, Feb 24, 2016 at 8:28 AM, Ross Green wrote:
> On Wed, Feb 24, 2016 at 7:55 AM, Paul E. McKenney
> wrote:
>> On Tue, Feb 23, 2016 at 08:34:11PM +, Mathieu Desnoyers wrote:
>>> - On Feb 21, 2016, at 1:15 PM, Ross Green rgker...@gmail.com wrote:
>>>
>
sys/module/dmatest/parameters/run
Green Wan (3):
dt-bindings: dmaengine: sf-pdma: add bindins for SiFive PDMA
riscv: dts: add support for PDMA device of HiFive Unleashed Rev A00
dmaengine: sf-pdma: add platform DMA support for HiFive Unleashed A00
.../bindings/dma/sifive,fu540-c00
Add DT bindings document for Platform DMA(PDMA) driver of board,
HiFive Unleashed Rev A00.
Signed-off-by: Green Wan
---
.../bindings/dma/sifive,fu540-c000-pdma.yaml | 63 +++
MAINTAINERS | 5 ++
2 files changed, 68 insertions(+)
create mode
Add PDMA support to (arch/riscv/boot/dts/sifive/fu540-c000.dtsi)
Signed-off-by: Green Wan
---
arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
index
--
||--< done 27 >--|ch 2|
||--< err 28 >--|| (dma0chan2)
|| --
|| --
||--< done 29 >--|ch 3|
||--< err 30 >--| | (dma0chan3)
-- --
Signed-off-by: G
an2-copy0: summary 45975 tests, 0 failures
41178.48 iops 328740 KB/s (0)
[ 267.590542] dmatest: dma0chan3-copy0: summary 44768 tests, 0 failures
38560.29 iops 307726 KB/s (0)
Green Wan (4):
dt-bindings: dmaengine: sf-pdma: add bindins for SiFive PDMA
riscv: dts: add support for PDMA device of Hi
Add DT bindings document for Platform DMA(PDMA) driver of board,
HiFive Unleashed Rev A00.
Signed-off-by: Green Wan
---
.../bindings/dma/sifive,fu540-c000-pdma.yaml | 55 +++
1 file changed, 55 insertions(+)
create mode 100644
Documentation/devicetree/bindings/dma/sifive
;--|ch 2|
||--< err 28 >--|| (dma0chan2)
|| --
|| --
||--< done 29 >--|ch 3|
||--< err 30 >--| | (dma0chan3)
-- --
Signed-off-by: Green Wan
---
drivers/dma/Kconfig |
Add PDMA support to (arch/riscv/boot/dts/sifive/fu540-c000.dtsi)
Signed-off-by: Green Wan
---
arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
index
Update MAINTAINERS for SiFive PDMA driver.
Signed-off-by: Green Wan
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 30a5b4028d2f..6c12da0a324d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -14779,6 +14779,12 @@ F: drivers/media/usb
On Thu, Oct 3, 2019 at 11:56 AM Stephen Boyd wrote:
>
> Quoting Evan Green (2019-09-18 12:37:34)
> > On Tue, Sep 10, 2019 at 9:09 AM Stephen Boyd wrote:
> > >
> > > @@ -53,6 +60,9 @@ static void *try_ram_remap(resource_size_t offset,
> > > size_t size,
&g
On Fri, Sep 27, 2019 at 5:16 PM Dmitry Torokhov
wrote:
>
> Hi Evan,
>
> On Tue, Sep 24, 2019 at 02:52:38PM -0700, Evan Green wrote:
> > Across suspend and resume, we are seeing error messages like the following:
> >
> > atmel_mxt_ts i2c-PRP0001:00: __mxt_read_
d fix separately.
Signed-off-by: Evan Green
---
Changes in v3:
- Move enable_irq to the beginning of resume (Dmitry)
Changes in v2:
- Enable and disable unconditionally (Dmitry)
drivers/input/touchscreen/atmel_mxt_ts.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/input/touchs
t; Fixes: 7f9c136216c7 ("soc: qcom: Add broadcast base for Last Level Cache
> Controller (LLCC)")
> Cc: Venkata Narendra Kumar Gutta
> Cc: Evan Green
> Signed-off-by: Stephen Boyd
> ---
> drivers/soc/qcom/llcc-slice.c | 14 +++---
> 1 file changed, 7 inse
_mask
to avoid calling handle_nested_irq() on IRQs that have not yet been
set up.
Signed-off-by: Evan Green
---
drivers/input/rmi4/rmi_driver.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/input/rmi4/rmi_driver.c b/drivers/input/rmi4/rmi_driver.c
index 772493b
7 ("soc: qcom: Add broadcast base for Last Level Cache
> Controller (LLCC)")
> Cc: Venkata Narendra Kumar Gutta
> Cc: Evan Green
> Signed-off-by: Stephen Boyd
Reviewed-by: Evan Green
On Tue, Oct 8, 2019 at 6:58 PM Stephen Boyd wrote:
>
> Quoting Bjorn Andersson (2019-10-08 16:55:04)
> > On Tue 08 Oct 16:45 PDT 2019, Stephen Boyd wrote:
> > > @@ drivers/soc/qcom/llcc-slice.c
> > >
> > > static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER;
> > >
> > > --
On Wed, Oct 9, 2019 at 10:46 AM Bjorn Andersson
wrote:
>
> On Wed 09 Oct 09:01 PDT 2019, Evan Green wrote:
>
> > On Tue, Oct 8, 2019 at 6:58 PM Stephen Boyd wrote:
> > >
> > > Quoting Bjorn Andersson (2019-10-08 16:55:04)
> > > > On
llows us to map reserved memory regions as read-only. This way, we're
> less likely to see these special memory regions become corrupted by
> stray writes to them.
>
> Cc: Evan Green
> Cc: Rob Herring
> Cc: Bjorn Andersson
> Cc: Andy Gross
> Cc: Will Deacon
> Cc: Cat
; for random code to corrupt the database and change the contents.
>
> Cc: Evan Green
> Cc: Rob Herring
> Cc: Bjorn Andersson
> Cc: Andy Gross
> Cc: Will Deacon
> Cc: Catalin Marinas
> Cc: Dan Williams
> Reviewed-by: Bjorn Andersson
> Signed-off-by: Stephen Boyd
&g
sys/module/dmatest/parameters/run
Green Wan (3):
dt-bindings: dmaengine: sf-pdma: add bindins for SiFive PDMA
riscv: dts: add support for PDMA device of HiFive Unleashed Rev A00
dmaengine: sf-pdma: add platform DMA support for HiFive Unleashed A00
.../bindings/dma/sifive,fu540-c00
Add DT bindings document for Platform DMA(PDMA) driver of board,
HiFive Unleashed Rev A00.
Signed-off-by: Green Wan
---
.../bindings/dma/sifive,fu540-c000-pdma.yaml | 63 +++
MAINTAINERS | 5 ++
2 files changed, 68 insertions(+)
create mode
Add PDMA support to (arch/riscv/boot/dts/sifive/fu540-c000.dtsi)
Signed-off-by: Green Wan
---
arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
index
--
||--< done 27 >--|ch 2|
||--< err 28 >--|| (dma0chan2)
|| --
|| --
||--< done 29 >--|ch 3|
||--< err 30 >--| | (dma0chan3)
-- --
Signed-off-by: G
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