Marc,
On 2017/8/8 0:56, Marc Zyngier wrote:
> On 07/08/17 17:23, gengdongjiu wrote:
>> Hi Marc,
>> As James's suggestion, I move injection SEA Error logic to the user
>> space(Qemu), Qemu sets the related guest OS esr/elr/pstate/spsr
>> through IOCTL KVM_SET
Marc,
On 2017/8/8 3:07, Marc Zyngier wrote:
> So if you want that information, extract it, expose what is required,
> strictly what is required, and only when it is required.
>
> In the meantime, I'm NAKing this patch, and any patch that will expose
> _EL2 registers outside of nested virtualizati
Hi James,
On 2017/8/9 0:27, James Morse wrote:
> Hi gengdongjiu,
>
> On 07/08/17 18:43, gengdongjiu wrote:
>> Another question, For the SEI, I want to also use SIGBUS both for the KVM
>> user and non-kvm user,
>> if SEA and SEI Error all use the SIGBUS to notify
n");
printk("%s""event severity: %s\n", pfx, cper_severity_str(severity));
snprintf(newpfx, sizeof(newpfx), "%s%s", pfx, INDENT_SP);
apei_estatus_for_each_section {
cper_estatus_print_section(newpfx, gdata, sec_no);
sec_no++;
}
}
>
> Thanks,
>
> Tyler
>
>
> O
Hi,Tyler,
Yes, I will add a patch based on it, thanks a lot that you will also have a
test.
On 2017/8/14 22:04, Baicar, Tyler wrote:
> This change works too, I think it just makes sense to have the iterations in
> the CPER and GHES code match. Do you want to add a patch to your patch here
>
Loop more people to review the patch.
2017-08-15 19:15 GMT+08:00, Dongjiu Geng :
> The revision 0x300 generic error data entry is different
> from the old version, but currently iterating through the
> GHES estatus blocks does not take into account this difference.
> This will lead to failure to
Hi Borislav,
>
> ... and uses that accessor.
>
> Tyler?
>
> I'd prefer if you guys merge your two patches, Tyler's from
> https://marc.info/?l=linux-acpi&m=150179595323038&w=2 and this one into
> a single one.
I think this patch has merged them to one.
>
> How does that sound?
>
> --
> Regards/G
Borislav,
2017-08-16 0:32 GMT+08:00, Borislav Petkov :
> On Wed, Aug 16, 2017 at 12:30:55AM +0800, gengdongjiu wrote:
>> I think this patch has merged them to one.
>
> Look at both patches again.
I ever discuss it with Tyler about it, as shown below link, thanks
https://lkml.org
Hi Tyler ,
> Hello Boris,
>
> His patch fixes the define for apei_estatus_for_each_section which in turn
> should fix ghes_do_proc(). So my patch should no longer be needed. I'm going
> to test this out just to verify if fixes the issue I found.
I have verified the issue about the iteration for t
Hi Christoffer,
thank you very much for your review.
2017-07-03 15:50 GMT+08:00, Christoffer Dall :
> Hi Dongjiu,
>
> It seems you sent this patch twice, once on its own and then part of a
> series?
Christoffer, yes, it is. once on its own and then part of a
series
>
> Also, please use a cover
Hi Christoffer,
thanks for the review.
On 2017/7/3 16:39, Christoffer Dall wrote:
> Hi Dongjiu,
>
> On Mon, Jun 26, 2017 at 08:46:39PM +0800, Dongjiu Geng wrote:
>> when SError happen, kvm notifies user space to record the CPER,
>> user space specifies and passes the contents of ESR_EL1 on tak
Hi Christoffer,
On 2017/7/3 16:23, Christoffer Dall wrote:
> On Tue, Jun 27, 2017 at 08:15:49PM +0800, gengdongjiu wrote:
>> correct the commit message:
>>
>> In the firmware-first RAS solution, OS receives an synchronous
>> external abort, then trapped to EL3 by SC
Hi Christoffer,
On 2017/7/3 16:21, Christoffer Dall wrote:
> On Mon, Jun 26, 2017 at 08:45:43PM +0800, Dongjiu Geng wrote:
>> Handle userspace's detection for RAS extension, because sometimes
>> the userspace needs to know the CPU's capacity
>
> Why? Can you please provide some more rationale.
Hi James,
Thanks for the review. I will read your comments carefully and then reply to
you.
On 2017/7/4 18:14, James Morse wrote:
> Hi gengdongjiu,
>
> Can you give us a specific example of an error you are trying to handle?
> How would a non-KVM user space process handle the err
Hi,suzuki/mark,
very sorry to disturb you, I have a question that want to consult with you.
For the CPU feature detection,
why we use extract 4 bits width for the feature match instead of the actual
bits number[1]? may be the actual hardware feature bit more than 4 bits.
thanks!
static inlin
On 2017/11/28 19:40, Suzuki K Poulose wrote:
> Cc: linux-arm-kernel
>
> On 28/11/17 11:17, gengdongjiu wrote:
>> Hi,suzuki/mark,
>
> Hello!
>
> Please Cc linux-arm-kernel mailing list in the future for any arm/arm64 kernel
> related queries.
Thanks a lot for t
>
> Well, if the feature is not going to be upstream, the change may not be
> accepted.
> You could always add your custom code for "matching" the capability, like for
> e.g,
> ARM64_HAS_VIRT_HOST_EXTN.
Ok, Suzuki, thanks for your suggestion and answer.
>
> Cheers
> Suzuki
>
> .
>
Hi all,
Sorry to disturb you. Now the ARM64 has supported the RAS, when enabling
this feature, we encounter a issue. If the user space application happen page
table RAS error,
Memory error handler(memory_failure()) will do nothing except make a poisoned
page flag, and fault handler in arch/ar
gengdongjiu :
> Hi all,
>Sorry to disturb you. Now the ARM64 has supported the RAS, when enabling
> this feature, we encounter a issue. If the user space application happen page
> table RAS error,
> Memory error handler(memory_failure()) will do nothing except make a poisoned
&
On 2017/12/7 0:15, Will Deacon wrote:
>> --- a/arch/arm64/mm/fault.c
>> +++ b/arch/arm64/mm/fault.c
>> @@ -570,7 +570,6 @@ static int do_sea(unsigned long addr, unsigned int esr,
>> struct pt_regs *regs)
>> {
>> struct siginfo info;
>> const struct fault_info *inf;
>> -int ret = 0;
Hi James,
On 2017/12/7 3:04, James Morse wrote:
> Hi gengdongjiu,
>
> On 06/12/17 10:26, gengdongjiu wrote:
>> On 2017/11/15 0:00, James Morse wrote:
>>>> + * error has not been propagated
>>>> + */
>>>> + run->
Hi james,
Thanks for the mail and sorry for my late response.
2017-10-19 1:21 GMT+08:00, James Morse :
> Hi Dongjiu Geng,
>
> On 17/10/17 15:14, Dongjiu Geng wrote:
>> ARMv8.2 adds a new bit HCR_EL2.TEA which controls to
>> route synchronous external aborts to EL2, and adds a
>> trap control bi
On 2017/10/21 20:15, Borislav Petkov wrote:
>> Signed-off-by: Dongjiu Geng
>> Tested-by: Tyler Baicar
>> Signed-off-by: Borislav Petkov
> I gave you Reviewed-by, not Signed-off-by.
>
> Before you send more patches, read this:
>
> Documentation/process/submitting-patches.rst
>
> You can read
On 2017/10/22 17:38, Rafael J. Wysocki wrote:
>> Tested-by: Tyler Baicar
>> Reviewed-by: Borislav Petkov
> I applied one of the previous iterations.
>
> Do I need to replace it with this version?
>
Thanks a lot Rafael's applying.
Both for me is OK.
If Borislav agreed, may be not.
I will pay att
On 2017/10/22 17:38, Rafael J. Wysocki wrote:
> On Sun, Oct 22, 2017 at 8:54 AM, Dongjiu Geng wrote:
>> For the SEA notification, the two functions ghes_sea_add() and
>> ghes_sea_remove() are only called when CONFIG_ACPI_APEI_SEA
>> is defined. If not, it will return errors in the ghes_probe()
>
Hi James, Will
On 2017/12/7 22:32, James Morse wrote:
> Hi gengdongjiu, Will,
>
> On 07/12/17 05:55, gengdongjiu wrote:
>> On 2017/12/7 0:15, Will Deacon wrote:
>>>> --- a/arch/arm64/mm/fault.c
>>>> +++ b/arch/arm64/mm/fault.c
>>>> @@ -5
On 2017/12/11 19:59, Dave P Martin wrote:
> On Sat, Dec 09, 2017 at 03:28:42PM +, Dongjiu Geng wrote:
>> ARM v8.4 extensions include support for new floating point
>> multiplication variant instructions to the AArch64 SIMD
>
> Do we have any human-readable description of what the new instruct
Hi James,
Thanks for your review and suggestion.
> Hi gengdongjiu,
>
> On 08/12/17 04:43, gengdongjiu wrote:
> > by the way, I think also change the info.si_code to "BUS_MCEERR_AR" is
> > better, as shown [1].
> > BUS_MCEERR_AR can tell user space
Hi,
In the kernel 4.1, I am confused for the
runnable_avg_sum/avg_period/running_avg_sum,
for example below code.
Does the task runnable_avg_sum includes running_avg_sum? Does avg_period
includes the task runnable_avg_sum and the task sleep time? thank you.
static inline void __update_task_entit
201 - 229 of 229 matches
Mail list logo
