From: Marcus Cooper
There are a lot of changes to the sun8i-h3 i2s block but not enough
to warrant to a new driver.
Signed-off-by: Marcus Cooper
---
.../devicetree/bindings/sound/sun4i-i2s.txt| 2 +
sound/soc/sunxi/sun4i-i2s.c| 339 -
2 fil
audio DAC board
To get i2s working some additional patches are required which will be
delivered later. For now they have been pushed here
https://github.com/codekipper/linux-sunxi/commits/sunxi-audio-h3
Thanks in advance,
CK
Marcus Cooper (3):
ASoC: sun4i-i2s: Add more quirks for newer SoCs
From: Marcus Cooper
The set_fmt function pointer is called during probing and this is whilst
the block is disabled. It is over writing the default register values with
the same settings so isn't noticed.
This wasn't a problem with the older SoCs but with the desire to reuse as
much functionlity a
From: Marcus Cooper
In preparation for changing this driver to support newer SoC
implementations then where needed there has been a switch from
regmap_update_bits to regmap_field. Also included are adjustment
variables although they are not set as no adjustment is required
for the current support
From: Marcus Cooper
The sun8i-h3 introduces a lot of changes to the i2s block such
as different register locations, extended clock division and
more operational modes. As we have to consider the earlier
implementation then these changes need to be isolated.
Signed-off-by: Marcus Cooper
---
...
audio DAC board
To get i2s working some additional patches are required which will be
delivered later. For now they have been pushed here
https://github.com/codekipper/linux-sunxi/commits/sunxi-audio-h3
I don't own a A33 device which uses the i2s block for the audio codec
so if someone could
From: Marcus Cooper
The newer SoCs do not have this setting. Instead they set the pin
direction. Add a check to see if the bit is valid and if so set
it accordingly.
Signed-off-by: Marcus Cooper
Reviewed-by: Chen-Yu Tsai
---
sound/soc/sunxi/sun4i-i2s.c | 37 +--
From: Marcus Cooper
The sun8i-h3 introduces a lot of changes to the i2s block such
as different register locations, extended clock division and
more operational modes. As we have to consider the earlier
implementation then these changes need to be isolated.
None of the new functionality has been
audio DAC board
To get i2s working some additional patches are required which will be
delivered later. For now they have been pushed here
https://github.com/codekipper/linux-sunxi/commits/sunxi-audio-h3
I don't own a A33 device which uses the i2s block for the audio codec
so if someone could
From: Marcus Cooper
The default value of the config register is different on newer
SoCs and therefore enabling/disabling with a register write
will clear bits used to set the direction of the clock and frame
pins.
Signed-off-by: Marcus Cooper
Reviewed-by: Chen-Yu Tsai
---
sound/soc/sunxi/sun4
From: Marcus Cooper
The location of the mclk output enable bit is different on newer
SoCs. Use a regmap field to enable it.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/sound/soc/sunxi/sun4i-i
From: Marcus Cooper
On the newer SoCs the bits to configure the operational mode are
located in a different register. Add a regmap field so that this
location can be configured.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 15 ---
1 file changed, 12 insertions(+),
From: Marcus Cooper
On the original i2s block the channel mapping and selection were
configured for stereo audio by default: This is not the case with
the newer SoCs and they are also located at different offsets.
To support the newer SoC then regmap fields have been added to the
quirks and thes
From: Marcus Cooper
On newer SoCs the location of the slot width select and sample
resolution are different and also there is a bigger range of
support.
For the current supported rates then an offset is required.
Signed-off-by: Marcus Cooper
Reviewed-by: Chen-Yu Tsai
---
sound/soc/sunxi/sun4
From: Marcus Cooper
On newer SoCs the bit fields for the blck and lrclk polarity are in
a different locations. Use regmap fields to set the polarity bits
as intended.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 45 -
1 file changed
From: Marcus Cooper
Add the "roofull" vendor prefix for Shenzhen Roofull Technology Co, Ltd.
Signed-off-by: Marcus Cooper
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
b/Docum
From: Marcus Cooper
Add the "itead" vendor prefix for ITEAD Intelligent Systems Co.Ltd.
Signed-off-by: Marcus Cooper
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
b/Documentat
From: Marcus Cooper
The BCLKDIV and MCLKDIV found on newer SoCs start from an offset of 1.
Add the functionality to adjust the division values according to the
needs to the device being used.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 8 ++--
1 file changed, 6 insertion
audio DAC board
To get i2s working some additional patches are required which will be
delivered later. For now they have been pushed here
https://github.com/codekipper/linux-sunxi/commits/sunxi-audio-h3
I don't own a A33 device which uses the i2s block for the audio codec
so if someone could
From: Marcus Cooper
On the newer SoCs the bits to configure the operational mode are
located in a different register. Add a regmap field so that this
location can be configured.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 15 ---
1 file changed, 12 insertions(+),
From: Marcus Cooper
The newer SoCs do not have this setting. Instead they set the pin
direction. Add a check to see if the bit is valid and if so set
it accordingly.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 38 ++
1 file changed, 22 ins
From: Marcus Cooper
On newer SoCs the bit fields for the blck and lrclk polarity are in
a different locations. Use regmap fields to set the polarity bits
as intended.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 45 -
1 file changed
From: Marcus Cooper
The sun8i-h3 introduces a lot of changes to the i2s block such
as different register locations, extended clock division and
more operational modes. As we have to consider the earlier
implementation then these changes need to be isolated.
Signed-off-by: Marcus Cooper
---
...
From: Marcus Cooper
The default value of the config register is different on newer
SoCs and therefore enabling/disabling with a register write
will clear bits used to set the direction of the clock and frame
pins.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 7 ---
1 file
From: Marcus Cooper
On newer SoCs the location of the slot width select and sample
resolution are different and also there is a bigger range of
support.
For the current supported rates then an offset is required.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 31 ++
From: Marcus Cooper
The location of the mclk output enable bit is different on newer
SoCs. Use a regmap field to enable it.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 22 +++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/sound/soc/sunxi/s
From: Marcus Cooper
On the original i2s block the channel mapping and selection were
configured for stereo audio by default: This is not the case with
the newer SoCs and they are also located at different offsets.
To support the newer SoC then regmap fields have been added to the
quirks and thes
From: Marcus Cooper
It has been seen that the newer SoCs have a different TX FIFO
address. Add this to the quirks structure.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/sound/soc/sunxi/sun4i-i2s.c b/soun
From: Marcus Cooper
The newer SoCs have a larger range than the original SoC that this
driver was developed for. By adding the regmap config to the quirks
then the driver can initialise the managed register map correctly.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 10 ++
From: Marcus Cooper
In preparation for the changes required to support newer SoCs then
quirks has been moved and also added to the device structure.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 22 ++
1 file changed, 14 insertions(+), 8 deletions(-)
diff
From: Marcus Cooper
The default value of the config register is different on newer
SoCs and therefore enabling/disabling with a register write
will clear bits used to set the direction of the clock and frame
pins.
Signed-off-by: Marcus Cooper
Reviewed-by: Chen-Yu Tsai
---
sound/soc/sunxi/sun4
From: Marcus Cooper
The BCLKDIV and MCLKDIV found on newer SoCs start from an offset of 1.
Add the functionality to adjust the division values according to the
needs to the device being used.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 8
1 file changed, 8 insertion
From: Marcus Cooper
The newer SoCs do not have this setting. Instead they set the pin
direction. Add a check to see if the bit is valid and if so set
it accordingly.
Signed-off-by: Marcus Cooper
Reviewed-by: Chen-Yu Tsai
---
sound/soc/sunxi/sun4i-i2s.c | 37 +--
From: Marcus Cooper
It has been seen that the newer SoCs have a different TX FIFO
address. Add this to the quirks structure.
Signed-off-by: Marcus Cooper
Reviewed-by: Chen-Yu Tsai
---
sound/soc/sunxi/sun4i-i2s.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/sound/s
From: Marcus Cooper
On the newer SoCs the bits to configure the operational mode are
located in a different register. Add a regmap field so that this
location can be configured.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 16 +---
1 file changed, 13 insertions(+)
From: Marcus Cooper
On newer SoCs the bit fields for the blck and lrclk polarity are in
a different locations. Use regmap fields to set the polarity bits
as intended.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 47 -
1 file changed
From: Marcus Cooper
The sun8i-h3 introduces a lot of changes to the i2s block such
as different register locations, extended clock division and
more operational modes. As we have to consider the earlier
implementation then these changes need to be isolated.
None of the new functionality has been
From: Marcus Cooper
On newer SoCs the location of the slot width select and sample
resolution are different and also there is a bigger range of
support.
For the current supported rates then an offset is required.
Signed-off-by: Marcus Cooper
Reviewed-by: Chen-Yu Tsai
---
sound/soc/sunxi/sun4
From: Marcus Cooper
The location of the mclk output enable bit is different on newer
SoCs. Use a regmap field to enable it.
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 23 ++-
1 file changed, 18 insertions(+), 5 deletions(-)
diff --git a/sound/soc/sunxi/
From: Marcus Cooper
On the original i2s block the channel mapping and selection were
configured for stereo audio by default: This is not the case with
the newer SoCs and they are also located at different offsets.
To support the newer SoC then regmap fields have been added to the
quirks and thes
From: Marcus Cooper
The newer SoCs have a larger range than the original SoC that this
driver was developed for. By adding the regmap config to the quirks
then the driver can initialise the managed register map correctly.
Signed-off-by: Marcus Cooper
Reviewed-by: Chen-Yu Tsai
---
sound/soc/su
audio DAC board
To get i2s working some additional patches are required which will be
delivered later. For now they have been pushed here
https://github.com/codekipper/linux-sunxi/commits/sunxi-audio-h3
I don't own a A33 device which uses the i2s block for the audio codec
so if someone could
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