[PATCH v3 03/13] tile: avoid bug in tilepro net driver built with old hypervisor

Building against headers from an older Tilera hypervisor can cause the frags[] array to be overrun. Don't enable TSO in that case. Signed-off-by: Chris Metcalf --- drivers/net/ethernet/tile/tilepro.c | 9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/driver

[PATCH v3 10/13] tile: support TSO for IPv6 in tilegx network driver

Signed-off-by: Chris Metcalf --- drivers/net/ethernet/tile/tilegx.c | 44 +- 1 file changed, 29 insertions(+), 15 deletions(-) diff --git a/drivers/net/ethernet/tile/tilegx.c b/drivers/net/ethernet/tile/tilegx.c index b80a91f..6d94d58 100644 --- a/drivers

[PATCH v3 09/13] tile: support multiple mPIPE shims in tilegx network driver

The initial driver support was for a single mPIPE shim on the chip (as is the case for the Gx36 hardware). The Gx72 chip has two mPIPE shims, so we extend the driver to handle that case. Signed-off-by: Chris Metcalf --- arch/tile/gxio/iorpc_mpipe_info.c | 18 + arch/tile/gxio/mpipe.c

[PATCH v3 00/13] update tile network drivers

use of dev->hw_features instead of just dev->features Chris Metcalf (13): tile: set hw_features and vlan_features in setup tile: support rx_dropped/rx_errors in tilepro net driver tile: avoid bug in tilepro net driver built with old hypervisor tile: remove dead is_dup_ack() function f

[PATCH v3 01/13] tile: set hw_features and vlan_features in setup

already handles the dependencies for fix_features, and there is no hardware state to tweak in set_features. Signed-off-by: Chris Metcalf --- drivers/net/ethernet/tile/tilegx.c | 15 + drivers/net/ethernet/tile/tilepro.c | 43 - 2 files changed, 25

[PATCH] tile: optimize and clean up string functions

() function on tilegx to spread a single byte value out into a full word using the shufflebytes instruction. - Clean up header include ordering to be more canonical, and remove spurious #undefs of function names. Signed-off-by: Chris Metcalf --- arch/tile/lib/memchr_64.c | 2 +- arch/tile/lib

Re: SDHCI - Add QUIRK2_BROKEN_WRITE_PROTEXT - Support Xilinx Zynq (Linux 3.9.0)

Hi, On Tue, Aug 20 2013, Michal Simek wrote: > Hi James, > > isn't it better to implement host->ops->get_ro() function for it? > It seems me better choice than introducing new quirk option. Yes, I agree. Thanks, - Chris. -- Chris Ball <http://printf.net/> --

Networking problem with 3.11-rc6+

de unless I find that the problem is repeatable. Chris [0.00] Initializing cgroup subsys cpu [0.00] Linux version 3.11.0-rc6+ (chris@laptop) (gcc version 4.8.2 20130815 (prerelease) (GCC) ) #124 SMP PREEMPT Tue Aug 20 10:54:09 BST 2013 [0.00] Disabled fast string operations

Re: linux-next: Tree for Aug 21 [ screen corruption in graphical mode ]

this patch would fix anything - I > >>> think you'd always see an oops when you'd hit this bug instead of just > >>> a bit of corruption. > >> > >> Ok, I think it's time to throw in the towel a bit. I've dropped > >> > >> >

[PATCH 02/20] tile PCI RC: tilepro conflict with PCI and RAM addresses

Fix a bug in the tilepro PCI resource allocation code that could make the bootmem allocator unhappy if 4GB is installed on mshim 0. Signed-off-by: Chris Metcalf --- arch/tile/kernel/setup.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/tile/kernel/setup.c b

[PATCH 01/20] tile PCI RC: cleanups for tilepro PCI RC

- remove unneeded include in pci.c - eliminate unused pci_controller.first_busno field - prefer msleep to mdelay - remove stale comment about pci_scan_bus_parented() Signed-off-by: Chris Metcalf --- arch/tile/include/asm/pci.h | 1 - arch/tile/kernel/pci.c | 16 +++- 2 files

[PATCH 08/20] tile PCI RC: gentler warning for missing plug-in PCI

Besides using pr_info() to print the linkdown status for a plug-in slot, add extra indication that this is expected if the slot is empty. Signed-off-by: Chris Metcalf --- arch/tile/include/hv/drv_trio_intf.h | 5 +++-- arch/tile/kernel/pci_gx.c| 10 -- 2 files changed, 11

[PATCH 18/20] tile PCI RC: support PCIe TRIO 0 MAC 0 on Gx72 system

On Tilera Gx72 systems, the logic for figuring out whether a given port is root complex is slightly different. Signed-off-by: Chris Metcalf --- arch/tile/include/hv/drv_trio_intf.h | 3 +++ arch/tile/kernel/pci_gx.c| 33 ++--- 2 files changed, 33

[PATCH 16/20] tile PCI RC: add dma_get_required_mask()

B but choose to use direct mapping. Neither of these are true for tilegx. Whether to use 64-bit DMA should depend on the PCI device's capability only, not on the amount of DRAM installeds, so we now advertise a 64-bit DMA mask unconditionally. Signed-off-by: Chris Metcalf --- arch/tile/i

[PATCH 20/20] tile PCI RC: remove stale include of linux/numa.h

Signed-off-by: Chris Metcalf --- arch/tile/include/asm/pci.h | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/tile/include/asm/pci.h b/arch/tile/include/asm/pci.h index 2c001b2..c99ad44 100644 --- a/arch/tile/include/asm/pci.h +++ b/arch/tile/include/asm/pci.h @@ -17,7 +17,6

[PATCH 19/20] tile PCI RC: reduce driver's vmalloc space usage

. Signed-off-by: Chris Metcalf --- arch/tile/kernel/pci_gx.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/tile/kernel/pci_gx.c b/arch/tile/kernel/pci_gx.c index f2bf200..4843881 100644 --- a/arch/tile/kernel/pci_gx.c +++ b/arch/tile/kernel/pci_gx.c @@ -860,9

[PATCH 09/20] tile PCI RC: support I/O space access

To enable this functionality, configure CONFIG_TILE_PCI_IO. Without this flag, the kernel still assigns I/O address ranges to the devices, but no TRIO resource and mapping support is provided. We assign disjoint I/O address ranges to separate PCIe domains. Signed-off-by: Chris Metcalf

[PATCH 12/20] tile PCI RC: eliminate pci_controller.mem_resources field

The .mem_resources[] field in the pci_controller struct is now obsoleted by the .mem_space and .io_space fields. Signed-off-by: Chris Metcalf --- arch/tile/include/asm/pci.h | 3 -- arch/tile/kernel/pci_gx.c | 71 - 2 files changed, 12 insertions

[PATCH 06/20] tile: support LSI MEGARAID SAS HBA hybrid dma_ops

functional yet. This change implements a kind of hybrid dma_ops to support this. Signed-off-by: Chris Metcalf --- arch/tile/include/asm/dma-mapping.h | 4 ++-- arch/tile/kernel/pci-dma.c | 17 +++-- 2 files changed, 13 insertions(+), 8 deletions(-) diff --git a/arch/tile/include

[PATCH 17/20] tile PCI DMA: fix bug in non-page-aligned accessors

The code incorrectly masked with PAGE_OFFSET instead of PAGE_SIZE-1. This only matters when trying to do a non page-aligned DMA; it was noticed during code inspection. Signed-off-by: Chris Metcalf --- arch/tile/kernel/pci-dma.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff

[PATCH 15/20] tile PCI RC: use proper accessor function

Using the low-level hv_dev_pread() API makes assumptions about the layout of datastructures in the Tilera hypervisor API; it's better to use the gxio_XXX accessor and the pcie_trio_ports_property struct. Signed-off-by: Chris Metcalf --- arch/tile/kernel/pci_gx.c | 24 +++---

[PATCH 10/20] tile PCI DMA: handle a NULL dev argument properly

Signed-off-by: Chris Metcalf --- arch/tile/kernel/pci-dma.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/tile/kernel/pci-dma.c b/arch/tile/kernel/pci-dma.c index 7e98371..d16cfc1 100644 --- a/arch/tile/kernel/pci-dma.c +++ b/arch/tile/kernel/pci-dma.c @@ -36,8

[PATCH 14/20] tile PCI RC: bomb comments and whitespace format

This change is purely stylistic but improves the readability of the tile PCI RC driver. Signed-off-by: Chris Metcalf --- arch/tile/kernel/pci_gx.c | 180 +++--- 1 file changed, 56 insertions(+), 124 deletions(-) diff --git a/arch/tile/kernel/pci_gx.c b

[PATCH 07/20] tile PCI RC: support more MSI-X interrupt vectors

To support PCIe devices with higher number of MSI-X interrupt vectors, e.g. 16 for the LSI RAID card, enhance the Gx RC stack to provide more MSI-X vectors by using the TRIO Scatter Queues, which provide 8 more vectors in addition to ~10 from the Map Mem regions. Signed-off-by: Chris Metcalf

[PATCH 05/20] tile PCI RC: handle case that PCI link is already up

If we are rebooting (e.g. via kexec) then the PCI RC link may already be up. In that case, we don't want to do the software fixup to force the link up, since that can degrade it to Gen1. Signed-off-by: Chris Metcalf --- arch/tile/kernel/pci_gx.c

[PATCH 13/20] tile PCI RC: include pci/pcie/Kconfig

Signed-off-by: Chris Metcalf --- arch/tile/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig index bfff769..e41a381 100644 --- a/arch/tile/Kconfig +++ b/arch/tile/Kconfig @@ -408,6 +408,8 @@ config TILE_PCI_IO source "drivers/pci/Kc

[PATCH 04/20] tile PCI RC: tweak the the pcie_rc_delay support

Allow longer delays if requested, and print the info messages as we are performing the delay, not when parsing the arguments. Signed-off-by: Chris Metcalf --- arch/tile/kernel/pci_gx.c | 35 --- 1 file changed, 16 insertions(+), 19 deletions(-) diff --git a/arch

[PATCH 11/20] tile PCI RC: restructure TRIO initialization

: Chris Metcalf --- arch/tile/include/asm/pci.h | 1 + arch/tile/kernel/pci_gx.c | 209 +--- 2 files changed, 118 insertions(+), 92 deletions(-) diff --git a/arch/tile/include/asm/pci.h b/arch/tile/include/asm/pci.h index 9cf5308..1f1b654 100644 --- a

[PATCH 00/20] PCI root complex changes for tile architecture

These changes add new features and fix bugs in the Tilera PCI root complex subsystem. Among the new tilegx features are support for I/O space access, more MXI-X interrupt vectors, and support for TRIO 0 MAC 0 on Gx72 systems. Chris Metcalf (20): tile PCI RC: cleanups for tilepro PCI RC tile

[PATCH 03/20] tile PCI RC: support pci=off boot arg for tilepro

Signed-off-by: Chris Metcalf --- arch/tile/kernel/pci.c | 17 + 1 file changed, 17 insertions(+) diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c index 1dae3b2..af75835 100644 --- a/arch/tile/kernel/pci.c +++ b/arch/tile/kernel/pci.c @@ -51,6 +51,8

Re: [PATCH 06/20] tile: support LSI MEGARAID SAS HBA hybrid dma_ops

On 8/5/2013 4:52 PM, Konrad Rzeszutek Wilk wrote: > On Mon, Aug 05, 2013 at 04:06:20PM -0400, Chris Metcalf wrote: >> The LSI MEGARAID SAS HBA suffers from the problem where it can do >> 64-bit DMA to streaming buffers but not to consistent buffers. >> In other words, 64-bit

[PATCH v2] tile: support LSI MEGARAID SAS HBA hybrid dma_ops

make it necessary to have separate dma_ops. Signed-off-by: Chris Metcalf --- arch/tile/include/asm/dma-mapping.h | 10 +++--- arch/tile/kernel/pci-dma.c | 40 - 2 files changed, 38 insertions(+), 12 deletions(-) diff --git a/arch/tile/include/as

[PATCH] tile: avoid recursive backtrace faults

ose the ability to backtrace through a userspace call to a bad address above PAGE_OFFSET, even though that it can be perfectly reasonable to continue the backtrace in such a case. Signed-off-by: Chris Metcalf --- arch/tile/include/asm/processor.h | 2 ++ arch/tile/kernel/stack.

[PATCH] tile: fix tilegx vmalloc_sync_all BUG_ON

As specified, the test wasn't correct, and in any case it should be a BUILD_BUG_ON. Signed-off-by: Chris Metcalf --- arch/tile/mm/fault.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/tile/mm/fault.c b/arch/tile/mm/fault.c index f7f99f9..6152819 100644 --- a

[PATCH] tile: fix comment bug in sys_cmpxchg description

Signed-off-by: Chris Metcalf --- arch/tile/kernel/intvec_32.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/tile/kernel/intvec_32.S b/arch/tile/kernel/intvec_32.S index cb52d66..25966af 100644 --- a/arch/tile/kernel/intvec_32.S +++ b/arch/tile/kernel/intvec_32.S

[PATCH] mm: make lru_add_drain_all() selective

This change makes lru_add_drain_all() only selectively interrupt the cpus that have per-cpu free pages that can be drained. This is important in nohz mode where calling mlockall(), for example, otherwise will interrupt every core unnecessarily. Signed-off-by: Chris Metcalf --- include/linux

[PATCH] tile: support "memmap" boot parameter

the e820 information from the BIOS like x86 does. I did add support for "memmap=nn" (and the synonym "mem=nn") which cap the highest PA value at "nn"; these are both just a synonym for the existing tile boot option "maxmem". Signed-off-by: Chris Metcalf

[PATCH] tile: various console improvements

end output to the "console" as a slightly faster alternative to emulating the hardware more directly. Signed-off-by: Chris Metcalf --- arch/tile/Kconfig | 1 + arch/tile/include/asm/setup.h | 3 +- arch/tile/include/hv/hypervisor.h | 29 +++- arch/tile/k

[PATCH] tile: remove unnecessary backslashes in asm-offsets.c

Pointed out by checkpatch. A few of the DEFINE() lines were properly written without backslash continuation; fix the rest. Signed-off-by: Chris Metcalf --- arch/tile/kernel/asm-offsets.c | 28 ++-- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/arch

[PATCH v2] mm: make lru_add_drain_all() selective

This change makes lru_add_drain_all() only selectively interrupt the cpus that have per-cpu free pages that can be drained. This is important in nohz mode where calling mlockall(), for example, otherwise will interrupt every core unnecessarily. Signed-off-by: Chris Metcalf --- Oops! In the

[PATCH] tile: remove calls to arch_flush_lazy_mmu_mode()

Since it's a no-op on tile anyway, there's no reason to be calling it in tile-specific code. Signed-off-by: Chris Metcalf --- arch/tile/mm/fault.c | 5 ++--- arch/tile/mm/highmem.c | 2 -- 2 files changed, 2 insertions(+), 5 deletions(-) diff --git a/arch/tile/mm/fault.c b/ar

[PATCH] tile: add some tile drivers to MAINTAINERS

Also, alphabetize the existing entries for tile. Signed-off-by: Chris Metcalf --- MAINTAINERS | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index bf61e04..8f49198 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8288,9 +8288,13 @@ M

[PATCH] tile: support CONFIG_PREEMPT

turns out they weren't being used. Signed-off-by: Chris Metcalf --- arch/tile/Kconfig | 2 ++ arch/tile/include/asm/homecache.h | 8 arch/tile/include/asm/irqflags.h | 21 ++--- arch/tile/kernel/asm-offsets.c| 2 ++ arch/tile/kernel/hardw

[PATCH] tile: support simulator notification for ET_DYN objects

ant of the SIM_CONTROL_DLOPEN simulator notification that newer simulators will recognize and use to set the base address for the next SIM_CONTROL_OS_EXEC notification. Signed-off-by: Chris Metcalf --- arch/tile/mm/elf.c | 62 ++ 1 file changed, 48

[PATCH] tile: improve big-endian support

d_NN.S assembly code to properly extract two 32-bit structure members from a 64-bit register holding the structure. Signed-off-by: Chris Metcalf --- arch/tile/include/asm/unaligned.h | 14 +- arch/tile/include/hv/hypervisor.h | 16 arch/tile/kernel/head_6

[PATCH] tile: avoid struct vm_struct leak

If ioreamp_prot() fails in ioremap_page_range() due to kernel memory exhaustion, we previously would leak a struct vm_struct. Signed-off-by: Chris Metcalf --- arch/tile/mm/pgtable.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/tile/mm/pgtable.c b/arch/tile/mm

[PATCH] arch/tile: provide traceability for hypervisor calls

symbol type and generally make them appear more as symbols and less as just random values in the Elf namespace. Signed-off-by: Chris Metcalf --- arch/tile/Kconfig.debug | 8 ++ arch/tile/kernel/Makefile | 3 +- arch/tile/kernel/head_32.S | 8 +- arch/tile/kernel/head_64.S

[PATCH] tile: improve illegal translation interrupt handling

_PC reason into the trap handler so we can report it properly; this is the address that caused the illegal translation trap. We print the address as part of the pr_alert() message now if it's coming from the kernel. Signed-off-by: Chris Metcalf --- arch/tile/kernel/intvec_64.S | 2 +- a

[PATCH] tile: make register dumps more readable

It's much easier to read register dumps if you read vertically rather than horizontally, since the register numbers line up and lead the eye down more than to the right. Signed-off-by: Chris Metcalf --- arch/tile/kernel/process.c | 20 ++-- 1 file changed, 10 insertions(+

[PATCH] tile: implement gettimeofday() via vDSO

support by booting with vdso=0, but the rt_sigreturn vDSO page will still be provided.) Note that glibc has supported the tile vDSO since release 2.17. Signed-off-by: Chris Metcalf --- arch/tile/Kconfig | 3 + arch/tile/include/asm/elf.h | 5 + arch/tile/include

[PATCH] tile: fix some issues in hugepage support

. Second, use the standard pte_alloc_map() instead of the hand-rolled pte_alloc_hugetlb() routine that basically was written to avoid worrying about CONFIG_HIGHPTE. However, we no longer plan to support HIGHPTE, so a separate routine was just unnecessary code duplication. Signed-off-by: Chris

[PATCH v3 1/2] workqueue: add new schedule_on_cpu_mask() API

Signed-off-by: Chris Metcalf --- v3: split commit into two, one for workqueue and one for mm, though both should probably be taken through -mm. include/linux/workqueue.h | 3 +++ kernel/workqueue.c| 35 ++- 2 files changed, 29 insertions(+), 9 deletions(-)

[PATCH v3 2/2] mm: make lru_add_drain_all() selective

This change makes lru_add_drain_all() only selectively interrupt the cpus that have per-cpu free pages that can be drained. This is important in nohz mode where calling mlockall(), for example, otherwise will interrupt every core unnecessarily. Signed-off-by: Chris Metcalf --- v3: split commit

[PATCH v4 2/2] mm: make lru_add_drain_all() selective

This change makes lru_add_drain_all() only selectively interrupt the cpus that have per-cpu free pages that can be drained. This is important in nohz mode where calling mlockall(), for example, otherwise will interrupt every core unnecessarily. Signed-off-by: Chris Metcalf --- v4: don't

[PATCH v4 1/2] workqueue: add new schedule_on_cpu_mask() API

Signed-off-by: Chris Metcalf --- v4: don't lose possible -ENOMEM in schedule_on_each_cpu() (Note: no change to the mm/swap.c commit) v3: split commit into two, one for workqueue and one for mm, though both should probably be taken through -mm. include/linux/workqueue.h | 3 +++ ker

[PATCH 1/2] time: allow changing the timekeeper clock frequency

functions. Signed-off-by: Chris Metcalf --- If these patches are OK, I can push them as part of the tile tree. Otherwise, they should probably be pushed through a single tree either by the timekeeping folks or (more likely?) the cpu frequency driver folks. Let me know what makes the most sense; for

[PATCH 2/2] tile: implement dynamic frequency changing

implements the hv_set_speed() API. Signed-off-by: Chris Metcalf --- If these patches are OK, I can push them as part of the tile tree. Otherwise, they should probably be pushed through a single tree either by the timekeeping folks or (more likely?) the cpu frequency driver folks. Let me know what

Re: dw_mmc: Does anyone use multiple slots?

> something that nobody uses. I agree with Olof, for what it's worth. (The maintainers of the driver are Jaehoon and Seungwon, though.) Thanks, - Chris. -- Chris Ball <http://printf.net/> -- To unsubscribe from this list: send the line "unsubscribe linux-kernel"

[PATCH 09/13] tile: enable GRO in the tilegx network driver

Signed-off-by: Chris Metcalf --- drivers/net/ethernet/tile/tilegx.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/tile/tilegx.c b/drivers/net/ethernet/tile/tilegx.c index b34fd2c..9c128ff 100644 --- a/drivers/net/ethernet/tile/tilegx.c +++ b/drivers

[PATCH 11/13] tile: support TSO for IPv6 in tilegx network driver

Signed-off-by: Chris Metcalf --- drivers/net/ethernet/tile/tilegx.c | 44 +- 1 file changed, 29 insertions(+), 15 deletions(-) diff --git a/drivers/net/ethernet/tile/tilegx.c b/drivers/net/ethernet/tile/tilegx.c index 18eb7b9..04fe597 100644 --- a/drivers

[PATCH 03/13] tile: avoid bug in tilepro net driver built with old hypervisor

Building against headers from an older Tilera hypervisor can cause the frags[] array to be overrun. Don't enable TSO in that case. Signed-off-by: Chris Metcalf --- drivers/net/ethernet/tile/tilepro.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/driver

[PATCH 12/13] tile: make "tile_net.custom" a proper bool module parameter

Signed-off-by: Chris Metcalf --- drivers/net/ethernet/tile/tilegx.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/tile/tilegx.c b/drivers/net/ethernet/tile/tilegx.c index 04fe597..e4a0994 100644 --- a/drivers/net/ethernet/tile/tilegx.c +++ b

[PATCH 13/13] tile: remove deprecated NETIF_F_LLTX flag from tile drivers

Signed-off-by: Chris Metcalf --- drivers/net/ethernet/tile/tilegx.c | 1 - drivers/net/ethernet/tile/tilepro.c | 3 --- 2 files changed, 4 deletions(-) diff --git a/drivers/net/ethernet/tile/tilegx.c b/drivers/net/ethernet/tile/tilegx.c index e4a0994..dd55c2c 100644 --- a/drivers/net/ethernet

[PATCH 05/13] tile: support PTP using the tilegx mPIPE (IEEE 1588)

Signed-off-by: Chris Metcalf --- arch/tile/gxio/iorpc_mpipe.c | 19 arch/tile/include/gxio/iorpc_mpipe.h | 4 + arch/tile/include/gxio/mpipe.h | 13 +++ drivers/net/ethernet/tile/Makefile | 1 + drivers/net/ethernet/tile/tilegx.c | 56 + drivers

[PATCH 08/13] tile: fix panic bug in napi support for tilegx network driver

r-cpu data, so we can arrange to set up and tear down all the NAPI state on the core driving the process, and just do the IRQ enable/disable as a smp_call_function thing. Signed-off-by: Chris Metcalf --- drivers/net/ethernet/tile/tilegx.c | 65 +++--- 1 file change

[PATCH 04/13] tile: remove dead is_dup_ack() function from tilepro net driver

Signed-off-by: Chris Metcalf --- drivers/net/ethernet/tile/tilepro.c | 76 - 1 file changed, 76 deletions(-) diff --git a/drivers/net/ethernet/tile/tilepro.c b/drivers/net/ethernet/tile/tilepro.c index dd3a39c..7182855 100644 --- a/drivers/net/ethernet/tile

[PATCH 06/13] tile: support jumbo frames in the tilegx network driver

Signed-off-by: Chris Metcalf --- arch/tile/gxio/iorpc_mpipe.c | 47 + arch/tile/gxio/mpipe.c | 18 +- arch/tile/include/gxio/iorpc_mpipe.h | 4 + arch/tile/include/gxio/mpipe.h | 101 +- drivers/net/ethernet/tile/tilegx.c | 349

[PATCH 10/13] tile: support multiple mPIPE shims in tilegx network driver

The initial driver support was for a single mPIPE shim on the chip (as is the case for the Gx36 hardware). The Gx72 chip has two mPIPE shims, so we extend the driver to handle that case. Signed-off-by: Chris Metcalf --- arch/tile/gxio/iorpc_mpipe_info.c | 18 + arch/tile/gxio/mpipe.c

[PATCH 02/13] tile: support rx_dropped/rx_errors in tilepro net driver

Signed-off-by: Chris Metcalf --- drivers/net/ethernet/tile/tilepro.c | 41 ++--- 1 file changed, 15 insertions(+), 26 deletions(-) diff --git a/drivers/net/ethernet/tile/tilepro.c b/drivers/net/ethernet/tile/tilepro.c index 0237031..84a179e 100644 --- a/drivers

[PATCH 07/13] tile: update dev->stats directly in tilegx network driver

Signed-off-by: Chris Metcalf --- drivers/net/ethernet/tile/tilegx.c | 29 - 1 file changed, 8 insertions(+), 21 deletions(-) diff --git a/drivers/net/ethernet/tile/tilegx.c b/drivers/net/ethernet/tile/tilegx.c index 8d1f748..a245858 100644 --- a/drivers/net/ethernet

[PATCH 01/13] tile: handle 64-bit statistics in tilepro network driver

Signed-off-by: Chris Metcalf --- drivers/net/ethernet/tile/tilepro.c | 42 ++--- 1 file changed, 20 insertions(+), 22 deletions(-) diff --git a/drivers/net/ethernet/tile/tilepro.c b/drivers/net/ethernet/tile/tilepro.c index 3643549..0237031 100644 --- a/drivers

[PATCH 00/13] update tile network drivers

statistics improvements. The series can be pulled from: git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile.git tile-net-next Chris Metcalf (13): tile: handle 64-bit statistics in tilepro network driver tile: support rx_dropped/rx_errors in tilepro net driver tile: avoid bug

[PATCH] mvsas: fix unaligned-access kernel panic under heavy disk testing

The slot->response value may not be aligned, so should be read using the appropriate kernel "unaligned" accessor. Signed-off-by: Chris Metcalf --- drivers/scsi/mvsas/mv_sas.c | 5 +++-- drivers/scsi/mvsas/mv_sas.h | 1 + 2 files changed, 4 insertions(+), 2 deletions(-) diff --

Re: [PATCH] mvsas: fix unaligned-access kernel panic under heavy disk testing

On 7/23/2013 5:00 PM, James Bottomley wrote: > On Tue, 2013-07-23 at 16:50 -0400, Chris Metcalf wrote: >> > The slot->response value may not be aligned, so should be read >> > using the appropriate kernel "unaligned" accessor. > Hm, institutional memory re-pr

Re: [PATCH 09/13] tile: enable GRO in the tilegx network driver

On 7/23/2013 5:19 PM, Eric Dumazet wrote: > On Tue, 2013-07-23 at 16:05 -0400, Chris Metcalf wrote: >> Signed-off-by: Chris Metcalf >> --- >> drivers/net/ethernet/tile/tilegx.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >> diff --git a/d

Re: [PATCH] mvsas: fix unaligned-access kernel panic under heavy disk testing

On 7/23/2013 6:33 PM, James Bottomley wrote: > On Tue, 2013-07-23 at 17:17 -0400, Chris Metcalf wrote: >> On 7/23/2013 5:00 PM, James Bottomley wrote: >>> On Tue, 2013-07-23 at 16:50 -0400, Chris Metcalf wrote: >>>>> The slot->response value may not be aligne

Re: [PATCH 05/13] tile: support PTP using the tilegx mPIPE (IEEE 1588)

On 7/24/2013 2:29 AM, Richard Cochran wrote: > On Tue, Jul 23, 2013 at 04:05:48PM -0400, Chris Metcalf wrote: > >> diff --git a/drivers/ptp/Kconfig b/drivers/ptp/Kconfig >> index 5be73ba..255ed1a 100644 >> --- a/drivers/ptp/Kconfig >> +++ b/drivers/ptp/Kconfi

[PATCH v2] tile: support PTP using the tilegx mPIPE (IEEE 1588)

Signed-off-by: Chris Metcalf --- v2: - Moved Kconfig stanza to drivers/ethernet/tile/Kconfig - Clarify minimum and maximum frequency adjustments - Merge PTP support into tilegx.c driver source code directly - Support SIOCSHWTSTAMP ioctl appopriately - Rebased to be the last patch in the

Re: [Intel-gfx] linux-next: Tree for Jul 25 [ call-trace: drm | drm-intel related? ]

] Server terminated with error (1). Closing log file. Please attach the full Xorg.0.log so that I can make a few guesses. -Chris -- Chris Wilson, Intel Open Source Technology Centre -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to m

[PATCH v2] tile: handle 64-bit statistics in tilepro network driver

Signed-off-by: Chris Metcalf --- v2: use primitives drivers/net/ethernet/tile/tilepro.c | 77 ++--- 1 file changed, 54 insertions(+), 23 deletions(-) diff --git a/drivers/net/ethernet/tile/tilepro.c b/drivers/net/ethernet/tile/tilepro.c index 3643549..f66ac20

Re: [Intel-gfx] linux-next: Tree for Jul 25 [ call-trace: drm | drm-intel related? ]

On Thu, Jul 25, 2013 at 06:35:10PM +0200, Sedat Dilek wrote: > On Thu, Jul 25, 2013 at 6:31 PM, Chris Wilson > wrote: > > On Thu, Jul 25, 2013 at 06:11:18PM +0200, Sedat Dilek wrote: > >> Might be OT, but I cannot use my X graphics stack containing > >> libdrm-2.

Re: [Intel-gfx] linux-next: Tree for Jul 25 [ call-trace: drm | drm-intel related? ]

On Thu, Jul 25, 2013 at 07:15:03PM +0200, Sedat Dilek wrote: > On Thu, Jul 25, 2013 at 7:01 PM, Chris Wilson > wrote: > > Basically boils down to either an object allocation failure or mmaping > > failure. I think dmesg with drm.debug=7 is the next step. > > Attached

Re: [Intel-gfx] linux-next: Tree for Jul 25 [ call-trace: drm | drm-intel related? ]

On Thu, Jul 25, 2013 at 07:52:22PM +0200, Sedat Dilek wrote: > On Thu, Jul 25, 2013 at 7:26 PM, Chris Wilson > wrote: > > On Thu, Jul 25, 2013 at 07:15:03PM +0200, Sedat Dilek wrote: > >> On Thu, Jul 25, 2013 at 7:01 PM, Chris Wilson > >> wrote: > >> >

Re: [Intel-gfx] linux-next: Tree for Jul 25 [ call-trace: drm | drm-intel related? ]

PAGE_SHIFT; @@ -1655,6 +1664,7 @@ out: drm_gem_object_unreference(&obj->base); unlock: mutex_unlock(&dev->struct_mutex); + DRM_DEBUG_DRIVER("done, ret=%d\n", ret); return ret; } -- Chris Wilson, Intel Open Source Technology Centre -- To unsubscribe from

Re: [Intel-gfx] linux-next: Tree for Jul 25 [ call-trace: drm | drm-intel related? ]

DRM_DEBUG_DRIVER("Failed to allocate mmap offset (ret=%d)\n", ret); goto out; + } *offset = drm_vma_node_offset_addr(&obj->base.vma_node); @@ -1558,6 +1567,7 @@ out: drm_gem_object_unreference(&obj->base); unlock: mutex_unlock(&dev-

Re: [Intel-gfx] linux-next: Tree for Jul 25 [ call-trace: drm | drm-intel related? ]

el_glamor_create_screen_resources(screen)) + if (!intel_glamor_create_screen_resources(screen)) { + ErrorF("bang: %d\n", __LINE__); return FALSE; + } return TRUE; } -- Chris Wilson, Intel Open Source Technology Centre -- To unsubscribe

Re: [PATCH 04/36] tile: srom: convert srom_class to use dev_groups

itialization for 'srom_dev_attrs[1].mode') [enabled by default] drivers/char/tile-srom.c:312:1: warning: initialization from incompatible pointer type [enabled by default] drivers/char/tile-srom.c:312:1: warning: (near initialization for 'srom_dev_group.attrs') [enabled by defa

Re: [Intel-gfx] linux-next: Tree for Jul 25 [ call-trace: drm | drm-intel related? ]

ErrorF("%s:%d bang, errno=%d\n", __func__, __LINE__, -ret); return FALSE; + } pixmap = screen->GetScreenPixmap(screen); intel_set_pixmap_bo(pixmap, bo); which is most likely to report EINVAL (22)? -Chris -- Chris Wilson, Intel Open Sourc

Re: [PATCH 2/2] x86: add early quirk for reserving Intel graphics stolen memory v3

for 32 bit reads instead of adding a new one > (Chris) > add gen6 stolen size function (Chris) > use a function pointer (Chris) > drop gen2 bits (Daniel) As a reminder, can you please reorder the entries in the macro to ease compilation by userspace - c++ doesn'

Re: [PATCH 2/2] x86: add early quirk for reserving Intel graphics stolen memory v3

Hmm, interesting licence block in i915_pciids.h - our claim to grant licence but TG disclaims liability. -Chris -- Chris Wilson, Intel Open Source Technology Centre -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.

Re: [PATCH 1/2] drm/i915: split PCI IDs out into i915_drm.h v3

On Thu, Jul 25, 2013 at 09:37:48AM -0700, Jesse Barnes wrote: > For use by userspace (at some point in the future) and other kernel code. > > v2: move PCI IDs to uabi (Chris) > move PCI IDs to drm/ (Dave) > v3: fixup Quanta detection - needs to come first (Daniel) O

Re: [Intel-gfx] linux-next: Tree for Jul 25 [ call-trace: drm | drm-intel related? ]

On Fri, Jul 26, 2013 at 01:21:07AM +0200, Sedat Dilek wrote: > On Thu, Jul 25, 2013 at 11:52 PM, Chris Wilson > wrote: > > On Thu, Jul 25, 2013 at 10:07:02PM +0200, Sedat Dilek wrote: > >> What means the bang line? > >> > >> [54.564] (II) GLX: In

Re: [Intel-gfx] linux-next: Tree for Jul 25 [ call-trace: drm | drm-intel related? ]

rce conflicts). Hmm, though we only started checking for map failures in 2.20.10 - which would explain why going back to the older ddx masks the issue. And yes, this means we do require a kernel bisect - or some passing inspiron. -Chris -- Chris Wilson, Intel Open Source Technology Centre --

Re: [Intel-gfx] linux-next: Tree for Jul 25 [ call-trace: drm | drm-intel related? ]

> > Now, really w/ promised attachment. Yes, same failure (GTT mmaps) but at a later point, and UXA has no fallback plan. -Chris -- Chris Wilson, Intel Open Source Technology Centre -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a mess

Re: [PATCH v4 1/2] workqueue: add new schedule_on_cpu_mask() API

On 8/9/2013 11:02 AM, Tejun Heo wrote: > Hello, Chris. > > On Wed, Aug 07, 2013 at 04:49:44PM -0400, Chris Metcalf wrote: >> This primitive allows scheduling work to run on a particular set of >> cpus described by a "struct cpumask". This can be useful, for ex

[PATCH v5 1/2] workqueue: add new schedule_on_cpu_mask() API

Signed-off-by: Chris Metcalf --- v5: provide validity checking on the cpumask for schedule_on_cpu_mask. By providing an all-or-nothing EINVAL check, we impose the requirement that the calling code actually know clearly what it's trying to do. (Note: no change to the mm/swap.c commit) v4: don&

[PATCH v5 2/2] mm: make lru_add_drain_all() selective

This change makes lru_add_drain_all() only selectively interrupt the cpus that have per-cpu free pages that can be drained. This is important in nohz mode where calling mlockall(), for example, otherwise will interrupt every core unnecessarily. Signed-off-by: Chris Metcalf --- v5: provide

[PATCH v6 1/2] workqueue: add new schedule_on_cpu_mask() API

Acked-by: Tejun Heo Signed-off-by: Chris Metcalf --- v6: add Tejun's Acked-by, and add missing get/put_cpu_online to lru_add_drain_all(). v5: provide validity checking on the cpumask for schedule_on_cpu_mask. By providing an all-or-nothing EINVAL check, we impose the requirement that t

[PATCH v6 2/2] mm: make lru_add_drain_all() selective

This change makes lru_add_drain_all() only selectively interrupt the cpus that have per-cpu free pages that can be drained. This is important in nohz mode where calling mlockall(), for example, otherwise will interrupt every core unnecessarily. Signed-off-by: Chris Metcalf --- v6: add Tejun&#

[PATCH] tile: use proper .align directives on __ex_table sections

This may fix a reported bug where an R_TILEGX_64 in a module was not pointing to an aligned address. Reported-by: Simon Marchi Signed-off-by: Chris Metcalf --- arch/tile/include/asm/futex.h | 1 + arch/tile/include/asm/uaccess.h | 6 ++ arch/tile/lib/atomic_asm_32.S | 1 + arch/tile

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