PCI-E + board specific quirk
Suggestions and feedback welcome.
Based on v4.7-rc7
Regards,
ZubairLK
Zubair Lutfullah Kakakhel (3):
misc: pch_phub: Read prefetch value from device tree if passed
misc: pch_phub: Add UART_CLK quirk for Boston platform
serial: pch_uart: Add support for reading clock
The default prefetch value for the eg20t device is hard coded to
0x000affaa.
Add support for an alternative to be read from DT if available
Signed-off-by: Zubair Lutfullah Kakakhel
---
drivers/misc/pch_phub.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers
the internal clock source for the UART to function.
Boston is based on device tree.
Add a quirk to allow Boston to be detected via device tree and set the
correct clock source for UART.
Signed-off-by: Zubair Lutfullah Kakakhel
---
drivers/misc/pch_phub.c | 11 +++
1 file changed, 11
The MIPS based Boston platform provides a 25MHz clock to the UART.
Enable the driver for MIPS and add support in the driver to read
the frequency from device tree.
Signed-off-by: Zubair Lutfullah Kakakhel
---
drivers/tty/serial/Kconfig| 2 +-
drivers/tty/serial/pch_uart.c | 4
2 files
Hi,
On 09/08/2016 12:07 AM, David Miller wrote:
From: Zubair Lutfullah Kakakhel
Date: Mon, 5 Sep 2016 13:07:54 +0100
The MIPS based xilfpga platform uses this driver.
Enable it for MIPS
Signed-off-by: Zubair Lutfullah Kakakhel
---
V1 -> V6 are from a series that has gotten too big.
S
The xilfpga platform has an AXI I2C Bus master with a temperature
sensor connected to it.
Add the device tree node to use them.
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 -> V3
No change
V1 -> V2
No change
---
arch/mips/boot/dts/xilfpga/nexys4ddr.dts | 22 ++
This prepares the code use the Xilinx AXI Interrupt Controller
driver now available in drivers/irqchip/irq-xilinx.c
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 -> V3
No change
V1 -> V2
No change
---
arch/mips/xilfpga/intc.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
IRQs from peripherals such as i2c/uart/ethernet come via
the AXI Interrupt controller.
Select it in Kconfig for xilfpga and add the DT node
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 -> V3
No change
V1 -> V2
Renamed select XILINX_INTC to select XILINX_AXI_INTC
---
arch/mips/K
The drivers read/write function handling is a bit quirky.
And the irqmask is passed directly to the handler.
Add a new irqchip struct to pass to the handler and
cleanup read/write handling.
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 -> V3
New patch. Cleans up driver structure
---
driv
The Xilinx AXI Interrupt Controller IP block is used by the MIPS
based xilfpga platform.
Move the interrupt controller code out of arch/microblaze so that
it can be used by everyone
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 -> V3
No change here. Cleanup patches follow after this pa
The MIPS based xilfpga platform has the following IRQ structure
Peripherals --> xilinx_intcontroller -> mips_cpu_int controller
Add support for the driver to chain the irq handler
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 -> V3
Reused existing parent node instead of find
The xilfpga platform has a Xilinx AXI emaclite block.
Add the DT node to use it.
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 -> V3
No change
V1 -> V2
Removed accidental local-mac-address entry
---
arch/mips/boot/dts/xilfpga/nexys4ddr.dts | 26 ++
1 file c
The MIPS based xilfpga platform uses this driver.
Enable it for MIPS
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 -> V3
No change
V1 -> V2
No change
---
drivers/net/ethernet/xilinx/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/
r a bit based on feedback
Rebase to v4.8-rc4
V1 -> V2
Resubmitting without truncating the diff output for file moves
Removed accidental local mac address entry
Individual logs have more detail
Zubair Lutfullah Kakakhel (11):
microblaze: irqchip: Move intc driver to irqchip
irqchip: axi-intc:
Update defconfig to enable emaclite, i2c, temp sensor found on the
xilfpga platform
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 -> V3
No change
V1 -> V2
No change
---
arch/mips/configs/xilfpga_defconfig | 37 -
1 file changed, 36 insertions
At the moment, if the emaclite device doesn't find a mac address
from any source, it simply uses 0x0 with a warning printed.
Instead of using a 0x0 mac address, use a randomly generated one.
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 -> V3
No change
V1 -> V2
New patch
---
Update the DT node with the UART irq
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 -> V3
No change
V1 -> V2
No change
---
arch/mips/boot/dts/xilfpga/nexys4ddr.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/mips/boot/dts/xilfpga/nexys4ddr.dts
b/arch/mips/boot/dts/x
Hi,
Thank you for the reviews.
Some comments below
On 08/31/2016 05:52 PM, Marc Zyngier wrote:
On 31/08/16 17:35, Zubair Lutfullah Kakakhel wrote:
The drivers read/write function handling is a bit quirky.
And the irqmask is passed directly to the handler.
Add a new irqchip struct to pass to
Hi,
Thanks for the review
Comments inline.
On 08/31/2016 05:57 PM, Marc Zyngier wrote:
On 31/08/16 17:35, Zubair Lutfullah Kakakhel wrote:
The MIPS based xilfpga platform has the following IRQ structure
Peripherals --> xilinx_intcontroller -> mips_cpu_int controller
Add support f
Hi,
On 09/01/2016 01:14 PM, Marc Zyngier wrote:
On 01/09/16 12:01, Zubair Lutfullah Kakakhel wrote:
Hi,
Thanks for the review
Comments inline.
On 08/31/2016 05:57 PM, Marc Zyngier wrote:
On 31/08/16 17:35, Zubair Lutfullah Kakakhel wrote:
The MIPS based xilfpga platform has the following
On 09/01/2016 11:57 AM, Lars-Peter Clausen wrote:
On 08/31/2016 06:35 PM, Zubair Lutfullah Kakakhel wrote:
[..]
+ ad7420@4B {
+ compatible = "adt7420";
"adi,adt7420"
danke schoen
:)
ZubairLK
+ reg = <0x4B>;
+ };
+ } ;
};
On 09/01/2016 11:52 AM, Sergei Shtylyov wrote:
Hello.
On 8/31/2016 7:35 PM, Zubair Lutfullah Kakakhel wrote:
At the moment, if the emaclite device doesn't find a mac address
from any source, it simply uses 0x0 with a warning printed.
Instead of using a 0x0 mac address, use a ran
IRQs from peripherals such as i2c/uart/ethernet come via
the AXI Interrupt controller.
Select it in Kconfig for xilfpga and add the DT node
Signed-off-by: Zubair Lutfullah Kakakhel
---
V3 -> V4
No change
V2 -> V3
No change
V1 -> V2
Renamed select XILINX_INTC to select XILINX
The xilfpga platform has a Xilinx AXI emaclite block.
Add the DT node to use it.
Signed-off-by: Zubair Lutfullah Kakakhel
---
V3 -> V4
No change
V2 -> V3
No change
V1 -> V2
Removed accidental local-mac-address entry
---
arch/mips/boot/dts/xilfpga/nexys4ddr
The drivers read/write function handling is a bit quirky.
And the irqmask is passed directly to the handler.
Add a new irqchip struct to pass to the handler and
cleanup read/write handling.
Signed-off-by: Zubair Lutfullah Kakakhel
---
V3 -> V4
Better error handling for kzalloc
Erroring out
The MIPS based xilfpga platform uses this driver.
Enable it for MIPS
Signed-off-by: Zubair Lutfullah Kakakhel
---
V3 -> V4
Removed unnecesary braces
V2 -> V3
No change
V1 -> V2
No change
---
drivers/net/ethernet/xilinx/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions
Update defconfig to enable emaclite, i2c, temp sensor found on the
xilfpga platform
Signed-off-by: Zubair Lutfullah Kakakhel
---
V3 -> V4
No change
V2 -> V3
No change
V1 -> V2
No change
---
arch/mips/configs/xilfpga_defconfig | 37 -
1 file ch
Update the DT node with the UART irq
Signed-off-by: Zubair Lutfullah Kakakhel
---
V3 -> V4
No change
V2 -> V3
No change
V1 -> V2
No change
---
arch/mips/boot/dts/xilfpga/nexys4ddr.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/mips/boot/dts/xilfpga/nexys4ddr.dt
At the moment, if the emaclite device doesn't find a mac address
from any source, it simply uses 0x0 with a warning printed.
Instead of using a 0x0 mac address, use a randomly generated one.
Signed-off-by: Zubair Lutfullah Kakakhel
---
V3 -> V4
Curly braces after if check for correct
This prepares the code use the Xilinx AXI Interrupt Controller
driver now available in drivers/irqchip/irq-axi-intc.c
Signed-off-by: Zubair Lutfullah Kakakhel
---
V3 -> V4
Corrected commit message. Was irq-xilinx.c. Now irq-axi-intc.c
V2 -> V3
No change
V1 -> V2
No change
---
The Xilinx AXI Interrupt Controller IP block is used by the MIPS
based xilfpga platform.
Move the interrupt controller code out of arch/microblaze so that
it can be used by everyone
Signed-off-by: Zubair Lutfullah Kakakhel
---
V3 -> V4
No change
V2 -> V3
No change here. Cleanup patches
The MIPS based xilfpga platform has the following IRQ structure
Peripherals --> xilinx_intcontroller -> mips_cpu_int controller
Add support for the driver to chain the irq handler
Signed-off-by: Zubair Lutfullah Kakakhel
---
V3 -> V4
Clean up if/else when a parent is found
Pas
V2 -> V3
Cleanup the interrupt controller driver a bit based on feedback
Rebase to v4.8-rc4
V1 -> V2
Resubmitting without truncating the diff output for file moves
Removed accidental local mac address entry
Individual logs have more detail
Zubair Lutfullah Kakakhel (12):
microblaze: irqc
The xilfpga platform has an AXI I2C Bus master with a temperature
sensor connected to it.
Add the device tree node to use them.
Signed-off-by: Zubair Lutfullah Kakakhel
---
V3 -> V4
changed compatible string from "adt7420" to "adi,adt7420"
V2 -> V3
No change
V1
Now that the driver is generic and used by multiple archs,
get_irq is too generic.
Rename get_irq to xintc_get_irq to avoid any conflicts
Signed-off-by: Zubair Lutfullah Kakakhel
---
V3 -> V4
New patch.
---
arch/microblaze/include/asm/irq.h | 2 +-
arch/microblaze/kernel/irq.c
Hi,
On 09/02/2016 06:56 AM, Michal Simek wrote:
On 1.9.2016 18:50, Zubair Lutfullah Kakakhel wrote:
The Xilinx AXI Interrupt Controller IP block is used by the MIPS
based xilfpga platform.
Move the interrupt controller code out of arch/microblaze so that
it can be used by everyone
if this
Hi,
On 09/02/2016 07:25 AM, Michal Simek wrote:
On 1.9.2016 18:50, Zubair Lutfullah Kakakhel wrote:
The Xilinx AXI Interrupt Controller IP block is used by the MIPS
based xilfpga platform.
Move the interrupt controller code out of arch/microblaze so that
it can be used by everyone
Signed-off
Hi,
Thanks for the review.
Comments inline.
On 09/01/2016 06:15 PM, Marc Zyngier wrote:
On 01/09/16 17:50, Zubair Lutfullah Kakakhel wrote:
The drivers read/write function handling is a bit quirky.
And the irqmask is passed directly to the handler.
Add a new irqchip struct to pass to the
At the moment, if the emaclite device doesn't find a mac address
from any source, it simply uses 0x0 with a warning printed.
Instead of using a 0x0 mac address, use a randomly generated one.
Signed-off-by: Zubair Lutfullah Kakakhel
---
V3 -> V4
Curly braces after if check for correct
,
ZubairLK
Zubair Lutfullah Kakakhel (2):
net: ethernet: xilinx: Generate random mac if none found
net: ethernet: xilinx: Enable emaclite for MIPS
drivers/net/ethernet/xilinx/Kconfig | 4 ++--
drivers/net/ethernet/xilinx/xilinx_emaclite.c | 8 +---
2 files changed, 7 insertions
The MIPS based xilfpga platform uses this driver.
Enable it for MIPS
Signed-off-by: Zubair Lutfullah Kakakhel
---
V3 -> V4
Removed unnecesary braces
V2 -> V3
No change
V1 -> V2
No change
---
drivers/net/ethernet/xilinx/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions
Hi,
Thanks for the valuable feedback.
Comments inline
On 09/02/2016 11:27 AM, Michal Simek wrote:
On 2.9.2016 12:06, Zubair Lutfullah Kakakhel wrote:
Hi,
On 09/02/2016 07:25 AM, Michal Simek wrote:
On 1.9.2016 18:50, Zubair Lutfullah Kakakhel wrote:
The Xilinx AXI Interrupt Controller IP
Hi,
On 08/18/2016 02:43 PM, Zubair Lutfullah Kakakhel wrote:
Hi,
The MIPS based Xilfpga platform uses the axi interrupt controller
daisy chained to the MIPS microAptiv cpu interrupt controller.
This patch series moves the axi interrupt controller driver out
of arch/microblaze to drivers
.
Regards,
ZubairLK
Zubair Lutfullah Kakakhel (5):
dt-bindings: MIPS: Document xilfpga bindings and boot style
gpio/xilinx: enable for MIPS
MIPS: dt: xilfpga: Add xilfpga device tree files.
MIPS: xilfpga: Add mipsfpga platform code
MIPS: Add xilfpga defconfig
.../devicetree/bindings
Signed-off-by: Zubair Lutfullah Kakakhel
---
arch/mips/boot/dts/Makefile| 1 +
arch/mips/boot/dts/xilfpga/Makefile| 9 ++
arch/mips/boot/dts/xilfpga/microAptiv.dtsi | 21 +
arch/mips/boot/dts/xilfpga/nexys4ddr.dts | 47 ++
4
MIPSfpga uses the axi gpio controller. Enable the driver for MIPS.
Signed-off-by: Zubair Lutfullah Kakakhel
---
drivers/gpio/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 8949b3f..58e9afd 100644
--- a/drivers/gpio
Xilfpga boots only with device-tree. Document the required properties
and the unique boot style
Signed-off-by: Zubair Lutfullah Kakakhel
---
.../devicetree/bindings/mips/img/xilfpga.txt | 76 ++
1 file changed, 76 insertions(+)
create mode 100644 Documentation
The xilfpga platform will be DT only.
Add required platform code. DT files have already been added separately
Signed-off-by: Zubair Lutfullah Kakakhel
---
arch/mips/Kbuild.platforms| 1 +
arch/mips/Kconfig | 25 ++
arch/mips/include/asm/mach
Signed-off-by: Zubair Lutfullah Kakakhel
---
arch/mips/configs/xilfpga_defconfig | 59 +
1 file changed, 59 insertions(+)
create mode 100644 arch/mips/configs/xilfpga_defconfig
diff --git a/arch/mips/configs/xilfpga_defconfig
b/arch/mips/configs
Add defconfig for MIPSfpga
Signed-off-by: Zubair Lutfullah Kakakhel
---
V1 -> V2
Reduced redundant options that had crept in
---
arch/mips/configs/xilfpga_defconfig | 40 +
1 file changed, 40 insertions(+)
create mode 100644 arch/mips/conf
The xilfpga platform will be DT only.
Add required platform code.
DT files have already been added separately.
Signed-off-by: Zubair Lutfullah Kakakhel
---
V1 -> V2
Minor nitpicks. Nothing functional.
Removed some redundant select 8250 serial.
Removed a newline
Added description of platform
Xilfpga boots only with device-tree. Document the required properties
and the unique boot style
Signed-off-by: Zubair Lutfullah Kakakhel
---
V1->V2
Reformatted to 80 char column
Correct clock phandle description
Added digilent,nexys4ddr to get more specific about platform
Added compati
Add device tree files for the MIPSfpga platform.
See Documentation/devicetree/bindings/mips/img/xilfpga.txt
for details about MIPSfpga
Signed-off-by: Zubair Lutfullah Kakakhel
---
V1 -> V2
Reformatted git log for 80 column
Added nexys4ddr compatible
Fixed some whitespace
Removed a redund
V1 -> V2
Nothing major functional.
Mostly cleanup. Individual patches have changelogs.
Removed the gpio patch from this series as Linus Walleij applied it.
Zubair Lutfullah Kakakhel (4):
dt-bindings: MIPS: Document xilfpga bindings and boot style
MIPS: dt: xilfpga: Add xilfpga device t
The xilfpga platform will be DT only.
Add required platform code.
DT files have already been added separately.
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 -> V3
removed redundant gpio.h
minor typos
V1 -> V2
Minor nitpicks. Nothing functional.
Removed some redundant select 8250
V2 -> V3
Minor typos/nitpicks.
Removed redundant header.
Individual patches have changelogs.
V1 -> V2
Nothing major functional.
Mostly cleanup. Individual patches have changelogs.
Removed the gpio patch from this series as Linus Walleij applied it.
Zubair Lutfullah Kakakhel (4):
dt-bi
Add defconfig for MIPSfpga
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 -> V3
no change
V1 -> V2
Reduced redundant options that had crept in
---
arch/mips/configs/xilfpga_defconfig | 40 +
1 file changed, 40 insertions(+)
create mode 100644 arc
Add device tree files for the MIPSfpga platform.
See Documentation/devicetree/bindings/mips/img/xilfpga.txt
for details about MIPSfpga
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 -> V3
no change
V1 -> V2
Reformatted git log for 80 column
Added nexys4ddr compatible
Fixed some whit
Xilfpga boots only with device-tree. Document the required properties
and the unique boot style
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2->V3
minor nitpicks. mips->MIPS. typo. reorder compatible strings in priority
V1->V2
Reformatted to 80 char column
Correct clock phandle de
In boards, the dm9000 chip's power and reset can be controlled by gpio.
It makes sense to add them to the dm9000 driver and let dt be used to
enable power and reset the phy.
Signed-off-by: Zubair Lutfullah Kakakhel
Signed-off-by: Paul Burton
---
V2 A few fixes and more error checks. No
As we are moving away from platform to DT, we cant rely on the board
file to do this now. So enable it here.
Signed-off-by: Zubair Lutfullah Kakakhel
---
sound/soc/jz4740/jz4740-i2s.c | 4
1 file changed, 4 insertions(+)
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740
div
registers
Signed-off-by: Zubair Lutfullah Kakakhel
---
sound/soc/jz4740/jz4740-i2s.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c
index d3d45c6..98c77a63 100644
--- a/sound/soc/jz4740/jz4740-i2s.c
This patch adds binding for the jz4740-i2s driver.
Signed-off-by: Zubair Lutfullah Kakakhel
---
The jz4740 is platform only at the moment.
But DT support is being added
See http://patchwork.linux-mips.org/bundle/paulburton/ci20-v3.20/
---
.../devicetree/bindings/sound/ingenic,jz4740-i2s.txt
to have them rebased to a different tree, please tell.
Thank-you
Zubair Lutfullah Kakakhel (4):
sound: soc: jz4740: Add dynamic sampling rate support to jz4740-i2s
dt: sound: jz4740: Add binding documentation for jz4740-i2s
sound: soc: jz4740: Add DT support to jz4740-i2s driver
sound
This patch adds device tree support for the jz4740 driver.
Signed-off-by: Zubair Lutfullah Kakakhel
---
sound/soc/jz4740/jz4740-i2s.c | 8
1 file changed, 8 insertions(+)
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c
index 98c77a63..3c309fc 100644
--- a
On 26/01/15 10:40, Lars-Peter Clausen wrote:
> On 01/26/2015 11:18 AM, Zubair Lutfullah Kakakhel wrote:
>> As we are moving away from platform to DT, we cant rely on the board
>> file to do this now. So enable it here.
>
> I don't understand this changelog. The boar
On 26/01/15 10:37, Lars-Peter Clausen wrote:
> On 01/26/2015 11:18 AM, Zubair Lutfullah Kakakhel wrote:
> [...]
>> +Required properties:
>> +- compatible : "ingenic,jz4740-i2s"
>> +- reg : I2S registers location and length
>> +- clocks : AIC and I2S PLL c
This patch adds binding for the jz4740-i2s driver.
Signed-off-by: Zubair Lutfullah Kakakhel
---
The jz4740 is platform only at the moment.
But DT support is being added
See http://patchwork.linux-mips.org/bundle/paulburton/ci20-v3.20/
V2 changes: Added DMA bindings for later on
div
registers
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 changes: Removed a redundant #define
---
sound/soc/jz4740/jz4740-i2s.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c
index d3d45c6..b7a7e82
Lutfullah Kakakhel (4):
sound: soc: jz4740: Add dynamic sampling rate support to jz4740-i2s
dt: sound: jz4740: Add binding documentation for jz4740-i2s
sound: soc: jz4740: Add DT support to jz4740-i2s driver
sound: jz4740: set i2s clk rate to 12MHz
.../bindings/sound/ingenic,jz4740-i2s.txt
i2s clock rate is not set to 12MHz currently. Set it before enabling
the clock.
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 changes: Removed clk_prepare_enable call as clock was already being
enabled elsewhere. Just set rate to 12MHz.
---
sound/soc/jz4740/jz4740-i2s.c | 1 +
1 file changed
This patch adds device tree support for the jz4740 driver.
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 changes: Added ifdef config_of
---
sound/soc/jz4740/jz4740-i2s.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740
i2s clock rate is not set to 12MHz currently. Set it before enabling
the clock.
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 changes: Removed clk_prepare_enable call as clock was already being
enabled elsewhere. Just set rate to 12MHz.
---
sound/soc/jz4740/jz4740-i2s.c | 1 +
1 file changed
Added dma in binding document
Removed a redundant call to clk_prepare_enable
Zubair Lutfullah Kakakhel (4):
sound: soc: jz4740: Add dynamic sampling rate support to jz4740-i2s
dt: sound: jz4740: Add binding documentation for jz4740-i2s
sound: soc: jz4740: Add DT support to jz4740-i2s driver
This patch adds binding for the jz4740-i2s driver.
Signed-off-by: Zubair Lutfullah Kakakhel
---
The jz4740 is platform only at the moment.
But DT support is being added
See http://patchwork.linux-mips.org/bundle/paulburton/ci20-v3.20/
V3 changes: Missed out adding dma bindings in required
This patch adds device tree support for the jz4740 driver.
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 changes: Added ifdef config_of
---
sound/soc/jz4740/jz4740-i2s.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740
div
registers
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 changes: Removed a redundant #define
---
sound/soc/jz4740/jz4740-i2s.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c
index d3d45c6..b7a7e82
In boards, the dm9000 chip's power and reset can be controlled by gpio.
It makes sense to add them to the dm9000 driver and let dt be used to
enable power and reset the phy.
Signed-off-by: Zubair Lutfullah Kakakhel
Signed-off-by: Paul Burton
---
V3 Fixed an indentation and removed a ca
In boards, the dm9000 chip's power and reset can be controlled by gpio.
It makes sense to add them to the dm9000 driver and let dt be used to
enable power and reset the phy.
Signed-off-by: Zubair Lutfullah Kakakhel
Signed-off-by: Paul Burton
---
V4 Reordered an error check. PTR_ERR i
On 26/01/15 14:53, Zubair Lutfullah Kakakhel wrote:
> i2s clock rate is not set to 12MHz currently. Set it before enabling
> the clock.
>
> Signed-off-by: Zubair Lutfullah Kakakhel
>
> ---
> V2 changes: Removed clk_prepare_enable call as clock was already being
> ena
Hi,
Here are a few simple patches for the jz4740.
First adds a simple DT binding.
Seconds adds DT support.
Third is a minor fix in clock enabling.
Patches are based on 3.19-rc6. Quite disjoint and stay within jz4740
so should apply easily on other trees.
If you would like to have them rebased
From: Paul Burton
Add the binding documentation for the JZ47xx OHCI controller.
Signed-off-by: Paul Burton
Signed-off-by: Zubair Lutfullah Kakakhel
---
The jz4740 is platform only at the moment.
But DT support is being added
See http://patchwork.linux-mips.org/bundle/paulburton/ci20-v3.20
From: Paul Burton
This is a simple matter of providing a match table, the probe code needs
no modification.
Signed-off-by: Paul Burton
---
drivers/usb/host/ohci-jz4740.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/usb/host/ohci-jz4740.c b/drivers/usb/host/ohci-jz4740.c
From: Paul Burton
The clock must have been prepared before enabling it.
Signed-off-by: Paul Burton
---
drivers/usb/host/ohci-jz4740.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/host/ohci-jz4740.c b/drivers/usb/host/ohci-jz4740.c
index bb69733..1455a8b 10064
From: Paul Burton
The clock must have been prepared before enabling it.
Signed-off-by: Paul Burton
--
V2 changes. Add disable_unprepare as well
---
drivers/usb/host/ohci-jz4740.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/host/ohci-jz4740.c b/drivers
Hi,
Here are a few simple patches for the jz4740.
First adds a simple DT binding.
Seconds adds DT support.
Third is a minor fix in clock enabling.
Patches are based on 3.19-rc6. Quite disjoint and stay within jz4740
so should apply easily on other trees.
If you would like to have them rebased
From: Paul Burton
This is a simple matter of providing a match table, the probe code needs
no modification.
Signed-off-by: Paul Burton
---
drivers/usb/host/ohci-jz4740.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/usb/host/ohci-jz4740.c b/drivers/usb/host/ohci-jz4740.c
From: Paul Burton
Add the binding documentation for the JZ47xx OHCI controller.
Signed-off-by: Paul Burton
Signed-off-by: Zubair Lutfullah Kakakhel
---
The jz4740 is platform only at the moment.
But DT support is being added
See http://patchwork.linux-mips.org/bundle/paulburton/ci20-v3.20
Lutfullah Kakakhel (2):
dt: watchdog: Add DT binding documentation for jz47xx watchdog timer
watchdog: jz4740: Add DT support
.../devicetree/bindings/watchdog/ingenic,jz47xx-wdt.txt | 17 +
drivers/watchdog/jz4740_wdt.c | 9 +
2 files changed
Add DT support to the jz4740 driver. Simple of_match_ptr. No other
modification for probe needed
Signed-off-by: Zubair Lutfullah Kakakhel
---
drivers/watchdog/jz4740_wdt.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/watchdog/jz4740_wdt.c b/drivers/watchdog/jz4740_wdt.c
Add binding for jz47xx watchdog timer. It is a simple watchdog timer.
Needs rtc clock and register addresses
Signed-off-by: Zubair Lutfullah Kakakhel
---
The jz4740 is platform only at the moment.
But DT support is being added
See http://patchwork.linux-mips.org/bundle/paulburton/ci20-v3.20
On 27/01/15 22:42, Arnd Bergmann wrote:
> On Tuesday 27 January 2015 23:36:36 Arnd Bergmann wrote:
>> On Tuesday 27 January 2015 14:19:09 Guenter Roeck wrote:
>>> On Tue, Jan 27, 2015 at 10:29:49PM +0100, Arnd Bergmann wrote:
On Tuesday 27 January 2015 12:52:29 Guenter Roeck wrote:
> Dri
Hi Valentin,
MACH_JZ4780 will definitely be added via arch/mips
But the patch series for core jz4780 SOC support still needs a bit of
refresh/refining.
For reference, see
http://www.spinics.net/lists/mips/msg55258.html
https://github.com/torvalds/linux/compare/master...paulburton:wip-ci20-v4.0
Adds DT documentation for the the i2c controller for the JZ4780 SoC
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 -> V3
Rebase to v4.0-rc6
V1 -> V2
Reworded example node. Was separated between board/soc.
No need for that as such.
Rebase to v4.0-rc3
---
.../devicetree/bindings/i2c/i2c-
o v4.0-rc3
Minor tweaks/fixes. Details in individual patch commits.
Feedback welcome.
Thank-you
ZubairLK
Zubair Lutfullah Kakakhel (2):
dt-bindings: i2c: Add dt binding documentation for ingenic jz4780 SoC
i2c: jz4780: Add i2c bus controller driver for Ingenic JZ4780
.../devicetree/bindin
Adds the i2c bus controller driver for the Ingenic JZ4780 SoC.
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 -> V3
Rebase to 4.0-rc6
checkpatch --strict fixes
Add compile_test
sparse fix for a cast warning
sort include/kconfig
reordered a while loop
dev_err -> dev_dbg in some cases
C
From: Alex Smith
Add DT bindings for NAND devices connected to the NEMC on JZ4780 SoCs,
as well as the hardware BCH controller, used by the jz4780_{nand,bch}
drivers.
Signed-off-by: Alex Smith
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 - > V3
Rebase to 4.0-rc6
Changed ingenic,ecc-s
, which
would make implementing a common driver for them quite messy.
Signed-off-by: Alex Smith
Signed-off-by: Zubair Lutfullah Kakakhel
---
V2 -> V3
Rebase to 4.0-rc6
Reflect binding changes
get/put_device in bch get/release
Removed empty .remove() callback
Removed .owner
Set mtd->dev.
Hi,
Two patches based on 4.0-rc6 that add NAND and BCH controller
drivers for the Ingenic JZ4780 SoC.
Hope these can make it in time for 4.1.
Tested on the MIPS Creator CI20.
Core JZ4780 support is still in-flight.
Review and feedback welcome.
V2 - > V3
Rebase to 4.0-rc6
Binding changes and f
Hi,
On 31/03/15 18:20, Brian Norris wrote:
> On Tue, Mar 31, 2015 at 05:59:39PM +0100, Zubair Lutfullah Kakakhel wrote:
>> Hi,
>
> Hi!
>
> Nit: can you drop the underscore in your 'PATCH_Vx' subjects? It'd make
> my filtering a bit easier. I usually ex
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