On Sat, Jun 18, 2016 at 02:54:23AM +0300, Yury Norov wrote:
> From: Andrew Pinski
>
> Add a separate syscall-table for ILP32, which dispatches either to native
> LP64 system call implementation or to compat-syscalls, as appropriate.
>
> Signed-off-by: Andrew Pinski
> Sign
previous version. It may be removed
if there's no requirement in it anymore.
While we're at this, fix comment that describes return value.
Reported-by: Alexey Klimov
Signed-off-by: Yury Norov
Signed-off-by: Alexey Klimov
---
include/linux/slab.h | 41 +--
From: Andrew Pinski
To support ILP32 without much sources changes, this changes
sysdeps/aarch64/start.S to use the PTR_* macros which was defined
earlier.
* sysdeps/aarch64/start.S: Include sysdep.h
(_start): Use PTR_REG, PTR_SIZE macros.
Signed-off-by: Yury Norov
---
sysdeps/aarch64/start.S
instead of long
and use ARGIFY.
(LOAD_ARGS_2): Likewise.
(LOAD_ARGS_3): Likewise.
(LOAD_ARGS_4): Likewise.
(LOAD_ARGS_5): Likewise.
(LOAD_ARGS_6): Likewise.
(LOAD_ARGS_7): Likewise.
Signed-off-by: Yury Norov
---
sysdeps/unix/sysv/linux/aarch64/sysdep.h | 48
1 file
.
* sysdeps/unix/sysv/linux/aarch64/configure.ac: Set arch_minimum_kernel
to 3.19.0 for ILP32.
Set LIBC_SLIBDIR_RTLDDIR to libilp32/lib for ilp32.
* sysdeps/unix/sysv/linux/aarch64/configure: Regenerate.
Signed-off-by: Yury Norov
---
sysdeps/aarch64/configure| 15
LP64 usage and provides common
code between ILP32.
* sysdeps/aarch64/dl-machine.h (RTLD_START): Rename to ...
(RTLD_START_1): This and add PTR, PTR_SIZE_LOG, and PTR_SP arguments.
(RTLD_START): New macro which uses RTLD_START_1.
Signed-off-by: Yury Norov
---
sysdeps/aarch64/crti.S | 3
.
(_dl_tlsdesc_resolve_rela): Likewise.
(_dl_tlsdesc_resolve_hold): Likewise.
Signed-off-by: Yury Norov
---
sysdeps/aarch64/dl-tlsdesc.S | 36 ++--
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/sysdeps/aarch64/dl-tlsdesc.S b/sysdeps/aarch64/dl-tlsdesc.S
index
From: Andrew Pinski
Just like the other patches, this patch allows for getcontext.S to be used
between ILP32 and LP64.
* sysdeps/unix/sysv/linux/aarch64/getcontext.S: Use PTR_REG when
doing an add so wrapping of the pointer is correct for ILP32.
Signed-off-by: Yury Norov
---
sysdeps/unix
From: Andrew Pinski
Signed-off-by: Andrew Pinski
Signed-off-by: Yury Norov
---
sysdeps/aarch64/bits/wordsize.h | 8 +++-
sysdeps/generic/stdint.h| 9 +++--
2 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/sysdeps/aarch64/bits/wordsize.h b/sysdeps/aarch64/bits
From: Andrew Pinski
So that ILP32 is aligned to 64bits.
Signed-off-by: Yury Norov
---
sysdeps/aarch64/nptl/bits/semaphore.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sysdeps/aarch64/nptl/bits/semaphore.h
b/sysdeps/aarch64/nptl/bits/semaphore.h
index 3cc5b37..3fe6047
pe of __align to long long
Fix PTRDIFF_MIN/PTRDIFF_MIN and PTRDIFF_MIN for ILP32.
Yury Norov (3):
[AARCH64] ILP32: introduce syscalls that pass off_t
[AARCH64] ILP32: support stat syscall family
[AARCH64] delouse input arguments in system functions
elf/ca
From: Andrew Pinski
__WORDSIZE needs to be set to 32 for ILP32.
* sysdeps/aarch64/bits/wordsize.h (__WORDSIZE): Set to 32 for ILP32.
Update comments.
Signed-off-by: Yury Norov
---
sysdeps/aarch64/bits/wordsize.h | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a
From: Yury Norov
ILP32 has 64-bit off_t, to follow modern requirements.
But kernel clears top-halves of input registers. It means
we have to pass corresponding arguments in a pair, like
aarch32 does. In this patch all affected syscalls are redefined.
Most of them are taken from arm code.
Signed
Signed-off-by: Yury Norov
---
sysdeps/aarch64/__longjmp.S | 2 ++
sysdeps/aarch64/dl-tlsdesc.S | 6 ++
sysdeps/aarch64/memcmp.S | 3 +++
sysdeps/aarch64/memcpy.S | 4 +++-
sysdeps/aarch64/memmove.S
resolved at link time for LP64.
* sysdeps/aarch64/dl-machine.h (elf_machine_load_address): Add support
for ILP32.
Signed-off-by: Yury Norov
---
sysdeps/aarch64/dl-machine.h | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/sysdeps/aarch64/dl-machine.h b/sysdeps
linux/aarch64/ldd-rewrite.sed: New file.
Signed-off-by: Yury Norov
---
sysdeps/unix/sysv/linux/aarch64/configure | 2 ++
sysdeps/unix/sysv/linux/aarch64/configure.ac| 2 ++
sysdeps/unix/sysv/linux/aarch64/ldd-rewrite.sed | 1 +
3 files changed, 5 insertions(+)
create mode 100644 sysdeps
: Yury Norov
---
sysdeps/unix/sysv/linux/aarch64/bits/typesizes.h | 79
sysdeps/unix/sysv/linux/sysdep-vdso.h| 4 +-
2 files changed, 81 insertions(+), 2 deletions(-)
create mode 100644 sysdeps/unix/sysv/linux/aarch64/bits/typesizes.h
diff --git a/sysdeps/unix
already provided mmap.c file.
Signed-off-by: Yury Norov
---
sysdeps/aarch64/Implies| 6 --
sysdeps/aarch64/ilp32/Implies | 6 ++
sysdeps/aarch64/lp64/Implies | 7 ++
sysdeps/unix/sysv/linux/aarch64/Implies| 2
/sysv/linux/aarch64/kernel_sigaction.h: New file.
* sysdeps/unix/sysv/linux/aarch64/sigaction.c (__libc_sigaction):
Add cast here it is necessary.
Signed-off-by: Yury Norov
---
sysdeps/unix/sysv/linux/aarch64/kernel_sigaction.h | 12
sysdeps/unix/sysv/linux/aarch64/sigaction.c
From: Andrew Pinski
This patch adds ILP32 ld.so names to the known interpreter names.
* sysdeps/unix/sysv/linux/aarch64/ldconfig.h (SYSDEP_KNOWN_INTERPRETER_NAMES):
Add ilp32 ld.so names.
Signed-off-by: Yury Norov
---
sysdeps/unix/sysv/linux/aarch64/ldconfig.h | 2 ++
1 file changed, 2
macro also.
(abi-lp64_be-options): Add defining of LP64 and undef of ILP32 macros.
(abi-lp64_be-condition): Check word size macro also.
(abi-ilp32-options): Define.
(abi-ilp32-condition): Likewise.
(abi-ilp32_be-options): Define.
(abi-ilp32_be-condition): Likewise.
Signed-off-by: Yury Norov
From: Andrew Pinski
Signed-off-by: Yury Norov
---
elf/dl-sysdep.c | 1 +
elf/elf.h | 3 +++
sysdeps/unix/sysv/linux/aarch64/dl-auxv.h | 25 +
sysdeps/unix/sysv/linux/aarch64/dl-sysdep.c | 5 +
4
From: Yury Norov
stat and statfs structures has their layouts identical to lp64
after changing off_t, ino_t etc sizes to 64-bit. It means we can
pass it to kernel same way as lp64 does.
Signed-off-by: Yury Norov
---
sysdeps/unix/sysv/linux/aarch64/bits/stat.h| 195
be the FLAG_AARCH64_LIB32 if compiling for ILP32.
(add_system_dir): Add libilp32 to the list of system directories.
* sysdeps/unix/sysv/linux/arm/readelflib.c (process_elf_file):
Handle ILP32 elf binaries.
Signed-off-by: Yury Norov
---
elf/cache.c| 2 ++
sysdeps
This patch is out of series. I sent it erroneously. Please ignore it.
On Tue, Jun 21, 2016 at 08:06:45AM +0300, Yury Norov wrote:
> Signed-off-by: Yury Norov
> ---
> sysdeps/unix/sysv/linux/aarch64/ilp32/fallocate.c | 31
> ++
> .../unix/sysv/linux/aarch64/il
/bits/wordsize.h: New file.
Signed-off-by: Yury Norov
---
sysdeps/aarch64/bits/wordsize.h | 26 ++
1 file changed, 26 insertions(+)
create mode 100644 sysdeps/aarch64/bits/wordsize.h
diff --git a/sysdeps/aarch64/bits/wordsize.h b/sysdeps/aarch64/bits/wordsize.h
new file
): Likewise.
Signed-off-by: Yury Norov
---
sysdeps/aarch64/dl-irel.h| 3 ++-
sysdeps/aarch64/dl-machine.h | 53 +++-
sysdeps/aarch64/sysdep.h | 6 +
3 files changed, 36 insertions(+), 26 deletions(-)
diff --git a/sysdeps/aarch64/dl-irel.h b
): Update
R_AARCH64_TLS_DTPMOD64, R_AARCH64_TLS_DTPREL64, and R_AARCH64_TLS_TPREL64.
(elf_machine_rela): Likewise.
[AARCH64] Fix pltenter and pltexit for ILP32.
* sysdeps/aarch64/bits/link.h (la_aarch64_gnu_pltenter): Use
ElfW macro instead of hardcoded Elf64 types.
Signed-off-by: Yury Norov
Signed-off-by: Yury Norov
---
sysdeps/unix/sysv/linux/aarch64/ilp32/fallocate.c | 31 ++
.../unix/sysv/linux/aarch64/ilp32/fallocate64.c| 1 +
sysdeps/unix/sysv/linux/aarch64/ilp32/ftruncate.c | 1 +
.../unix/sysv/linux/aarch64/ilp32/ftruncate64.c| 4 +++
sysdeps
PTR_DEMANGLE.
* sysdeps/aarch64/setjmp.S (__sigsetjmp): Update calls to PTR_MANGLE.
Signed-off-by: Yury Norov
---
sysdeps/aarch64/__longjmp.S | 4 ++--
sysdeps/aarch64/setjmp.S | 4 ++--
sysdeps/aarch64/sysdep.h | 28
.
(_dl_runtime_resolve): Use PTR_REG, PTR_SIZE.
(_dl_runtime_profile): Likewise. Use RELA_SIZE and ip0l.
Signed-off-by: Yury Norov
---
sysdeps/aarch64/dl-trampoline.S | 18 +++---
1 file changed, 11 insertions(+), 7 deletions(-)
diff --git a/sysdeps/aarch64/dl-trampoline.S b/sysdeps/aarch64/dl
From: Andrew Pinski
Signed-off-by: Yury Norov
---
sysdeps/aarch64/jmpbuf-unwind.h | 2 +-
sysdeps/unix/sysv/linux/aarch64/sigcontextinfo.h | 2 +-
sysdeps/unix/sysv/linux/generic/brk.c| 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/sysdeps
On Tue, Jun 21, 2016 at 09:54:47AM +0200, Andreas Schwab wrote:
> Yury Norov writes:
>
> > diff --git a/sysdeps/aarch64/sysdep.h b/sysdeps/aarch64/sysdep.h
> > index 4cb028f..f2ea821 100644
> > --- a/sysdeps/aarch64/sysdep.h
> > +++ b/sysdeps/aarch64
lower 32bits of u64 which is wrong. Proposed fix is to swap the words
> of the u64 to handle this case. This is _not_ endianess swap.
>
> Suggested-by: Yury Norov
> Cc: Yury Norov
> Cc: Peter Zijlstra
> Cc: Ingo Molnar
> Cc: Arnaldo Carvalho de Melo
> Cc: Alexander Shishk
On Tue, Jun 21, 2016 at 02:52:37PM -0700, Andrew Morton wrote:
> On Tue, 21 Jun 2016 02:33:06 +0300 Yury Norov wrote:
>
> > kmalloc_index() uses simple straightforward way to calculate
> > bit position of nearest or equal upper power of 2.
> > This effectively res
for (i = 0; i < argc; ++i)
> if (i < 8)
> - ucp->uc_mcontext.regs[i] = va_arg (ap, unsigned long int);
> + ucp->uc_mcontext.regs[i] = va_arg (ap, unsigned long long);
> else
> - sp[i - 8] = va_arg (ap, unsigned long int);
> + s
On Tue, Jun 21, 2016 at 10:28:40AM +, Joseph Myers wrote:
> On Tue, 21 Jun 2016, Yury Norov wrote:
>
> > +#ifdef __LP64__
> > +#define RTLD_START RTLD_START_1("x", "3", "sp")
> > +#else
> > +#define RTLD_START RTLD_START_1("w&q
quot;__kernel_clock_gettime", &linux);
>PTR_MANGLE (p);
>VDSO_SYMBOL(clock_gettime) = p;
>
> - p = _dl_vdso_vsym ("__kernel_clock_getres", &linux2639);
> + p = _dl_vdso_vsym ("__kernel_clock_getres", &linux);
>PTR_MANGLE (p);
>VDSO_
On Fri, Sep 02, 2016 at 02:55:34PM +0200, Arnd Bergmann wrote:
> On Friday, September 2, 2016 6:46:19 PM CEST Bamvor Jian Zhang wrote:
> > diff --git a/arch/arm64/include/uapi/asm/unistd.h
> > b/arch/arm64/include/uapi/asm/unistd.h
> > index 043d17a..78bea1d 100644
> > --- a/arch/arm64/include/uap
On Mon, Jun 19, 2017 at 05:16:42PM +0100, James Morse wrote:
> Hi Yury,
>
> On 04/06/17 13:00, Yury Norov wrote:
> > Signed-off-by: Yury Norov
>
> Can I offer a body for the commit message:
> ILP32 needs to mix 32bit struct siginfo and 64bit sigframe for its signal
>
On Mon, Jun 19, 2017 at 01:58:53PM -0700, Florian Fainelli wrote:
> On 06/18/2017 04:51 PM, Yury Norov wrote:
> > Hi Florian,
> >
> > Some questions and thoughts inline.
> >
> > Yury
> >
> > On Fri, Jun 16, 2017 at 05:07:42PM -0700, Floria
On Mon, Jun 19, 2017 at 06:43:48PM +0100, Russell King - ARM Linux wrote:
> On Mon, Jun 19, 2017 at 06:18:18PM +0300, Yury Norov wrote:
> > One else thing I forgot to ask - now you have the generic
> > implementation for fncpy(), so do you really need to save arm
> > version
On Mon, Jun 19, 2017 at 04:58:16PM +0100, James Morse wrote:
> Hi Yury,
>
> On 04/06/17 12:59, Yury Norov wrote:
> > From: Andrew Pinski
> >
> > In this patchset ILP32 ABI support is added. Additionally to AARCH32,
> > which is binary-compatible with ARM,
On Wed, Jun 21, 2017 at 02:10:03AM +0300, Yury Norov wrote:
> On Mon, Jun 19, 2017 at 04:58:16PM +0100, James Morse wrote:
> > Hi Yury,
[...]
> > This is confusing as 'is_compat_task()' matches one of aarch32 or ilp32, but
> > compat_user_mode(regs) only matches
Hi Neil,
On Fri, Aug 04, 2017 at 03:59:12PM -0400, Neil Leeder wrote:
> This adds a driver for the SMMUv3 PMU into the perf framework.
> It includes an IORT update to support PM Counter Groups.
>
> IORT has no mechanism for determining device names so PMUs
> are named based on their physical addr
; : "+rm"(src1p)); // prevent any optimization
> asm volatile("" : "+rm"(src2p));
> unsigned long result = cpumask_next_and(n, src1p, src2p);
> asm volatile("" : "+rm"(result));
> }
> }
> ```
> Signed-of
On Wed, Oct 25, 2017 at 05:28:41PM +0200, Clement Courbet wrote:
> Thanks for the comments Yury.
>
> > But I'd like also to keep _find_next_bit() consistent with
> > _find_next_bit_le()
>
> Not sure I understand what you're suggesting here: Do you want a
> find_next_and_bit_le() or do you want to
On Wed, Oct 25, 2017 at 06:50:14PM +0300, Yury Norov wrote:
> On Wed, Oct 25, 2017 at 05:28:41PM +0200, Clement Courbet wrote:
> > Thanks for the comments Yury.
> >
> > > But I'd like also to keep _find_next_bit() consistent with
> > > _find_next_bit_le
t, which lets us use
> '%llu' everywhere.
>
> Fixes: 09588b1f1d58 ("lib: test module for find_*_bit() functions")
> Signed-off-by: Arnd Bergmann
Hi Arnd,
patch looks OK. Thank you.
Acked-by: Yury Norov
Hi Alexey, Andrew,
Thanks for comments.
On Fri, Nov 10, 2017 at 12:45:18PM +0200, Alexey Dobriyan wrote:
> On 11/10/17, Andrew Morton wrote:
> > On Thu, 9 Nov 2017 17:07:14 +0300 Yury Norov
> > wrote:
> >
> >> find_bit functions are widely used in the kernel,
Hi Michael,
On Sun, Nov 12, 2017 at 10:33:55PM +1100, Michael Ellerman wrote:
> Yury Norov writes:
>
> > find_bit functions are widely used in the kernel, including hot paths.
> > This module tests performance of that functions in 2 typical scenarios:
> > randomly fille
Hi all,
I reproduce it with qemu. The exact reason of panic is the NULL-dereference
in memory_present:
(gdb) bt
#0 0x08dd8c6c in sparse_index_init (nid=,
section_nr=)
at mm/sparse.c:80
#1 memory_present (nid=0, start=18446462598881083392, end=0) at mm/sparse.c:215
#2 0x08dc
Hi Sami,
Very interesting reading, thank you.
On Fri, Nov 03, 2017 at 10:11:53AM -0700, Sami Tolvanen wrote:
> This change fixes the following error message when linking with GNU
> gold:
>
> ld.gold: error: unrecognized emulation aarch64linux
>
> Signed-off-by: Sami Tolvanen
> ---
> arch/ar
iterations
CC: Alexey Dobriyan
CC: Andrew Morton
CC: Clement Courbet
CC: Matthew Wilcox
CC: Rasmus Villemoes
Signed-off-by: Yury Norov
---
lib/Kconfig.debug| 9
lib/Makefile | 1 +
lib/find_bit.c | 2 +-
lib/test_find_bit.c | 141
On Thu, Oct 26, 2017 at 02:58:00PM +0200, Alexey Dobriyan wrote:
> > - Refactored _find_next_common_bit into _find_next_bit., as suggested
> >by Yury Norov. This has no adverse effects on the performance side,
> >as the compiler successfully inlines the code.
>
>
Hi Kien,
On Sat, Oct 28, 2017 at 10:46:13PM -0400, Kien Ha wrote:
> >From fc52a98aca0c033f2c03fdc7e8f83ae49625675a Mon Sep 17 00:00:00 2001
> From: Kien Ha
> Date: Fri, 27 Oct 2017 14:07:55 -0400
> Subject: [PATCH] Fix line too long warning
>
> Signed-off-by: Kien Ha
> ---
> drivers/staging/rt
On Sun, Oct 29, 2017 at 06:54:09PM +0300, Yury Norov wrote:
> Hi Kien,
>
> On Sat, Oct 28, 2017 at 10:46:13PM -0400, Kien Ha wrote:
> > >From fc52a98aca0c033f2c03fdc7e8f83ae49625675a Mon Sep 17 00:00:00 2001
> > From: Kien Ha
> > Date: Fri, 27 Oct 2017 14:07:55
On Sun, Oct 29, 2017 at 10:28:27AM -0700, Joe Perches wrote:
> On Sun, 2017-10-29 at 18:54 +0300, Yury Norov wrote:
> > At second, and most important, refer Documentation/process/coding-style.rst:
> > Now, some people will claim that having 8-character indentations makes
> >
On Fri, Oct 02, 2015 at 12:49:46AM +0300, Pinski, Andrew wrote:
[...]
> Ok, we will rewrite these patches using 32bit time_t and 32bit off_t and
> redo the toolchain support for them. Note this is going back to the abi
> I had originally done when I submitted my original version when it was
> as
On Tue, Oct 06, 2015 at 12:21:33PM +0300, Andrey Konovalov wrote:
> Hi Yury,
>
> With this patch set 4.3 kernel fails to build with
> arch/arm64/configs/defconfig plus CONFIG_AARCH32_EL0=y
> and CONFIG_ARM64_ILP32=y giving the following three errors (the 3d one is
> warning actually):
[...]
>
f one applies second patch only.
Second patch adds run-time detection of aarch32 support, and rejects kernel to
load such binaries, if not supported.
Tested on ThunderX.
Signed-off-by: Yury Norov
Yury Norov (2):
arm64: cpufeature.h: resolve hidden header dependencies
arm64: don't load 32-bi
Functions implemented in cpufeature.h depend on some headers, but
cpufeature.h does not include them. This may cause build failure if
cpufeature.h user does not include that headers by itself. (Like it
happens in next patch of this series.)
Signed-off-by: Yury Norov
---
arch/arm64/include/asm
, system_supports_aarch32_el0() is introduced to detect
aarch32 support at run-time.
Signed-off-by: Yury Norov
---
arch/arm64/include/asm/cpufeature.h | 1 +
arch/arm64/include/asm/elf.h| 6 --
arch/arm64/kernel/cpuinfo.c | 9 +
3 files changed, 14 insertions(+), 2 deletions(-)
diff
guard.
- check that all CPUs support AArch32, not the current only,
the same way as for endianness support.
Signed-off-by: Yury Norov
Yury Norov (2):
arm64: cpufeature.h: resolve hidden header dependencies
arm64: don't load 32-bit binaries if platform has no aarch32_el0
arch/arm64/i
, system_supports_aarch32_el0() is introduced to detect
aarch32 support at run-time.
Signed-off-by: Yury Norov
---
arch/arm64/include/asm/cpufeature.h | 1 +
arch/arm64/include/asm/cputype.h| 8
arch/arm64/include/asm/elf.h| 6 --
arch/arm64/kernel/cpuinfo.c | 12
4
Functions implemented in cpufeature.h depend on some headers, but
cpufeature.h does not include them. This may cause build failure if
cpufeature.h user does not include that headers by itself. (Like it
happens in next patch of this series.)
Signed-off-by: Yury Norov
---
arch/arm64/include/asm
On Wed, Sep 02, 2015 at 04:15:52PM +0200, Ard Biesheuvel wrote:
> On 2 September 2015 at 16:00, Yury Norov wrote:
> > Kernel option COMPAT defines the ability of executing aarch32 binaries.
> > Some platforms does not support aarch32 mode, and so cannot execute that
> > bi
BLY__" guard as
it depends on , and can be used in C files only.
Signed-off-by: Yury Norov
Reviewed-by: Mark Rutland
---
arch/arm64/include/asm/cpufeature.h | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/cpufeature.h
b/arch/arm64/i
ng in id_aa64pfr0_aarch32_el0().
V2:
- add missing for the __attribute_const__ on
cpuid_feature_extract_field;
- move cpu_feature macro under the __ASSEMBLY__ guard.
- check that all CPUs support AArch32, not the current only,
the same way as for endianness support.
Signed-off-by: Yury Norov
Yury
, system_supports_aarch32_el0() is introduced to detect
aarch32 support at run-time.
Signed-off-by: Yury Norov
---
arch/arm64/include/asm/cpufeature.h | 1 +
arch/arm64/include/asm/cputype.h| 9 +
arch/arm64/include/asm/elf.h| 6 --
arch/arm64/kernel/cpuinfo.c | 12
4
s sort will grow,
it may become a trouble on large-scale SOCs. The fix is trivial,
though: do system-wide marker update conditionally, and preserve
corresponding cache line in shared state for all update() calls,
except, probably, one.
Signed-off-by: Yury Norov
---
arch/arm64/kernel/cpuinfo.c | 6 ++
On Fri, Sep 04, 2015 at 05:40:57PM +0100, Suzuki K. Poulose wrote:
> On 04/09/15 17:04, Yury Norov wrote:
> >This patch is on top of https://lkml.org/lkml/2015/9/2/413
> >
> >In master, there's only a single function -
> > update_mixed_endian_el0_support
>
On Wed, Sep 30, 2015 at 11:19:19AM +0100, Catalin Marinas wrote:
> On Wed, Sep 30, 2015 at 01:13:57AM +0300, Yury Norov wrote:
> > V5 reincarnation for ILP32.
> >
> > This is mostly the same code as Andrew suggested in v3:
> > https://lkml.org/lkml/2014/9/3/
On Wed, Sep 30, 2015 at 05:41:03PM +0100, Mark Brown wrote:
> On Wed, Sep 30, 2015 at 11:19:19AM +0100, Catalin Marinas wrote:
> > On Wed, Sep 30, 2015 at 01:13:57AM +0300, Yury Norov wrote:
>
> > > - What for ILP32 on ARM64?
> > > See https://lkml.org/lkml/
On Tue, Sep 29, 2015 at 11:06:13PM -0500, Nathan Lynch wrote:
> On 09/29/2015 05:14 PM, Yury Norov wrote:
> > From: Philipp Tomsich
> >
> > Adjusted to move the move data page before code pages in sync with
> > commit 601255ae3c98fd3a8bb4696425e4f868b4f1
>
&g
has name bitmap_zalloc instead of bitmap_alloc. This series:
https://lkml.org/lkml/2018/6/18/841
introduces new API for bitmap allocations in kernel, and functions
there are named correctly. Following patch propogates the API to tools,
and fixes naming issue.
Signed-off-by: Yury Norov
---
tools
ly in fail path.
memory_node__read();
Signed-off-by: Yury Norov
---
tools/include/linux/bitmap.h | 19 +++
tools/perf/builtin-c2c.c | 10 +-
tools/perf/tests/bitmap.c| 4 ++--
tools/perf/tests/mem2node.c | 4 ++--
tools/perf/util/header.c | 6 +++---
5 files changed
On Sun, Jun 24, 2018 at 02:31:03PM -0700, Dmitry Torokhov wrote:
> External Email
>
> On Sat, Jun 23, 2018 at 10:35:02AM +0300, Yury Norov wrote:
> > On top of next-20180622 and Andy Shevchenko series:
> > https://lkml.org/lkml/2018/6/18/841
> >
> > The series m
change nothing here.
Yury
> Signed-off-by: Wei Wang
> Cc: Andrew Morton
> Cc: Rasmus Villemoes
> Cc: Yury Norov
> ---
> include/linux/bitmap.h | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/include/linux/bitmap.h b/include/linux/bitmap.
On Thu, Jul 26, 2018 at 06:15:59PM +0800, Wei Wang wrote:
> External Email
>
> On 07/26/2018 05:37 PM, Yury Norov wrote:
> > On Thu, Jul 26, 2018 at 04:07:51PM +0800, Wei Wang wrote:
> > > The existing BITMAP_LAST_WORD_MASK macro returns 0x if nbits is
> &g
On Mon, Jul 16, 2018 at 05:31:10PM +0200, Frederic Weisbecker wrote:
> External Email
>
> On Thu, Jul 12, 2018 at 09:19:22PM +0300, Yury Norov wrote:
> > IIUC, tick_nohz_full_kick_cpu() is intended to wakeup idle CPUs
> > that will not be poked by scheduler because they are a
On Sat, Jun 23, 2018 at 10:35:01AM +0300, Yury Norov wrote:
> On top of next-20180622.
>
> bitmap_zero() is called after bitmap_alloc() in perf code. But
> bitmap_alloc() internally uses calloc() which guarantees that allocated
> area is zeroed. So following bitmap_zero is un
ormal (i.e. not nohz_full) CPUs, at next reschedule.
[1] https://lkml.org/lkml/2017/11/3/589
Signed-off-by: Yury Norov
---
kernel/time/tick-sched.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/time/tick-sched.c b/kernel/time/tick-sched.c
index c026145eba2f..1c24c70
x21, x22, [sp, #32]
a4: a8c57bfdldp x29, x30, [sp], #80
a8: d65f03c0ret
I tested LE kernel with this, and it works OK for me. BE version adds
few extra instructions to swap bytes, but generated code looks reasonable.
We can avoid byteswapping, if not needed, by using __r
Architectures like arm64 support 128-bit integer types and
operations. This patch introduces corresponding types and
__swab128() operation for be/le conversions.
They are required to implement 128-bit access to the memory,
in following patches.
Signed-off-by: Yury Norov
---
include/linux
frees a pointer into a
given [...] pool. All other accesses to these registers (e.g. reads
and 64-bit writes) are RAZ/WI.
Starting from ARMv8.4, stp and ldp instructions become atomic, and
API for 128-bit access would be helpful for core code.
Signed-off-by: Yury Norov
---
arch/Kconfig
Some architectures, like arm64, support 128-bit memory access. For
ARM64 - using load/store pair instructions. This patch introduces
reado() and writeo() functions family, where suffix 'o' stands for
reading and writing the octet of bytes at once.
Signed-off-by: Yury Norov
---
i
On Wed, Jan 24, 2018 at 02:00:42PM +0100, Geert Uytterhoeven wrote:
> Hi Yury,
>
> On Wed, Jan 24, 2018 at 10:05 AM, Yury Norov
> wrote:
> > Introduce __raw_writeo(), __raw_reado() and other arch-specific
> > RW functions for 128-bit memory access, and enable it for ar
On Wed, Jan 24, 2018 at 11:28:55AM +0100, Arnd Bergmann wrote:
> On Wed, Jan 24, 2018 at 10:05 AM, Yury Norov
> wrote:
> > This series adds API for 128-bit memory IO access and enables it for ARM64.
> > The original motivation for 128-bit API came from new Cavium network devi
eneric one, so it is also removed.
Signed-off-by: Yury Norov
---
arch/alpha/include/asm/bitops.h| 18 --
arch/arc/include/asm/bitops.h | 1 -
arch/arm/include/asm/bitops.h | 1 -
arch/arm64/include/asm/bitops.h| 1 -
arch/blackfin/include/asm/bitops.h | 1 -
last one that still there. So this path finishes
the work.
Signed-off-by: Yury Norov
---
arch/arc/Kconfig | 1 -
arch/s390/Kconfig | 1 -
arch/tile/Kconfig | 1 -
arch/unicore32/Kconfig| 1 -
arch/x86/Kconfig | 1 -
On Wed, Jan 10, 2018 at 03:17:03PM +0200, Andy Shevchenko wrote:
> On Wed, 2018-01-10 at 11:49 +0300, Yury Norov wrote:
> > On Tue, Jan 09, 2018 at 07:24:30PM +0200, Andy Shevchenko wrote:
> > > Behaviour of bitmap_fill() differs from bitmap_zero() in a way
> > > how bi
On Wed, Jan 10, 2018 at 03:11:45PM +0200, Andy Shevchenko wrote:
> On Wed, 2018-01-10 at 12:34 +0300, Yury Norov wrote:
> > Hi Andy,
> >
> > On Tue, Jan 09, 2018 at 07:24:27PM +0200, Andy Shevchenko wrote:
> > > Explicitly test bitmap_zero() and bitmap_clear() func
Bergmann (1):
perf: arm_dsu_pmu: convert to bitmap_from_arr32
Yury Norov (1):
rename bitmap_copy_safe to bitmap_copy_clear_tail
drivers/perf/arm_dsu_pmu.c | 6 ++
include/linux/bitmap.h | 10 +-
2 files changed, 7 insertions(+), 9 deletions(-)
--
2.11.0
Shared Unit PMU support")
Signed-off-by: Arnd Bergmann
Signed-off-by: Yury Norov
---
drivers/perf/arm_dsu_pmu.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/perf/arm_dsu_pmu.c b/drivers/perf/arm_dsu_pmu.c
index 93c50e377507..38f2cc2a6c74 100644
-
Rename is proposed in review:
https://lkml.org/lkml/2018/1/8/1052
Suggested-by: Rasmus Villemoes
Signed-off-by: Yury Norov
---
include/linux/bitmap.h | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/linux/bitmap.h b/include/linux/bitmap.h
index
Hi Andy,
Thanks for review. Comments inline.
On Sun, Dec 31, 2017 at 02:34:42PM +0200, Andy Shevchenko wrote:
> On Thu, Dec 28, 2017 at 5:00 PM, Yury Norov wrote:
> > This patchset replaces bitmap_{to,from}_u32array with more simple
> > and standard looking copy
ap,
> - DSU_PMU_MAX_COMMON_EVENTS,
> - cpmceid,
> - ARRAY_SIZE(cpmceid));
> + bitmap_from_arr32(dsu_pmu->cpmceid_bitmap, cpmceid,
> + DSU_PMU_MAX_COMMON_EVENTS);
> }
>
> static void dsu_pmu_set_active_cpu(int cpu, struct dsu_pmu *dsu_pmu)
Thanks Arnd,
Acked-by: Yury Norov
On Mon, Jan 08, 2018 at 03:15:47PM +, Will Deacon wrote:
> On Mon, Jan 08, 2018 at 02:56:24PM +, Suzuki K Poulose wrote:
> > On 08/01/18 12:48, Arnd Bergmann wrote:
> > >The bitmap_from_u32array() interface got replaced in a global
> > >change, but the arm_dsu_pmu driver adds another instan
On Wed, Jan 24, 2018 at 10:22:13AM +, Will Deacon wrote:
> On Wed, Jan 24, 2018 at 12:05:16PM +0300, Yury Norov wrote:
> > This series adds API for 128-bit memory IO access and enables it for ARM64.
> > The original motivation for 128-bit API came from new Cavium network device
1 - 100 of 1124 matches
Mail list logo
