ments
3. Replace ioread32/iowrite32 with readl/writel
4. Remove camelcase
5. Change dev_info to dev_dbg for unnecessary log
6. Correct typo in driver name
7. Remove use of of_match_ptr macro
8. Update the DT compatible strings and Add reference to a common
versioning document
Yash
Adds a PWM driver for PWM chip present in SiFive's HiFive Unleashed SoC.
Signed-off-by: Wesley W. Terpstra
[Atish: Various fixes and code cleanup]
Signed-off-by: Atish Patra
Signed-off-by: Yash Shah
---
drivers/pwm/Kconfig | 10 +++
drivers/pwm/Makefile | 1 +
drivers/pw
DT documentation for PWM controller added with updated compatible
string.
Signed-off-by: Wesley W. Terpstra
[Atish: Compatible string update]
Signed-off-by: Atish Patra
Signed-off-by: Yash Shah
---
.../devicetree/bindings/pwm/pwm-sifive.txt | 44 ++
1 file changed
On Tue, Dec 18, 2018 at 10:50 PM Rob Herring wrote:
>
> On Fri, Dec 14, 2018 at 11:50:41AM +0530, Yash Shah wrote:
> > DT documentation for PWM controller added with updated compatible
> > string.
> >
> > Signed-off-by: Wesley W. Terpstra
> > [Atish: Compati
On Tue, Dec 18, 2018 at 2:46 AM Uwe Kleine-König
wrote:
>
> On Fri, Dec 14, 2018 at 11:50:41AM +0530, Yash Shah wrote:
> > DT documentation for PWM controller added with updated compatible
> > string.
> >
> > Signed-off-by: Wesley W. Terpstra
> > [Atish: Comp
On Tue, Dec 18, 2018 at 3:42 AM Uwe Kleine-König
wrote:
>
> On Fri, Dec 14, 2018 at 11:50:42AM +0530, Yash Shah wrote:
> > Adds a PWM driver for PWM chip present in SiFive's HiFive Unleashed SoC.
> >
> > Signed-off-by: Wesley W. Terpstra
> > [Atish: Various fix
match_ptr macro
- Update the DT compatible strings and Add reference to a common
versioning document
Yash Shah (2):
pwm: sifive: Add DT documentation for SiFive PWM Controller
pwm: sifive: Add a driver for SiFive SoC PWM
.../devicetree/bindings/pwm/pwm-sifive.txt | 33 ++
driv
DT documentation for PWM controller added.
Signed-off-by: Wesley W. Terpstra
[Atish: Compatible string update]
Signed-off-by: Atish Patra
Signed-off-by: Yash Shah
Reviewed-by: Rob Herring
---
.../devicetree/bindings/pwm/pwm-sifive.txt | 33 ++
1 file changed, 33
Adds a PWM driver for PWM chip present in SiFive's HiFive Unleashed SoC.
Signed-off-by: Wesley W. Terpstra
[Atish: Various fixes and code cleanup]
Signed-off-by: Atish Patra
Signed-off-by: Yash Shah
---
drivers/pwm/Kconfig | 11 ++
drivers/pwm/Makefile | 1 +
drivers/pw
of:
https://github.com/yashshah7/riscv-linux.git
Yash Shah (2):
RISC-V: Add DT documentation for SiFive L2 Cache Controller
RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive
SoCs
.../devicetree/bindings/riscv/sifive-l2-cache.txt | 53 +
arch/riscv/m
The driver currently supports only SiFive FU540-C000 platform.
The initial version of L2 cache controller driver includes:
- Initial configuration reporting at boot up.
- Support for ECC related functionality.
Signed-off-by: Yash Shah
---
arch/riscv/mm/Makefile | 1 +
arch/riscv/mm
Add device tree bindings for SiFive FU540 L2 cache controller driver
Signed-off-by: Yash Shah
---
.../devicetree/bindings/riscv/sifive-l2-cache.txt | 53 ++
1 file changed, 53 insertions(+)
create mode 100644 Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt
On Thu, Apr 25, 2019 at 3:48 PM Sudeep Holla wrote:
>
> On Thu, Apr 25, 2019 at 11:24:56AM +0530, Yash Shah wrote:
> > The driver currently supports only SiFive FU540-C000 platform.
> >
> > The initial version of L2 cache controller driver includes:
> > - Initial c
On Thu, Apr 25, 2019 at 3:43 PM Sudeep Holla wrote:
>
> On Thu, Apr 25, 2019 at 11:24:55AM +0530, Yash Shah wrote:
> > Add device tree bindings for SiFive FU540 L2 cache controller driver
> >
> > Signed-off-by: Yash Shah
> > ---
> > .../devicetree/bind
This patch series adds a L2 Cache EDAC driver and DT documentation
for HiFive Unleashed board.
Yash Shah (2):
edac: sifive: Add DT documentation for SiFive L2 cache Controller
sifive: edac: Add EDAC driver for Sifive l2 Cache Controller
.../devicetree/bindings/edac/sifive-edac-l2.txt
Add driver for the SiFive L2 cache controller
on the HiFive Unleashed board
Signed-off-by: Yash Shah
---
arch/riscv/Kconfig| 1 +
drivers/edac/Kconfig | 7 +
drivers/edac/Makefile | 1 +
drivers/edac/sifive_edac-l2.c | 292
DT documentation for L2 cache controller added.
Signed-off-by: Yash Shah
---
.../devicetree/bindings/edac/sifive-edac-l2.txt| 31 ++
1 file changed, 31 insertions(+)
create mode 100644 Documentation/devicetree/bindings/edac/sifive-edac-l2.txt
diff --git a/Documentation
On Tue, Mar 12, 2019 at 3:44 PM Andreas Schwab wrote:
>
> On Mär 12 2019, Yash Shah wrote:
>
> > This patch series adds a PWM driver and DT documentation
> > for HiFive Unleashed board. The patches are mostly based on
> > Wesley's patch.
>
> Heartbeat trigge
On Wed, Jan 30, 2019 at 1:44 PM Uwe Kleine-König
wrote:
>
> On Tue, Jan 29, 2019 at 05:13:18PM +0530, Yash Shah wrote:
> > DT documentation for PWM controller added.
> >
> > Signed-off-by: Wesley W. Terpstra
> > [Atish: Compatible string update]
> > Signed-of
On Wed, Feb 6, 2019 at 6:14 PM Thierry Reding wrote:
>
> On Tue, Jan 29, 2019 at 05:13:19PM +0530, Yash Shah wrote:
> [...]
> > diff --git a/drivers/pwm/pwm-sifive.c b/drivers/pwm/pwm-sifive.c
> [...]
> > +static void pwm_sifive_update_clock(stru
'On Mon, Mar 25, 2019 at 9:24 PM Andreas Schwab wrote:
>
>
> I still don't see any improvement. FYI, this is the patch I use for the
> device tree:
>
I am sharing you my test environment which has been working for me so
that you can duplicate at your end
I have tested the patch on Linux v5.0-rc
On Fri, Feb 22, 2019 at 2:46 AM Uwe Kleine-König
wrote:
>
> On Thu, Feb 21, 2019 at 02:41:41PM +0530, Yash Shah wrote:
> > Adds a PWM driver for PWM chip present in SiFive's HiFive Unleashed SoC.
> >
> > Signed-off-by: Wesley W. Terpstra
> > [Atish: Various fix
Add new compatible strings to the DT binding documents to support SiFive
FU740-C000.
Signed-off-by: Yash Shah
---
Documentation/devicetree/bindings/spi/spi-sifive.yaml | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/spi
Add new compatible strings to the DT binding documents to support SiFive
FU740-C000.
Signed-off-by: Yash Shah
---
Documentation/devicetree/bindings/serial/sifive-serial.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/serial/sifive
Add new compatible strings to the DT binding documents to support SiFive
FU740-C000.
Signed-off-by: Yash Shah
---
Documentation/devicetree/bindings/pwm/pwm-sifive.yaml | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pwm/pwm
Add new compatible strings to the DT binding documents to support SiFive
FU740-C000.
Signed-off-by: Yash Shah
---
Documentation/devicetree/bindings/i2c/i2c-ocores.txt | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
1-git-send-email-yash.s...@sifive.com/T/#t
[2]:
https://lore.kernel.org/linux-riscv/20201126030043.67390-1-zong...@sifive.com/T/#u
Changes in v2:
- The dt bindings patch is split into several individual patches.
- Expand the full list for compatible strings in i2c-ocores.txt
Yash Shah (9):
Add new compatible strings in cpus.yaml to support the E71 and U74 CPU
cores ("harts") that are present on FU740-C000 SoC.
Signed-off-by: Yash Shah
---
Documentation/devicetree/bindings/riscv/cpus.yaml | 6 ++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetre
Add initial support for the SiFive FU540-C000 SoC. FU740-C000 is built
around the SiFIve U7 Core Complex and a TileLink interconnect.
This file is expected to grow as more device drivers are added to the
kernel.
Signed-off-by: Yash Shah
---
arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 293
Add new compatible strings to the YAML DT binding document to support
SiFive's HiFive Unmatched board
Signed-off-by: Yash Shah
---
Documentation/devicetree/bindings/riscv/sifive.yaml | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/Documentation/devic
Add initial board data for the SiFive HiFive Unmatched A00.
This patch is dependent on Zong's Patchset[0].
[0]:
https://lore.kernel.org/linux-riscv/20201130082330.77268-4-zong...@sifive.com/T/#u
Signed-off-by: Yash Shah
---
arch/riscv/boot/dts/sifive/Makefile
Add new compatible strings to the DT binding documents to support SiFive
FU740-C000.
Signed-off-by: Yash Shah
---
Documentation/devicetree/bindings/gpio/sifive,gpio.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/gpio/sifive
> -Original Message-
> From: Rob Herring
> Sent: 09 December 2020 04:52
> To: Yash Shah
> Cc: linux-kernel@vger.kernel.org; linux-ri...@lists.infradead.org;
> devicet...@vger.kernel.org; b...@suse.de; a...@brainfault.org;
> jonathan.came...@huawei.com; w...@kernel.o
Any updates on this patch?
- Yash
> -Original Message-
> From: Yash Shah
> Sent: 12 November 2020 17:31
> To: robh...@kernel.org; Paul Walmsley ( Sifive)
> ; pal...@dabbelt.com; b...@alien8.de;
> mche...@kernel.org; tony.l...@intel.com; james.mo...@arm.com;
> r.
Add support for additional interrupt present in SiFive FU740 chip.
Changes:
v3:
- Rename the subject line of dt-binding patch
- Add the additional interrupt "DirFail" as the last entry so as to keep
the order of all previous index same.
v2:
- Changes as per Rob Herring's requ
SiFive FU740 has 4 ECC interrupt sources as compared to 3 in FU540.
Update the L2 cache controller driver to support this additional
interrupt in case of FU740-C000 chip.
Signed-off-by: Yash Shah
---
drivers/soc/sifive/sifive_l2_cache.c | 27 ---
1 file changed, 24
The L2 cache controller in SiFive FU740 has 4 ECC interrupt sources as
compared to 3 in FU540. Update the DT documentation accordingly with
"compatible" and "interrupt" property changes.
Signed-off-by: Yash Shah
---
.../devicetree/bindings/riscv/sifiv
1-git-send-email-yash.s...@sifive.com/T/#t
[2]:
https://lore.kernel.org/linux-riscv/20201126030043.67390-1-zong...@sifive.com/T/#u
Yash Shah (4):
dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC
riscv: dts: add initial support for the SiFive FU740-C000 SoC
dt-bindings:
Add initial support for the SiFive FU540-C000 SoC. FU740-C000 is built
around the SiFIve U7 Core Complex and a TileLink interconnect.
This file is expected to grow as more device drivers are added to the
kernel.
Signed-off-by: Yash Shah
---
arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 293
Add new compatible strings to the DT binding documents to support SiFive
FU740-C000. Also, add new compatible strings in cpus.yaml to support the
E71 and U74 CPU cores ("harts") that are present on FU740-C000 SoC.
Signed-off-by: Yash Shah
---
Documentation/devicetree/bindings/g
Add new compatible strings to the YAML DT binding document to support
SiFive's HiFive Unmatched board
Signed-off-by: Yash Shah
---
Documentation/devicetree/bindings/riscv/sifive.yaml | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/Documentation/devic
Add initial board data for the SiFive HiFive Unmatched A00
Signed-off-by: Yash Shah
---
arch/riscv/boot/dts/sifive/Makefile| 3 +-
.../riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 253 +
2 files changed, 255 insertions(+), 1 deletion(-)
create mode
> -Original Message-
> From: Andrew Lunn
> Sent: 02 December 2020 20:28
> To: Yash Shah
> Cc: linux-...@vger.kernel.org; linux-ser...@vger.kernel.org; linux-
> p...@vger.kernel.org; linux-...@vger.kernel.org; linux-
> ker...@vger.kernel.org; linux-ri...@lists.inf
> -Original Message-
> From: Bin Meng
> Sent: 10 December 2020 19:05
> To: Yash Shah
> Cc: linux-...@vger.kernel.org; linux-ser...@vger.kernel.org; linux-
> p...@vger.kernel.org; linux-...@vger.kernel.org; linux-kernel ker...@vger.kernel.org>; linux-riscv ;
> dev
> -Original Message-
> From: Bin Meng
> Sent: 16 December 2020 11:36
> To: Yash Shah
> Cc: linux-...@vger.kernel.org; linux-ser...@vger.kernel.org; linux-
> p...@vger.kernel.org; linux-...@vger.kernel.org; linux-kernel ker...@vger.kernel.org>; linux-riscv ;
> dev
The L2 cache controller in SiFive FU740 has 4 ECC interrupt sources as
compared to 3 in FU540. Update the DT documentation accordingly with
"compatible" and "interrupt" property changes.
Signed-off-by: Yash Shah
---
Changes in v2:
- Changes as per Rob Herring's request
SiFive FU740 has 4 ECC interrupt sources as compared to 3 in FU540.
Update the L2 cache controller driver to support this additional
interrupt in case of FU740-C000 chip.
Signed-off-by: Yash Shah
---
drivers/soc/sifive/sifive_l2_cache.c | 49 +++-
1 file changed
> -Original Message-
> From: Rob Herring
> Sent: 21 November 2020 18:25
> To: Yash Shah
> Cc: Paul Walmsley ( Sifive) ;
> pal...@dabbelt.com; a...@eecs.berkeley.edu;
> jonathan.came...@huawei.com; w...@kernel.org; s...@ravnborg.org;
> Sagar Kadam ; a...@brainf
On Thu, Feb 7, 2019 at 3:47 PM Uwe Kleine-König
wrote:
>
> Hello,
>
> On Tue, Jan 29, 2019 at 05:13:19PM +0530, Yash Shah wrote:
> > Adds a PWM driver for PWM chip present in SiFive's HiFive Unleashed SoC.
> >
> > Signed-off-by: Wesley W. Terpstra
> &g
ary log
- Correct typo in driver name
- Remove use of of_match_ptr macro
- Update the DT compatible strings and Add reference to a common
versioning document
Yash Shah (2):
pwm: sifive: Add DT documentation for SiFive PWM Controller
pwm: sifive: Add a driver for SiFive SoC PWM
.../de
DT documentation for PWM controller added.
Signed-off-by: Wesley W. Terpstra
[Atish: Compatible string update]
Signed-off-by: Atish Patra
Signed-off-by: Yash Shah
Reviewed-by: Rob Herring
---
.../devicetree/bindings/pwm/pwm-sifive.txt | 33 ++
1 file changed, 33
Adds a PWM driver for PWM chip present in SiFive's HiFive Unleashed SoC.
Signed-off-by: Wesley W. Terpstra
[Atish: Various fixes and code cleanup]
Signed-off-by: Atish Patra
Signed-off-by: Yash Shah
---
drivers/pwm/Kconfig | 11 ++
drivers/pwm/Makefile | 1 +
drivers/pw
On Mon, Mar 18, 2019 at 10:56 PM Andreas Schwab wrote:
>
> On Mär 15 2019, Yash Shah wrote:
>
> > You need to make sure the period setting is passed via the
> > conventional way in DT file.
> > Example:
> > pwmleds {
> > compatible = "pwm-leds"
On Tue, Mar 19, 2019 at 3:16 AM Uwe Kleine-König
wrote:
>
> Hello,
>
> [I put Thierry into To: because some remaining questions depend on his
> views]
>
> On Mon, Mar 18, 2019 at 05:17:14PM +0530, Yash Shah wrote:
> > Adds a PWM driver for PWM chip present in Si
found at dev/yashs/L2_cache_controller branch of:
https://github.com/yashshah7/riscv-linux.git
Yash Shah (2):
edac: sifive: Add DT documentation for SiFive EDAC driver and
subcomponent
edac: sifive: Add EDAC driver for SiFive FU540-C000 chip
.../devicetree/bindings/edac/sifive-edac.txt
DT documentation for EDAC driver added.
DT documentation for subcomponent L2 cache controller also added.
Signed-off-by: Yash Shah
---
.../devicetree/bindings/edac/sifive-edac.txt | 40 ++
1 file changed, 40 insertions(+)
create mode 100644 Documentation/devicetree
this EDAC driver.
Signed-off-by: Yash Shah
---
arch/riscv/Kconfig | 1 +
drivers/edac/Kconfig | 13 ++
drivers/edac/Makefile | 1 +
drivers/edac/sifive_edac.c | 297 +
4 files changed, 312 insertions(+)
create mode 100644
Hi,
Any comments on this patch?
- Yash
On Wed, Aug 21, 2019 at 2:53 PM Yash Shah wrote:
>
> Add the PWM DT node in SiFive FU540 soc-specific DT file.
> Enable the PWM nodes in HiFive Unleashed board-specific DT file.
>
> Signed-off-by: Yash Shah
> ---
> arch/riscv/boot/
On Thu, Aug 29, 2019 at 2:36 AM David Miller wrote:
>
> From: Yash Shah
> Date: Tue, 27 Aug 2019 10:36:02 +0530
>
> > This patch series renames the compatible property to a more appropriate
> > string. The patchset is based on Linux-5.3-rc6 and tested on SiFive
> >
Add the PWM DT node in SiFive FU540 soc-specific DT file.
Enable the PWM nodes in HiFive Unleashed board-specific DT file.
Signed-off-by: Yash Shah
---
arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 19 +++
arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 8
As per the discussion with Nicolas Ferre[0], rename the compatible property
to a more appropriate and specific string.
[0]
https://lore.kernel.org/netdev/caj2_jofevzqat0yprg4hem4jrrqkb72fkseqj4p8p5ka-+r...@mail.gmail.com/
Signed-off-by: Yash Shah
Acked-by: Nicolas Ferre
Reviewed-by: Paul
to a
'lore.kernel.org' link instead of 'lkml.org'
Yash Shah (2):
macb: bindings doc: update sifive fu540-c000 binding
macb: Update compatibility string for SiFive FU540-C000
Documentation/devicetree/bindings/net/macb.txt | 4 ++--
drivers/net/ethernet/cadence/macb_mai
Update the compatibility string for SiFive FU540-C000 as per the new
string updated in the binding doc.
Reference:
https://lore.kernel.org/netdev/caj2_jofevzqat0yprg4hem4jrrqkb72fkseqj4p8p5ka-+r...@mail.gmail.com/
Signed-off-by: Yash Shah
Acked-by: Nicolas Ferre
Reviewed-by: Paul Walmsley
e,fu540-c000-pwm". I
will add it along with "sifive,pwm0" and repost as version 2.
Thanks for your comment.
- Yash
>
> >
> > - Yash
> >
> > On Wed, Aug 21, 2019 at 2:53 PM Yash Shah wrote:
> >>
> >> Add the PWM DT node i
On Mon, Aug 19, 2019 at 11:56 AM Christoph Hellwig wrote:
>
> On Mon, Aug 19, 2019 at 08:09:04AM +0200, Borislav Petkov wrote:
> > On Sun, Aug 18, 2019 at 10:29:35AM +0200, Christoph Hellwig wrote:
> > > The sifive_l2_cache.c is in no way related to RISC-V architecture
> > > memory management. It
On Mon, Jun 24, 2019 at 9:08 PM wrote:
>
> On 23/05/2019 at 22:50, Rob Herring wrote:
> > On Thu, May 23, 2019 at 6:46 AM Yash Shah wrote:
> >>
> >> Add the compatibility string documentation for SiFive FU540-C
> >> interface.
> >> On the
On Wed, Feb 13, 2019 at 4:05 PM Uwe Kleine-König
wrote:
>
> Hello,
>
> On Wed, Feb 13, 2019 at 02:56:18PM +0530, Yash Shah wrote:
> > Adds a PWM driver for PWM chip present in SiFive's HiFive Unleashed SoC.
> >
> > Signed-off-by: Wesley W. Terpstra
> &g
On Thu, Feb 14, 2019 at 2:07 AM Rob Herring wrote:
>
> On Wed, Feb 13, 2019 at 02:56:17PM +0530, Yash Shah wrote:
> > DT documentation for PWM controller added.
> >
> > Signed-off-by: Wesley W. Terpstra
> > [Atish: Compatible string update]
> > Signed-off-by:
On Thu, Feb 14, 2019 at 2:04 PM Uwe Kleine-König
wrote:
>
> Hello,
>
> On Thu, Feb 14, 2019 at 01:25:27PM +0530, Yash Shah wrote:
> > On Wed, Feb 13, 2019 at 4:05 PM Uwe Kleine-König
> > wrote:
> > > On Wed, Feb 13, 2019 at 02:56:18PM +0530, Yash Shah wrote:
>
This patch series adds a SPI driver and DT documentation
for HiFive Unleashed board.
Yash Shah (2):
spi: sifive: Add DT documentation for SiFive SPI controller
spi: sifive: Add driver for the SiFive SPI controller
.../devicetree/bindings/spi/spi-sifive.txt | 37 ++
drivers/spi
Add driver for the SiFive SPI controller
on the HiFive Unleashed board.
Signed-off-by: Palmer Dabbelt
Signed-off-by: Emil Renner Berthing
Signed-off-by: Yash Shah
---
drivers/spi/Kconfig | 6 +
drivers/spi/Makefile | 1 +
drivers/spi/spi-sifive.c | 450
DT documentation for SPI controller added.
Signed-off-by: Palmer Dabbelt
Signed-off-by: Emil Renner Berthing
Signed-off-by: Yash Shah
---
.../devicetree/bindings/spi/spi-sifive.txt | 37 ++
1 file changed, 37 insertions(+)
create mode 100644 Documentation
DT documentation for PWM controller added.
Signed-off-by: Wesley W. Terpstra
[Atish: Compatible string update]
Signed-off-by: Atish Patra
Signed-off-by: Yash Shah
---
.../devicetree/bindings/pwm/pwm-sifive.txt | 33 ++
1 file changed, 33 insertions(+)
create mode
cial alignments
- Replace ioread32/iowrite32 with readl/writel
- Remove camelcase
- Change dev_info to dev_dbg for unnecessary log
- Correct typo in driver name
- Remove use of of_match_ptr macro
- Update the DT compatible strings and Add reference to a common
versioning document
Yash Shah (2):
p
Adds a PWM driver for PWM chip present in SiFive's HiFive Unleashed SoC.
Signed-off-by: Wesley W. Terpstra
[Atish: Various fixes and code cleanup]
Signed-off-by: Atish Patra
Signed-off-by: Yash Shah
---
drivers/pwm/Kconfig | 11 ++
drivers/pwm/Makefile | 1 +
drivers/pw
DT documentation for PWM controller added.
Signed-off-by: Wesley W. Terpstra
[Atish: Compatible string update]
Signed-off-by: Atish Patra
Signed-off-by: Yash Shah
---
.../devicetree/bindings/pwm/pwm-sifive.txt | 33 ++
1 file changed, 33 insertions(+)
create mode
icial alignments
- Replace ioread32/iowrite32 with readl/writel
- Remove camelcase
- Change dev_info to dev_dbg for unnecessary log
- Correct typo in driver name
- Remove use of of_match_ptr macro
- Update the DT compatible strings and Add reference to a common
versioning document
Yash Shah (2):
Adds a PWM driver for PWM chip present in SiFive's HiFive Unleashed SoC.
Signed-off-by: Wesley W. Terpstra
[Atish: Various fixes and code cleanup]
Signed-off-by: Atish Patra
Signed-off-by: Yash Shah
---
drivers/pwm/Kconfig | 11 ++
drivers/pwm/Makefile | 1 +
drivers/pw
On Wed, Jan 16, 2019 at 1:41 AM Uwe Kleine-König
wrote:
>
> Hello,
>
> this is v3, right? It is helpful to point this out to ease reviewing.
Yes, it is v3. Will take care of this in v4.
>
> On Fri, Jan 11, 2019 at 01:52:43PM +0530, Yash Shah wrote:
> > DT documentation
On Wed, Jan 16, 2019 at 3:30 AM Uwe Kleine-König
wrote:
>
> Hello,
>
> On Fri, Jan 11, 2019 at 01:52:44PM +0530, Yash Shah wrote:
> > Adds a PWM driver for PWM chip present in SiFive's HiFive Unleashed SoC.
> >
> > Signed-off-by: Wesley W. Terpstra
> &g
On Wed, Jan 16, 2019 at 10:16 PM Uwe Kleine-König
wrote:
>
> Hello,
>
> On Wed, Jan 16, 2019 at 04:40:42PM +0530, Yash Shah wrote:
> > On Wed, Jan 16, 2019 at 3:30 AM Uwe Kleine-König
> > wrote:
> > > On Fri, Jan 11, 2019 at 01:52:44PM +0530, Yash Shah wrote:
po in driver name
- Remove use of of_match_ptr macro
- Update the DT compatible strings and Add reference to a common
versioning document
Yash Shah (2):
pwm: sifive: Add DT documentation for SiFive PWM Controller
pwm: sifive: Add a driver for SiFive SoC PWM
.../devicetree/bindings/pw
DT documentation for PWM controller added.
Signed-off-by: Wesley W. Terpstra
[Atish: Compatible string update]
Signed-off-by: Atish Patra
Signed-off-by: Yash Shah
---
.../devicetree/bindings/pwm/pwm-sifive.txt | 37 ++
1 file changed, 37 insertions(+)
create mode
Adds a PWM driver for PWM chip present in SiFive's HiFive Unleashed SoC.
Signed-off-by: Wesley W. Terpstra
[Atish: Various fixes and code cleanup]
Signed-off-by: Atish Patra
Signed-off-by: Yash Shah
---
drivers/pwm/Kconfig | 11 ++
drivers/pwm/Makefile | 1 +
drivers/pw
On Mon, Jan 21, 2019 at 8:29 PM Rob Herring wrote:
>
> On Mon, Jan 21, 2019 at 03:50:42PM +0530, Yash Shah wrote:
> > DT documentation for PWM controller added.
> >
> > Signed-off-by: Wesley W. Terpstra
> > [Atish: Compatible string update]
> > Signed-off-by:
patches needed for testing can be
found at dev/yashs/ethernet branch of:
https://github.com/yashshah7/riscv-linux.git
Yash Shah (2):
net/macb: bindings doc: add sifive fu540-c000 binding
net: macb: Add support for SiFive FU540-C000
Documentation/devicetree/bindings/net/macb.txt | 3 +
drivers
additional range to "reg" property for SiFive GEMGXL
management IP registers.
Signed-off-by: Yash Shah
---
Documentation/devicetree/bindings/net/macb.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/macb.txt
b/Documentation/devicetree/bi
.
Signed-off-by: Yash Shah
---
drivers/net/ethernet/cadence/macb_main.c | 118 +++
1 file changed, 118 insertions(+)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b/drivers/net/ethernet/cadence/macb_main.c
index c049410..a9e5227 100644
--- a/drivers/net
On Mon, May 6, 2019 at 4:57 PM Yash Shah wrote:
>
> The initial ver of EDAC driver supports:
> - ECC event monitoring and reporting through the EDAC framework for SiFive
> L2 cache controller.
>
> The EDAC driver registers for notifier events from the L2 cache controller
>
Hi Andreas,
On Thu, May 23, 2019 at 6:19 PM Andreas Schwab wrote:
>
> On Mai 23 2019, Yash Shah wrote:
>
> > On FU540, the management IP block is tightly coupled with the Cadence
> > MACB IP block. It manages many of the boundary signals from the MACB IP
> > This p
On Thu, May 23, 2019 at 8:24 PM Andrew Lunn wrote:
>
> > +static int fu540_macb_tx_set_rate(struct clk_hw *hw, unsigned long rate,
> > + unsigned long parent_rate)
> > +{
> > + rate = fu540_macb_tx_round_rate(hw, rate, &parent_rate);
> > + iowrite32(rate != 12
On Thu, May 23, 2019 at 9:58 PM David Miller wrote:
>
>
> Please be consistent in your subsystem prefixes used in your Subject lines.
> You use "net: macb:" then "net/macb:" Really, plain "macb: " is sufficient.
Sure, Will take care of this in the next revision of this patch.
Thanks for your com
On Fri, May 24, 2019 at 2:20 AM Rob Herring wrote:
>
> On Thu, May 23, 2019 at 6:46 AM Yash Shah wrote:
> >
> > Add the compatibility string documentation for SiFive FU540-C
> > interface.
> > On the FU540, this driver also needs to read and write registers in
On Mon, May 27, 2019 at 1:34 PM Andreas Schwab wrote:
>
> On Mai 24 2019, Yash Shah wrote:
>
> > Hi Andreas,
> >
> > On Thu, May 23, 2019 at 6:19 PM Andreas Schwab wrote:
> >>
> >> On Mai 23 2019, Yash Shah wrote:
> >>
> >>
DT documentation for PWM controller added.
Signed-off-by: Wesley W. Terpstra
[Atish: Compatible string update]
Signed-off-by: Atish Patra
Signed-off-by: Yash Shah
Reviewed-by: Rob Herring
---
.../devicetree/bindings/pwm/pwm-sifive.txt | 33 ++
1 file changed, 33
Add reference to a common
versioning document
Yash Shah (2):
pwm: sifive: Add DT documentation for SiFive PWM Controller
pwm: sifive: Add a driver for SiFive SoC PWM
.../devicetree/bindings/pwm/pwm-sifive.txt | 33 ++
drivers/pwm/Kconfig| 1
Adds a PWM driver for PWM chip present in SiFive's HiFive Unleashed SoC.
Signed-off-by: Wesley W. Terpstra
[Atish: Various fixes and code cleanup]
Signed-off-by: Atish Patra
Signed-off-by: Yash Shah
---
drivers/pwm/Kconfig | 11 ++
drivers/pwm/Makefile | 1 +
drivers/pw
Hi james,
On Thu, May 2, 2019 at 10:12 PM James Morse wrote:
>
> Hi Yash,
>
> Sorry for the delay on the earlier version of this - I was trying to work out
> what happens
> when multiple edac drivers probe based on DT...
>
>
> On 02/05/2019 12:16, Yash Shah wrote:
Add device tree bindings for SiFive FU540 L2 cache controller driver
Signed-off-by: Yash Shah
---
.../devicetree/bindings/riscv/sifive-l2-cache.txt | 51 ++
1 file changed, 51 insertions(+)
create mode 100644 Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt
27;
- Add "cache" to supported compatible string property
- Remove conditional checks from debugfs functions in sifive_l2_cache.c
Yash Shah (2):
RISC-V: Add DT documentation for SiFive L2 Cache Controller
RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive
SoCs
.../de
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