On Tue, Jun 19, 2018 at 05:29:03PM +0200, Ard Biesheuvel wrote:
> On 19 June 2018 at 17:28, Will Deacon wrote:
> > On Tue, Jun 19, 2018 at 05:23:41PM +0200, Ard Biesheuvel wrote:
> >> On 19 June 2018 at 17:20, Will Deacon wrote:
> >> > Hi Ard,
> >> &g
On Tue, Jun 19, 2018 at 05:40:26PM +0200, Ard Biesheuvel wrote:
> On 19 June 2018 at 17:37, Will Deacon wrote:
> > On Tue, Jun 19, 2018 at 05:29:03PM +0200, Ard Biesheuvel wrote:
> >> On 19 June 2018 at 17:28, Will Deacon wrote:
> >> > On Tue, Jun 19, 2018 at 05
On Tue, Jun 19, 2018 at 05:51:46PM +0200, Ard Biesheuvel wrote:
> On 19 June 2018 at 17:50, Will Deacon wrote:
> > On Tue, Jun 19, 2018 at 05:40:26PM +0200, Ard Biesheuvel wrote:
> >> On 19 June 2018 at 17:37, Will Deacon wrote:
> >> > On Tue, Jun 19, 2018 at 05
__smp_mb(); \
> VAL;\
> })
>
> the __smp_mb() before loop is used to avoid "reads prioritised over
> writes", which is caused by SFB's weak ordering and similar to ARM11MPCore
> (mentioned by Will Deacon).
Sure, but s
On Wed, May 30, 2018 at 12:48:06PM +0800, YaoJun wrote:
> To protect against KSMA(Kernel Space Mirroring Attack), make
> tramp_pg_dir read-only. The principle of KSMA is to insert a
> carefully constructed PGD entry into the translation table.
> The type of this entry is block, which maps the kerne
.
Cc: Yoshinori Sato
Signed-off-by: Will Deacon
---
arch/h8300/include/asm/atomic.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/h8300/include/asm/atomic.h b/arch/h8300/include/asm/atomic.h
index 941e7554e886..b174dec099bf 100644
--- a/arch/h8300/include/asm/ato
ust define the lock bitops in terms of the atomic bitops in the
asm/bitops.h header.
Acked-by: Geert Uytterhoeven
Signed-off-by: Will Deacon
---
arch/m68k/include/asm/bitops.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/m68k/include/asm/bitops.h b/arch/m68k/i
The asm-generic/bitops/{atomic,lock}.h implementations are built around
the atomic-fetch ops, which we implement efficiently for both LSE and
LL/SC systems. Use that instead of our hand-rolled, out-of-line bitops.S.
Signed-off-by: Will Deacon
---
arch/arm64/include/asm/bitops.h | 14
asm-generic/bitops/ext2-atomic-setbit.h provides the ext2 atomic bitop
definitions, so we don't need to define our own.
Signed-off-by: Will Deacon
---
arch/arm64/include/asm/bitops.h | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/arch/arm64/include/asm/bitops.h b
The sh implementation of asm/cmpxchg-xchg.h pulls in linux/bitops.h
so that it can refer to BITS_PER_BYTE. It also transitively relies on
this pulling in linux/compiler.h for READ_ONCE.
Replace the #include with linux/bits.h and linux/compiler.h
Signed-off-by: Will Deacon
---
arch/sh/include
that some of the fetch ops are replaced
by non-value-returning ops for some of the atomic bitops.
Thanks,
Will
--->8
Will Deacon (9):
h8300: Don't include linux/kernel.h in asm/atomic.h
m68k: Don't use asm-generic/bitops/lock.h
asm-generic: Move some macros from linux/bito
The openrisc implementation of asm/cmpxchg.h pulls in linux/bitops.h
so that it can refer to BITS_PER_BYTE. It also transitively relies on
this pulling in linux/compiler.h for READ_ONCE.
Replace the #include with linux/bits.h and linux/compiler.h
Signed-off-by: Will Deacon
---
arch/openrisc
new header file, linux/bits.h
Signed-off-by: Will Deacon
---
include/linux/bitops.h | 22 +-
include/linux/bits.h | 26 ++
2 files changed, 27 insertions(+), 21 deletions(-)
create mode 100644 include/linux/bits.h
diff --git a/include/linux/bitops.h
The atomic bitops can actually be implemented pretty efficiently using
the atomic_* ops, rather than explicit use of spinlocks.
Cc: Peter Zijlstra
Cc: Ingo Molnar
Signed-off-by: Will Deacon
---
include/asm-generic/bitops/atomic.h | 188 +++-
1 file changed, 33
The lock bitops can be implemented more efficiently using the atomic_fetch_*
ops, which provide finer-grained control over the memory ordering semantics
than the bitops.
Cc: Peter Zijlstra
Cc: Ingo Molnar
Signed-off-by: Will Deacon
---
include/asm-generic/bitops/lock.h | 68
On Fri, Jun 29, 2018 at 06:36:10PM +0200, Andrey Konovalov wrote:
> On Fri, Jun 29, 2018 at 1:07 PM, Will Deacon wrote:
> > It might not seen sensible, but we could still be relying on this in the
> > kernel and so this change would introduce a regression. I think we need
> &
Hi Alan,
On Fri, Jun 22, 2018 at 03:11:37PM -0400, Alan Stern wrote:
> On Fri, 22 Jun 2018, Will Deacon wrote:
> > On Fri, Jun 22, 2018 at 02:09:04PM -0400, Alan Stern wrote:
> > > On Fri, 22 Jun 2018, Will Deacon wrote:
> > > > Could we drop the acquire/release
Hi Alan,
On Tue, Jul 03, 2018 at 01:28:17PM -0400, Alan Stern wrote:
> On Mon, 25 Jun 2018, Andrea Parri wrote:
>
> > On Fri, Jun 22, 2018 at 07:30:08PM +0100, Will Deacon wrote:
> > > > > I think the second example would preclude us using LDAPR for
> > >
an Stern
> To: LKMM Maintainers -- Akira Yokosawa ,Andrea Parri
> ,Boqun Feng
> , David Howells ,
> Jade Alglave ,Luc Maranget
> ,
> Nicholas Piggin ,
> "Paul E. McKenney" ,Peter Zijlstra
> ,
> Will Deacon
> c
Hi Kees,
On Mon, Jul 02, 2018 at 10:29:24AM -0700, Kees Cook wrote:
> On Mon, Jul 2, 2018 at 2:59 AM, Will Deacon wrote:
> > On Fri, Jun 29, 2018 at 01:25:20PM -0700, Kees Cook wrote:
> >> No worries! I've made the change locally and will push this out to
> >> -
On Fri, Jun 29, 2018 at 12:15:44PM +0100, Suzuki K Poulose wrote:
> diff --git a/arm/kvm.c b/arm/kvm.c
> index 5701d41..b1969be 100644
> --- a/arm/kvm.c
> +++ b/arm/kvm.c
> @@ -11,6 +11,8 @@
> #include
> #include
>
> +unsigned long kvm_arm_type;
> +
> struct kvm_ext kvm_req_ext[] = {
>
On Mon, Jun 25, 2018 at 11:59:47AM +0100, Mark Rutland wrote:
> Currently architectures can override __atomic_op_*() to define the barriers
> used before/after a relaxed atomic when used to build acquire/release/fence
> variants.
>
> This has the unfortunate property of requiring the architecture
tives.
>
> Some unusual whitespace in the cmpxchg wrappers is fixed up as part of
> the change.
>
> Signed-off-by: Mark Rutland
> Cc: Catalin Marinas
> Cc: Will Deacon
> ---
> arch/arm64/include/asm/atomic.h | 237
> ++-
>
On Mon, Jun 25, 2018 at 11:59:49AM +0100, Mark Rutland wrote:
> As a step to ensuring the atomic* APIs are consistent, switch to fallbacks
> generated by gen-atomic-fallback.sh.
>
> These are checked in rather than generated with Kbuild, since:
>
> * This allows inspection of the atomics with git
; must be passed to Kconfig to call $(ld-option,...)
> from Kconfig files. If you tweak 'LD' in arch Makefile depending on
> CONFIG_CPU_BIG_ENDIAN, this would end up with circular dependency
> between Makefile and Kconfig.
>
> Signed-off-by: Masahiro Yamada
> ---
Acked
On Tue, Jul 03, 2018 at 11:02:15PM +0200, Thomas Gleixner wrote:
> On Fri, 29 Jun 2018, Kani, Toshi wrote:
> > On Fri, 2018-06-29 at 13:23 +0100, Will Deacon wrote:
> > > On Wed, Jun 27, 2018 at 04:13:22PM +, Kani, Toshi wrote:
> > > > On Wed, 2018-06-27 at
powerpc gave a patch,
> I figured I would do arm64 since the changes were also fairly simple.
> ---
> arch/arm64/kernel/vdso/note.S | 3 +++
> 1 file changed, 3 insertions(+)
If you drop the trailing semicolon, then:
Acked-by: Will Deacon
Will
> diff --git a/arch/arm64/kernel/
On Wed, Jul 04, 2018 at 05:37:23PM +0100, Mark Rutland wrote:
> On Wed, Jul 04, 2018 at 04:24:22PM +0100, Will Deacon wrote:
> > This is mostly straightforward, but the cmpxchg/cmpxchg_double cases grow
> > an 'arch' prefix which suggests that they're part of the API
On Wed, Jul 04, 2018 at 05:01:46PM +0100, Mark Rutland wrote:
> On Wed, Jul 04, 2018 at 04:28:47PM +0100, Will Deacon wrote:
> > On Mon, Jun 25, 2018 at 11:59:49AM +0100, Mark Rutland wrote:
> > > As a step to ensuring the atomic* APIs are consistent, switch to fallbacks
>
On Wed, Jul 04, 2018 at 04:56:19PM +0100, Mark Rutland wrote:
> On Wed, Jul 04, 2018 at 04:06:46PM +0100, Will Deacon wrote:
> > On Mon, Jun 25, 2018 at 11:59:47AM +0100, Mark Rutland wrote:
> > > Currently architectures can override __atomic_op_*() to define the
> > >
Andrea,
On Thu, Jul 05, 2018 at 04:00:29PM +0200, Andrea Parri wrote:
> On Wed, Jul 04, 2018 at 01:11:04PM +0100, Will Deacon wrote:
> > On Tue, Jul 03, 2018 at 01:28:17PM -0400, Alan Stern wrote:
> > > There's also read-write ordering, in the form of the LB pattern:
>
On Thu, Jul 05, 2018 at 10:21:36AM -0400, Alan Stern wrote:
> On Wed, 4 Jul 2018, Will Deacon wrote:
> > On Tue, Jul 03, 2018 at 01:28:17PM -0400, Alan Stern wrote:
> > > Would this be allowed if smp_load_acquire() was implemented with LDAPR?
> > > If the answer is yes
On Thu, Jul 05, 2018 at 10:57:28AM -0400, Alan Stern wrote:
> On Thu, 5 Jul 2018, Will Deacon wrote:
> > On Thu, Jul 05, 2018 at 10:21:36AM -0400, Alan Stern wrote:
> > > On Wed, 4 Jul 2018, Will Deacon wrote:
> > > > On Tue, Jul 03, 2018 at 01:28:17PM -0400, Alan Ste
On Thu, Jul 05, 2018 at 08:44:39AM -0700, Daniel Lustig wrote:
> On 7/5/2018 8:31 AM, Paul E. McKenney wrote:
> > On Thu, Jul 05, 2018 at 10:21:36AM -0400, Alan Stern wrote:
> >> At any rate, it looks like instead of strengthening the relation, I
> >> should write a patch that removes it entirely.
On Thu, Jul 05, 2018 at 11:12:41AM +0100, Mark Rutland wrote:
> On Wed, Jul 04, 2018 at 06:50:00PM +0100, Will Deacon wrote:
> > On Wed, Jul 04, 2018 at 04:56:19PM +0100, Mark Rutland wrote:
> > > On Wed, Jul 04, 2018 at 04:06:46PM +0100, Will Deacon wrote:
> > > >
On Wed, Jul 04, 2018 at 09:39:50PM +0200, Thomas Gleixner wrote:
> On Wed, 4 Jul 2018, Will Deacon wrote:
> > On Tue, Jul 03, 2018 at 11:02:15PM +0200, Thomas Gleixner wrote:
> >
> > > I just pick it up and provide Will a branch to pull that lot from.
> >
> >
On Thu, Jul 05, 2018 at 09:56:02AM -0700, Paul E. McKenney wrote:
> On Thu, Jul 05, 2018 at 05:22:26PM +0100, Will Deacon wrote:
> > On Thu, Jul 05, 2018 at 08:44:39AM -0700, Daniel Lustig wrote:
> > > On 7/5/2018 8:31 AM, Paul E. McKenney wrote:
> > > > On Thu, Ju
s out the instrumented
> atomics
> such that arm64 can be migrated over to them.
Thanks! For the series apart from the shell scripts:
Acked-by: Will Deacon
Will
Please write a commit message for your patch.
On Fri, Jul 06, 2018 at 08:56:27AM -0700, Nikunj Kela wrote:
> Cc: xe-ker...@external.cisco.com
> Cc: Nikunj Kela
> Signed-off-by: Nikunj Kela
> ---
> arch/arm64/Kconfig | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm64/Kconfi
t logic gone, we can fold the branch target into the macro, so
> that callers need not deal with this. GAS provides \@, which provides a
> unique value per macro invocation, which we can use to create a unique
> label.
>
> Signed-off-by: Mark Rutland
> Acked-by: Marc Zyngier
&
On Mon, Jul 02, 2018 at 12:03:56PM +0100, Mark Rutland wrote:
> This series reworks arm64's syscall handling to minimize the propagation
> of user-controlled register values into speculated code paths. As with
> x86 [1], a wrapper is generated for each syscall, which extracts the
> argument from a
Hi Mathieu,
On Fri, Jul 06, 2018 at 12:59:22PM -0400, Mathieu Desnoyers wrote:
> The 4.18-rc3 arm32 kernel defconfig fails to boot on my Cubietruck.
> This issue appeared with 4.18-rc1.
>
> It worked fine on 4.17.
>
> Any ideas ?
CC'ing linux-arm-kernel would be a good place to start :) [I've a
On Fri, Jul 06, 2018 at 10:02:15AM -0700, Nikunj Kela wrote:
> Flatmem is useful in reducing kernel memory usage.
> One usecase is in kdump kernel. We are able to save
> ~14M by moving to flatmem scheme.
>
> Cc: xe-ker...@external.cisco.com
> Cc: Nikunj Kela
> Signed-off-by: Nikunj Kela
> ---
>
On Tue, Jun 12, 2018 at 04:41:32PM -0400, Agustin Vega-Frias wrote:
> Hi Mark,
>
> On 2018-06-12 10:40, Mark Rutland wrote:
> >Hi,
> >
> >On Thu, Jun 07, 2018 at 09:56:48AM -0400, Agustin Vega-Frias wrote:
> >>Selection of these events can be envisioned as indexing them from
> >>a 3D matrix:
> >>-
On Wed, Jun 13, 2018 at 01:59:58PM +0100, Marc Zyngier wrote:
> On 13/06/18 11:35, Will Deacon wrote:
> > On Tue, Jun 12, 2018 at 04:41:32PM -0400, Agustin Vega-Frias wrote:
> >> On 2018-06-12 10:40, Mark Rutland wrote:
> >>> On Thu, Jun 07, 2018 at 09:56:48AM -
~0 is
> equivalent to ~(intmax_t)0 rather than ~(int)0. Therefore, instead of ~0
> we use 0x, which is unambiguous.
>
> Signed-off-by: Mark Rutland
> Reviewed-by: Dave Martin
> Cc: Catalin Marinas
> Cc: James Morse
> Cc: Will Deacon
> ---
> arch/ar
On Wed, May 16, 2018 at 04:13:13PM -0400, Mathieu Desnoyers wrote:
> - On May 16, 2018, at 12:18 PM, Peter Zijlstra pet...@infradead.org wrote:
>
> > On Mon, Apr 30, 2018 at 06:44:22PM -0400, Mathieu Desnoyers wrote:
> >> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> >> index a7f8e7f4b88f
On Tue, Aug 14, 2018 at 01:42:27PM -0600, Mathieu Poirier wrote:
> On Tue, 14 Aug 2018 at 11:09, Kim Phillips wrote:
> > The other thing that's going on here is that I'm becoming numb to the
> > loathsome "failed to mmap with 12 (Cannot allocate memory)" being
> > returned no matter what the error
Hi John,
On Wed, Aug 15, 2018 at 04:55:15PM -0700, John Stultz wrote:
> On Tue, Aug 14, 2018 at 4:36 AM, Will Deacon wrote:
> >
> > Please pull these arm64 updates for 4.19. Details in the tag, but please be
> > aware that we've pulled in the x86/mm branch from -tip s
On Thu, Aug 16, 2018 at 04:21:17PM +0800, Leizhen (ThunderTown) wrote:
> On 2018/8/15 20:26, Robin Murphy wrote:
> > On 15/08/18 11:23, Zhen Lei wrote:
> >> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
> >> index 1d64710..3f5c236 100644
> >> --- a/drivers/iommu/arm-smmu-v3
(HEAD, refs/bisect/bad)
> Author: Will Deacon
> Date: Tue Jun 19 17:55:28 2018 +0100
>
> arm64: insn: Don't fallback on nosync path for general insn patching
>
> Here's the boot log with earlycon enabled after which the boot hangs:
Thanks for the boot log, that's
avoiding an IPI with interrupts disabled
- Fix address truncation in pfn_valid() implementation
Greg Hackmann (1):
arm64: mm: check for upper PAGE_SHIFT bits in pfn_valid()
Will Deacon (1):
arm64: Avoid calling stop_machin
the spin & write lock code resemble each
> other more closely and have similar likely() hints.
>
> Suggested-by: Peter Zijlstra
> Signed-off-by: Matthew Wilcox
> ---
> include/asm-generic/qrwlock.h | 7 ---
> include/asm-generic/qspinlock.h | 17 ++---
> 2 files changed, 14 insertions(+), 10 deletions(-)
Shouldn't make any difference on arm64, so:
Acked-by: Will Deacon
Will
On Wed, Dec 12, 2018 at 03:18:06PM +0530, Vivek Gautam wrote:
> On Fri, Oct 12, 2018 at 11:37 AM Vivek Gautam
> wrote:
> > On 10/12/2018 3:46 AM, Rob Herring wrote:
> > > On Thu, 11 Oct 2018 15:19:29 +0530, Vivek Gautam wrote:
> > >> Qcom's implementation of arm,mmu-500 works well with current
> >
On Wed, Dec 12, 2018 at 09:50:37AM -0800, Kees Cook wrote:
> On Wed, Dec 12, 2018 at 4:08 AM Ard Biesheuvel
> wrote:
> >
> > This enables the use of per-task stack canary values if GCC has
> > support for emitting the stack canary reference relative to the
> > value of sp_el0, which holds the task
Hi Kristina,
On Fri, Dec 07, 2018 at 06:39:18PM +, Kristina Martsenko wrote:
> This series adds support for the ARMv8.3 pointer authentication extension,
> enabling userspace return address protection with GCC 7 and above.
I've pushed this out to for-next/ptr-auth with the following changes:
autam
> Reviewed-by: Rob Herring
> Cc: Will Deacon
> ---
>
> Hi Joerg,
> I am picking this out separately from the sdm845 smmu support
> series [1], so that this can go through iommu tree.
> The dt patch from the series [1] can be taken through arm-soc tree.
>
> Hi
On Thu, Dec 13, 2018 at 05:01:07PM +1100, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the akpm-current tree got a conflict in:
>
> arch/arm64/mm/mmu.c
>
> between commit:
>
> 4ab215061554 ("arm64: Add memory hotplug support")
>
> from the arm64 tree and commit:
>
>
On Wed, Dec 12, 2018 at 07:35:44PM +, Will Deacon wrote:
> On Fri, Dec 07, 2018 at 06:39:18PM +, Kristina Martsenko wrote:
> > This series adds support for the ARMv8.3 pointer authentication extension,
> > enabling userspace return address protection with GCC 7 and above.
&
[+Ard because I'll basically go with his preference on this one]
On Wed, Dec 12, 2018 at 06:56:49PM +0800, Miles Chen wrote:
> When debug with kaslr, it is sometimes necessary to have PHYS_OFFSET to
> perform linear virtual address to physical address translation.
> Sometimes we're debugging with
Hi Masahiro,
On Fri, Dec 14, 2018 at 01:01:52PM +0900, Masahiro Yamada wrote:
> Use the standard obj-$(CONFIG_...) syntex. The behavior is still the
> same.
>
> Signed-off-by: Masahiro Yamada
> ---
>
> arch/arm64/kernel/Makefile | 59
> +++---
> 1 file
On Fri, Dec 14, 2018 at 10:34:31AM +, Steven Price wrote:
> On 06/12/2018 23:44, Jeremy Linton wrote:
> > From: Mian Yousaf Kaukab
> >
> > Return status based no ssbd_state and the arm64 SSBS feature.
> ^^ on
>
> > Return string "Unknown" in case CONFIG_ARM64_SSBD is
>
On Fri, Dec 14, 2018 at 07:35:57PM +0900, Masahiro Yamada wrote:
> Hi Will,
>
> On Fri, Dec 14, 2018 at 6:54 PM Will Deacon wrote:
> >
> > Hi Masahiro,
> >
> > On Fri, Dec 14, 2018 at 01:01:52PM +0900, Masahiro Yamada wrote:
> > > Use the standard obj-$
On Fri, Dec 14, 2018 at 11:28:16AM +, Dave Martin wrote:
> On Fri, Dec 14, 2018 at 10:41:42AM +, Steven Price wrote:
> > On 14/12/2018 10:36, Will Deacon wrote:
> > > On Fri, Dec 14, 2018 at 10:34:31AM +, Steven Price wrote:
> > >> On 06/12/2018 23:44, Jer
abilities: Optimize this_cpu_has_cap
arm64: capabilities: Use linear array for detection and verification
arm64: capabilities: Batch cpu_enable callbacks
arm64: smp: Handle errors reported by the firmware
Will Deacon (34):
arm64: perf: Terminate PMU assignment statements with semi
On Tue, Dec 11, 2018 at 04:50:34PM -0800, Kees Cook wrote:
> On Mon, Dec 10, 2018 at 7:41 PM wrote:
> >
> > From: Yulei Zhang
> >
> > Early this year we spot there may be two issues in kernel
> > kfifo.
> >
> > One is reported by Xiao Guangrong to linux kernel.
> > https://lkml.org/lkml/2018/5/11
On Mon, Dec 10, 2018 at 08:22:06AM -0600, Richard Henderson wrote:
> On 12/10/18 6:03 AM, Catalin Marinas wrote:
> >> However, it won't be too long before someone implements support for
> >> ARMv8.2-LVA, at which point, without changes to mandatory pointer tagging,
> >> we
> >> will only have 3 au
date GFP_SLAB_BUG_MASK.
>
> Also, print an error when the physical address does not fit in
> 32-bit, to make debugging easier in the future.
>
> Cc: sta...@vger.kernel.org
> Fixes: ad67f5a6545f ("arm64: replace ZONE_DMA with ZONE_DMA32")
> Signed-off-by: Nicolas Boichat
> ---
Acked-by: Will Deacon
Will
to use 'grep' instead of 'fold' to use a dependency that is
> already used a lot in the kernel.
>
> Reported-by: Naresh Kamboju
> Suggested-by: Will Deacon
> Signed-off-by: Anders Roxell
> [Mark: rework commit message]
> Signed-off-by: Mark Rutland
&
sh script. As some users apparently build the kernel wihout
> coreutils, lacking sha1sum, the checks are skipped in this case.
> Presumably, most developers have a working coreutils installation.
>
> Signed-off-by: Mark Rutland
> Cc: Andrew Morton
> Cc: Boqun Feng
>
On Tue, Dec 11, 2018 at 11:05:46AM +0100, Arnd Bergmann wrote:
> This is needed for compilation in some configurations that don't
> include it implicitly:
>
> arch/arm64/kernel/machine_kexec_file.c: In function
> 'arch_kimage_file_post_load_cleanup':
> arch/arm64/kernel/machine_kexec_file.c:37:2:
On Tue, Dec 11, 2018 at 05:12:30PM +1100, Stephen Rothwell wrote:
> On Tue, 11 Dec 2018 17:11:02 +1100 Stephen Rothwell
> wrote:
> >
> > Today's linux-next merge of the akpm-current tree got a conflict in:
> >
> > arch/arm64/mm/proc.S
> >
> > between commits:
> >
> > 67e7fdfcc682 ("arm64:
On Tue, Dec 11, 2018 at 03:08:10PM +0100, Arnd Bergmann wrote:
> In some randconfig builds, the new CONFIG_ARM64_USER_VA_BITS_52
> triggered a build failure:
>
> arch/arm64/mm/proc.S:287: Error: immediate out of range
>
> As it turns out, we were incorrectly setting PGTABLE_LEVELS here,
> lacking
is to implement HWASan [2] for the kernel with the incentive,
> that it's going to have comparable to KASAN performance, but in the same
> time consume much less memory, trading that off for somewhat imprecise
> bug detection and being supported only for arm64.
For the arm64 parts:
Ack
[moving akpm to To:]
On Tue, Dec 11, 2018 at 04:57:27PM +0100, Andrey Konovalov wrote:
> On Tue, Dec 11, 2018 at 4:18 PM Will Deacon wrote:
> > On Thu, Dec 06, 2018 at 01:24:18PM +0100, Andrey Konovalov wrote:
> > > This patchset adds a new software tag-based mode to KASAN [1]
On Mon, Dec 10, 2018 at 03:29:01PM +, Robin Murphy wrote:
> Wire up the basic support for hot-adding memory. Since memory hotplug
> is fairly tightly coupled to sparsemem, we tweak pfn_valid() to also
> cross-check the presence of a section in the manner of the generic
> implementation, before
On Tue, Dec 11, 2018 at 05:21:24PM +, Robin Murphy wrote:
> On 11/12/2018 16:36, Will Deacon wrote:
> > On Mon, Dec 10, 2018 at 03:29:01PM +, Robin Murphy wrote:
> > > Wire up the basic support for hot-adding memory. Since memory hotplug
> > > is fairly tight
finitions with the _BITUL() macro instead. That also means we don't
have to worry about these constants being used in assembly files when
using older versions of binutils.
Will
--->8
>From 25f3852cd8912174c3410414115783799357230a Mon Sep 17 00:00:00 2001
From: Will Deacon
Date: Tue, 11
smp: Fix compilation error
drivers/perf: hisi: Fixup one DDRC PMU register offset
Will Deacon (3):
arm64: compat: Avoid sending SIGILL for unallocated syscall numbers
arm64: compat: Don't pull syscall number from regs in arm_compat_syscall
arm64: compat: Hook up io_pgetevents
On Wed, Jan 02, 2019 at 03:57:54PM -0500, Michael S. Tsirkin wrote:
> We don't really care whether the variable is in-register
> or in-memory. Relax the constraint accordingly.
>
> Signed-off-by: Michael S. Tsirkin
> ---
> include/linux/compiler.h | 2 +-
> 1 file changed, 1 insertion(+), 1 dele
On Tue, Dec 18, 2018 at 10:21:27AM +, Jonathan Cameron wrote:
> On Mon, 17 Dec 2018 12:19:15 -0600
> Bjorn Helgaas wrote:
> > Agreed. I could imagine a drivers/pci/pmu/ directory sort of like
> > drivers/pci/switch/.
>
> That might work. Mark, Will what do you think? As long as you and Bjor
On Wed, Jan 02, 2019 at 12:14:36PM -0800, Andrew Morton wrote:
> On Wed, 2 Jan 2019 18:36:06 +0100 Andrey Konovalov
> wrote:
>
> > Instead of changing cache->align to be aligned to KASAN_SHADOW_SCALE_SIZE
> > in kasan_cache_create() we can reuse the ARCH_SLAB_MINALIGN macro.
> >
> > ...
> >
>
On Thu, Jan 03, 2019 at 11:50:12AM +, Dave Martin wrote:
> On Thu, Jan 03, 2019 at 03:45:47PM +0800, Pi-Hsun Shih wrote:
> > For syscall number smaller than 0xf, arm calls sys_ni_syscall
> > instead of arm_syscall in arch/arm/kernel/entry-common.S, which returns
> > -ENOSYS instead of raisi
On Thu, Jan 03, 2019 at 04:51:44PM +, Will Deacon wrote:
> On Thu, Jan 03, 2019 at 11:50:12AM +, Dave Martin wrote:
> > On Thu, Jan 03, 2019 at 03:45:47PM +0800, Pi-Hsun Shih wrote:
> > > For syscall number smaller than 0xf, arm calls sys_ni_syscall
> > > ins
On Fri, Jan 04, 2019 at 09:18:41AM +0900, Masahiro Yamada wrote:
> Use the standard obj-$(CONFIG_...) syntex. The behavior is still the
> same.
>
> Signed-off-by: Masahiro Yamada
> ---
>
> Changes in v2:
> - Rebase
Thanks for the reminder -- I'll queue this up today!
Will
On Thu, Jan 03, 2019 at 02:32:44PM -0600, Jeremy Linton wrote:
> On 01/03/2019 01:30 PM, Stefan Wahren wrote:
> > > Jeremy Linton hat am 3. Januar 2019 um 17:46
> > > geschrieben:
> > > On 01/03/2019 10:37 AM, Dave Martin wrote:
> > > > On Wed, Jan 02, 2019 at 06:49:15PM -0600, Jeremy Linton wrot
On Fri, Jan 04, 2019 at 03:18:05PM +0100, Greg Kroah-Hartman wrote:
> On Fri, Jan 04, 2019 at 02:08:32PM +, Dave Martin wrote:
> > On Thu, Jan 03, 2019 at 05:48:31PM +0100, Greg Kroah-Hartman wrote:
> > > On Thu, Jan 03, 2019 at 10:38:16AM -0600, Jeremy Linton wrote:
> > > > On 01/03/2019 03:38
ed-off-by: Lance Roy
> Cc: Peter Zijlstra
> Cc: Ingo Molnar
> Cc: Will Deacon
> ---
> kernel/locking/mutex-debug.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/kernel/locking/mutex-debug.c b/kernel/locking/mutex-debug.c
> index 9aa713629
On Tue, Oct 09, 2018 at 04:04:21PM +0300, Kirill A. Shutemov wrote:
> On Tue, Oct 09, 2018 at 09:28:58AM +0530, Anshuman Khandual wrote:
> > A normal mapped THP page at PMD level should be correctly differentiated
> > from a PMD migration entry while walking the page table. A mapped THP would
> > a
On Tue, Oct 09, 2018 at 05:43:59PM +0200, Peter Zijlstra wrote:
> On Tue, Oct 09, 2018 at 05:39:27PM +0200, Lukasz Luba wrote:
> > This patch add some warning related to performance drop.
> > It should be mentioned that this is not for free
> > and the platfrom resources (cache, bus interconnect, e
Hi Bjorn,
On Fri, Oct 05, 2018 at 12:31:45PM -0500, Bjorn Helgaas wrote:
> [+cc arm64 folks, LKML: This conversation is about this patch:
>
>
> https://lore.kernel.org/linux-pci/20180918235848.26694-3-keith.bu...@intel.com
>
> which fixes some PCIe AER error injection bugs, but also makes the
...@amarulasolutions.com
> Signed-off-by: Peter Zijlstra (Intel)
> ---
> kernel/locking/qspinlock.c | 38 +++---
> 1 file changed, 27 insertions(+), 11 deletions(-)
Acked-by: Will Deacon
Will
e a later xchg_tail, there is no difference from that
>xchg_tail having taken place before the tas-pending.
>
> Cc: mi...@kernel.org
> Cc: t...@linutronix.de
> Cc: long...@redhat.com
> Cc: andrea.pa...@amarulasolutions.com
> Suggested-by: Will Deacon
> Signed-off-by:
pping.
Cc: Chintan Pandya
Cc: Toshi Kani
Cc: Thomas Gleixner
Cc: Michal Hocko
Cc: Andrew Morton
Suggested-by: Linus Torvalds
Reviewed-by: Toshi Kani
Signed-off-by: Will Deacon
---
lib/ioremap.c | 56 ++--
1 file changed, 42 insertions(+
: Toshi Kani
Signed-off-by: Will Deacon
---
arch/arm64/mm/mmu.c | 5 +
arch/x86/mm/pgtable.c | 8
include/asm-generic/pgtable.h | 5 +
lib/ioremap.c | 27 +--
4 files changed, 39 insertions(+), 6 deletions(-)
diff --git
.
All feedback welcome,
Will
--->8
Will Deacon (5):
ioremap: Rework pXd_free_pYd_page() API
arm64: mmu: Drop pXd_present() checks from pXd_free_pYd_table()
x86/pgtable: Drop pXd_none() checks from pXd_free_pYd_table()
lib/ioremap: Ensure phys_addr actually corresponds to a physi
The core code already has a check for pXd_none(), so remove it from the
architecture implementation.
Cc: Chintan Pandya
Cc: Toshi Kani
Cc: Thomas Gleixner
Cc: Michal Hocko
Cc: Andrew Morton
Signed-off-by: Will Deacon
---
arch/arm64/mm/mmu.c | 8 ++--
1 file changed, 2 insertions(+), 6
tting.
Cc: Chintan Pandya
Cc: Toshi Kani
Cc: Thomas Gleixner
Cc: Michal Hocko
Cc: Andrew Morton
Cc: Sean Christopherson
Signed-off-by: Will Deacon
---
lib/ioremap.c | 28
1 file changed, 12 insertions(+), 16 deletions(-)
diff --git a/lib/ioremap.c b/lib/iorem
The core code already has a check for pXd_none(), so remove it from the
architecture implementation.
Cc: Chintan Pandya
Cc: Toshi Kani
Cc: Michal Hocko
Cc: Andrew Morton
Acked-by: Thomas Gleixner
Reviewed-by: Toshi Kani
Signed-off-by: Will Deacon
---
arch/x86/mm/pgtable.c | 6 --
1
Hi Prasad,
On Tue, Oct 09, 2018 at 01:56:14PM -0700, Sodagudi Prasad wrote:
> This is regarding - thread "try to fix contention between expire_timers and
> try_to_del_timer_sync".
> https://lkml.org/lkml/2017/7/28/172
>
> I think this live lockup issue was discussed earlier but the final set of
>
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