Hi Leo and Jassi,
On 26/02/2016 19:40, Jassi Brar wrote:
> On Mon, Feb 15, 2016 at 7:20 PM, Leo Yan wrote:
>> Hi6220 mailbox supports up to 32 channels. Each channel is unidirectional
>> with a maximum message size of 8 words. I/O is performed using register
>> access (there is no DMA) and the ce
Hi Leo,
On 16/02/2016 09:21, Chen Feng wrote:
> Lee,
> Thanks for your review.
>
> On 2016/2/15 16:32, Lee Jones wrote:
>> On Sun, 14 Feb 2016, Chen Feng wrote:
>>
>>> DT bindings for hisilicon hi655x MFD PMIC chip.
>>>
>>> Signed-off-by: Chen Feng
>>> Signed-off-by: Fei Wang
>>> Signed-off-by:
Hi Guodong,
On 19/02/2016 19:58, Guodong Xu wrote:
> As of V4, this patchset has been ack'ed by Rob Herring.
>
> V5, added pmx0 pmx1 pmx2 nodes description into hi6220.dtsi.
>
> Zhong Kaihua (3):
> arm64: dts: Add Hi6220 gpio configuration nodes
> arm64: dts: add Hi6220 pinctrl configuration
Hi Guodong,
On 19/02/2016 13:19, Guodong Xu wrote:
> This patchset include more dts changes for hi6220 SoC and HiKey board.
>
> Patch 1 adds pinctrl to uart ports in SoC and enables them for HiKey board.
> Patch 2 adds gpio LEDs device nodes.
> Patch 3 adds dwmmc nodes description for hi6220. It
On 5/13/2015 11:28 AM, Bintian wrote:
> Hello Wei,
>
>>To be more specific here, I expect the patches to be picked up by Wei >Xu
>>and forwarded to a...@kernel.org when he's made sure that everybody
>>including himself is happy with the outcome.
>>
>
s.devicetree/144335/focus=134022
> Acked-by: Rob Herring
>
> Patch 10 and 11 are from hi6220 mailbox support. It has been reviewed and
> ack'ed in maillist.
> [PATCH v7 RESEND 0/4] mailbox: hisilicon: add Hi6220 mailbox driver
> http://thread.gmane.org/gmane.linux.kernel/21
Hi Guodong,
On 11/03/2016 00:09, Guodong Xu wrote:
> This patch enables a number of devices currently supported by the Hi6220
> and 96boards HiKey. These include
> a) Hi655x PMIC and regulator
> b) Hi6220 I2C, USB, MMC, mailbox, and reset
> c) CONFIG_PINCTRL_SINGLE, and CONFIG_LEDS_GPIO
>
> Also
Hi Arnd,
On 25/04/2016 14:13, Arnd Bergmann wrote:
> DEBUG_HI3716_UART was supposed to be renamed to DEBUG_HIX5HD2_UART, but
> accidentally both got left in place, which results in a build error when
> CONFIG_DEBUG_UART_PHYS is not set as it should be.
>
> This removes the old symbol.
>
> Signed
Hi Guodong,
On 02/04/2016 12:47, Guodong Xu wrote:
> This patch enables a number of devices currently supported by the Hi6220
> and 96boards HiKey. These include
> a) Hi655x PMIC and regulator
> b) Hi6220 I2C, USB, MMC, mailbox, and hisi-reset
> c) CONFIG_PINCTRL_SINGLE, and CONFIG_LEDS_GPIO
> d)
Hi Arnd,
On 26/04/2016 12:01, Arnd Bergmann wrote:
> On Tuesday 26 April 2016 09:30:43 Wei Xu wrote:
>> Hi Arnd,
>>
>> On 25/04/2016 14:13, Arnd Bergmann wrote:
>>> DEBUG_HI3716_UART was supposed to be renamed to DEBUG_HIX5HD2_UART, but
>>> accidentally bot
Hi Leo,
On 30/03/2016 03:53, Leo Yan wrote:
> On Tue, Mar 29, 2016 at 08:45:59AM -0700, Eduardo Valentin wrote:
>> On Tue, Mar 29, 2016 at 07:27:11PM +0800, Leo Yan wrote:
>>> Hi6220 has octa-core so it has quite high power consumption when run
>>> benchmark and introduces high temperature for SoC
On 10/8/2015 10:18 AM, Jiri Pirko wrote:
> Thu, Oct 08, 2015 at 11:04:48AM CEST, l...@intel.com wrote:
>> Hi Vivien,
>>
>> [auto build test ERROR on net-next/master -- if it's inappropriate base,
>> please ignore]
>>
>> config: arm64-allyesconfig (attached as .config)
>> reproduce:
>>wge
Replace console with stdout-path so that we don't have to put the
console on the kernel command line.
Remove earlyprintk to allow the kernel to boot on a system even
if DEBUG_LL is configured for another system.
Signed-off-by: Wei Xu
Tested-by: Zhangfei Gao
---
arch/arm/boot/dts/hi3620-h
Hi John,
On 2019/7/30 21:29, John Garry wrote:
As reported in [1], the hisi-lpc driver has certain issues in handling
logical PIO regions, specifically unregistering regions.
This series add a method to unregister a logical PIO region, and fixes up
the driver to use them.
RCU usage in logical
Hi ARM-SoC team,
Please consider to pull the following fixes.
Thanks!
Best Regards,
Wei
---
The following changes since commit 5f9e832c137075045d15cd6899ab0505cfb2ca4b:
Linus 5.3-rc1 (2019-07-21 14:05:38 -0700)
are available in the Git repository at:
git://github.com/hisilicon/linux-his
ly.
Thanks to review!
I just sent out the v2 based on that.
On Mon, Aug 12, 2019 at 1:28 PM Wei Xu wrote:
Invoke acpi_gpiochip_request_interrupts after the acpi data has been
attached to the pl061 acpi node to register interruption.
Makes sense.
Fixes: 04ce935c6b2a ("gpio: pl061: Pass
kernel memory: 1344K
[8.480677] Run /init as init process
[9.767007] random: sshd: uninitialized urandom read (32 bytes read)
estuary:/$
Fixes: 04ce935c6b2a ("gpio: pl061: Pass irqchip when adding gpiochip")
Signed-off-by: Wei Xu
---
v1- > v2:
* reb
Hi Andy,
Thanks!
On 2019/8/16 21:40, Andy Shevchenko wrote:
On Fri, Aug 16, 2019 at 12:07 PM Wei Xu wrote:
Invoke acpi_gpiochip_request_interrupts after the acpi data has been
attached to the pl061 acpi node to register interruption.
Otherwise it will be failed to register interruption for
ent
Fixes: 04ce935c6b2a ("gpio: pl061: Pass irqchip when adding gpiochip")
Signed-off-by: Wei Xu
---
v2 -> v3:
* addressed the comments of Andy to show only affected output of
/proc/interrupts and drop the whole log of v5.2.0-rc7
v1- > v2:
* rebased on
https://git.kernel.org/pub/scm/lin
Hi Linus,
On 2019/8/20 16:01, Linus Walleij wrote:
On Mon, Aug 19, 2019 at 3:29 PM Wei Xu wrote:
Invoke acpi_gpiochip_request_interrupts after the acpi data has been
attached to the pl061 acpi node to register interruption.
Otherwise it will be failed to register interruption for the ACPI
Hi John,
On 1/3/2019 11:57 AM, John Garry wrote:
> Currently for ACPI-based FW we fail the probe for an unrecognised child
> HID.
>
> However, there is FW in the field with LPC child devices having fake HIDs,
> namely "IPI0002", which was an IPMI device invented to support the
> initial out-of-tr
Hi Jan,
On 1/24/2019 7:52 AM, Jan Kiszka wrote:
> From: Jan Kiszka
>
> Somewhere along recent changes to power control of the wl1835, power-on
> became very unreliable on the hikey, failing like this:
>
> wl1271_sdio: probe of mmc2:0001:1 failed with error -16
> wl1271_sdio: probe of mmc2:0001:
ression").
>
> This change appears to cause controller resets and block read failures
> which prevents successful booting on some hikey boards.
>
> Cc: Ryan Grachek
> Cc: Wei Xu
> Cc: Manivannan Sadhasivam
> Cc: Rob Herring
> Cc: Mark Rutland
>
Hi John,
On 1/23/2019 8:30 PM, John Stultz wrote:
> Add dma0 references for bluetooth uart to enable dma
> for bt transfers.
>
> Cc: Manivannan Sadhasivam
> Cc: Ryan Grachek
> Cc: Wei Xu
> Cc: Rob Herring
> Cc: Mark Rutland
> Cc: linux-arm-ker...@lists.
Hi Vincent,
On 1/14/2019 8:24 AM, Vincent Guittot wrote:
> The SDcard detection of hikey960 is active low so cd-inverted is wrong.
> Instead of adding cd-inverted, we should better set correctly cd-gpios
> to use GPIO_ACTIVE_LOW.
>
> Signed-off-by: Vincent Guittot
Updated the subject as Leo sug
Hi Ulf,
On 2/4/2019 6:06 AM, Ulf Hansson wrote:
> On Fri, 1 Feb 2019 at 17:34, Wei Xu wrote:
>>
>> Hi Jan,
>>
>> On 1/24/2019 7:52 AM, Jan Kiszka wrote:
>>> From: Jan Kiszka
>>>
>>> Somewhere along recent changes to power control of the wl
broadcast interrupts
IPI5: 0 IRQ work interrupts
IPI6: 0 CPU wake-up interrupts
Err: 0
Fixes: 04ce935c6b2a ("gpio: pl061: Pass irqchip when adding gpiochip")
Signed-off-by: Wei Xu
---
drivers/gpio/gpio-pl061.c | 7 +++
1 file changed, 7 inserti
el and
> static replicator, so can dismiss warning during initialisation.
>
> Cc: Wei Xu
> Cc: Guodong Xu
> Cc: Zhangfei Gao
> Cc: Haojian Zhuang
> Cc: Mathieu Poirier
> Cc: Suzuki K Poulose
> Signed-off-by: Leo Yan
Applied to the hisilicon dt tree.
Thanks!
Best Regards,
Wei
el and
> static replicator, so can dismiss warning during initialisation.
>
> Cc: Wei Xu
> Cc: Guodong Xu
> Cc: Zhangfei Gao
> Cc: Haojian Zhuang
> Cc: Mathieu Poirier
> Cc: Suzuki K Poulose
> Signed-off-by: Leo Yan
Applied to the hisilicon dt tree.
Thanks!
Best Regards,
Wei
Hi Leo, Wanglai
On 5/16/2019 5:11 AM, Leo Yan wrote:
> On Sat, Apr 20, 2019 at 10:00:35PM +0800, Wanglai Shi wrote:
>> This patch adds DT bindings for the CoreSight trace components
>> on hi3660, which is used by 96boards Hikey960.
>>
>> Signed-off-by: Wanglai Shi
>
> Hi Wei,
>
> Mathieu and me
Hi Lubomir,
On 6/11/2019 8:20 AM, Lubomir Rintel wrote:
> The original license text had a typo ("publishhed") which would be
> likely to confuse automated licensing auditing tools. Let's just switch
> to SPDX instead of fixing the wording.
>
> Signed-off-by: Lubomir Rintel
Thanks!
I found linux
Hi Lubomir,
On 6/11/2019 8:29 AM, Lubomir Rintel wrote:
> The original license text had a typo ("publishhed") which would be
> likely to confuse automated licensing auditing tools. Let's just switch
> to SPDX instead of fixing the wording.
>
> Signed-off-by: Lubomir Rintel
Thanks!
I found linux
Hi John,
On 6/24/2019 3:35 PM, John Garry wrote:
> As reported in [1], the hisi-lpc driver has certain issues in handling
> logical PIO regions, specifically unregistering regions.
>
> This series add a method to unregister a logical PIO region, and fixes up
> the driver to use them.
>
> RCU usa
Hi ARM-SoC team,
Please consider to pull the following changes.
Thanks!
Best Regards,
Wei
---
The following changes since commit a188339ca5a396acc588e5851ed7e19f66b0ebd9:
Linux 5.2-rc1 (2019-05-19 15:47:09 -0700)
are available in the Git repository at:
git://github.com/hisilicon/linux-hi
Hi ARM-SoC team,
Sorry, I forgot to mention that one or two patches in this patch set
are not pure fix.
We are also OK to queue for v5.3.
Thanks!
Best Regards,
Wei
On 6/25/2019 11:23 AM, Wei Xu wrote:
> Hi ARM-SoC team,
>
> Please consider to pull the following changes.
> Thank
Hi Olof,
On 2019/6/27 10:19, Olof Johansson wrote:
On Tue, Jun 25, 2019 at 02:31:26PM +0100, John Garry wrote:
On 25/06/2019 14:03, Olof Johansson wrote:
are available in the Git repository at:
git://github.com/hisilicon/linux-hisi.git tags/hisi-fixes-for-5.2
for you to fetch changes up t
Hi Manivannan,
On 2018/8/10 18:53, Manivannan Sadhasivam wrote:
> This patchset adds support for Hi3670 SoC and HiKey970 board. Hi3670 SoC
> is very similar to the Hi3660 SoC with additional NPU support. For now,
> only UART6 has been enabled which is configured by the bootloader for
> console sup
Hi Suzuki,
On 2018/9/12 14:53, Suzuki K Poulose wrote:
> Switch to the new the hardware port bindings.
>
> Cc: Wei Xu
> Cc: Mathieu Poirier
> Signed-off-by: Suzuki K Poulose
Thanks!
Applied to the hisilicon dt tree.
Best Regards,
Wei
> ---
> arch/arm/boot
Hi Suzuki,
On 2018/9/12 14:53, Suzuki K Poulose wrote:
> Switch to updated coresight bindings for hw ports.
>
> Cc: xuw...@hisilicon.com
> Cc: lipengche...@huawei.com
> Cc: Mathieu Poirier
> Tested-by: Leo Yan
> Signed-off-by: Suzuki K Poulose
Thanks!
Applied to the hisilicon dt tree.
Best R
On Wed, May 16, 2018 at 08:32:13PM +0800, Jason Wang wrote:
> Hi all:
>
> This RFC implement packed ring layout. The code were tested with
> Tiwei's RFC V3 ahttps://lkml.org/lkml/2018/4/25/34. Some fixups and
> tweaks were needed on top of Tiwei's code to make it run for event
> index.
Could you
Hi John,
On 2018/5/18 23:59, John Stultz wrote:
> The last few months have been busy and I've not been ontop of my
> upstream testing as well as I'd like, but today I did manage to chase
> down an issue I've been seeing since 4.17-rc1 on the HiKey board,
> which was causing emmc corruption and sto
On Mon, May 21, 2018 at 10:33:30AM +0800, Jason Wang wrote:
>
>
> On 2018年05月21日 00:25, Wei Xu wrote:
> >On Wed, May 16, 2018 at 08:32:13PM +0800, Jason Wang wrote:
> >>Hi all:
> >>
> >>This RFC implement packed ring layout. The code were tested with
Hi Leo, YiPing,
On 2018/2/28 5:06, Leo Yan wrote:
> Hi Wei,
>
> On Fri, Nov 17, 2017 at 05:27:32PM +0800, Xu YiPing wrote:
>> From: Kaihua Zhong
>>
>> Add DT binding for Hi3660 stub clock driver.
>>
>> Reviewed-by: Leo Yan
>> Signed-off-by: Kai Zhao
>> Signed-off-by: Tao Wang
>> Signed-off-by
Hi Leo,
On 2018/2/28 5:08, Leo Yan wrote:
> Hi Wei,
>
> On Tue, Jan 09, 2018 at 12:32:42PM +0800, Leo Yan wrote:
>> Thanks a lot for Vincent Guittot careful work to find bug for 'CPU_NAP'
>> idle state. At early time, the CPU CA73 CPU_NAP idle state has been
>> supported on Hikey960. Later we f
Hi Huazhong,
On 2018/1/18 12:31, Huazhong Tan wrote:
> Add cpld-syscon node to support the cpld control for hns-dsaf
> on the hip07 SoC.
>
> Signed-off-by: Huazhong Tan
> ---
Applied into hisilicon dt tree.
Thanks!
BR,
Wei
> arch/arm64/boot/dts/hisilicon/hip07.dtsi | 8
> 1 file cha
Hi Ryan,
On 2018/1/17 20:35, oscardagrach wrote:
> According to the hi6220 datasheet, the MMC controller is JEDEC eMMC 4.5
> compliant, in addition to supporting a clock of up to 150MHz. The Hikey
> schematic also indicates the device utilizes 1.8v signaling. Define these
> parameters in the devic
Hi Viresh,
On 2018/2/9 8:58, Viresh Kumar wrote:
> The "cooling-min-level" and "cooling-max-level" properties are not
> parsed by any part of the kernel currently and the max cooling state of
> a CPU cooling device is found by referring to the cpufreq table instead.
>
> Moreover, the entries are
Hi Leo, Dmitry,
On 2018/3/1 12:18, Leo Yan wrote:
> From: Dmitry Shmidt
>
> This patch is to add watchdog binding for Hi6220 on Hikey board.
>
> Signed-off-by: Dmitry Shmidt
> ---
Applied into hisilicon dt tree.
Thanks!
BR,
Wei
> arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 8
> 1
Add a new lightnvm quirk to identify CNEX’s Granby controller.
Signed-off-by: Wei Xu
---
drivers/nvme/host/pci.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index cb73bc8..9419e88 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme
Add a new lightnvm quirk to identify CNEX’s Granby controller.
Signed-off-by: Wei Xu
---
drivers/nvme/host/pci.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index cb73bc8..9419e88 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme
Hi Leo,
On 2018/3/15 16:07, Leo Yan wrote:
> From: Kaihua Zhong
>
> Add DT binding for mailbox driver.
>
> Signed-off-by: Ruyi Wang
> Signed-off-by: Kaihua Zhong
Fine to me. Thanks!
Acked-by: Wei Xu
Best Regards,
Wei
> ---
> arch/arm64/boot/dts/hisilicon/hi366
ch set
https://patchwork.kernel.org/patch/9474751/
[2] Lorenzo's v2 iort_node_get_id fix patch
https://patchwork.kernel.org/patch/9507041/
The branch is at https://github.com/hisilicon/linux-hisi/tree/topic-acpi-mbigen.
The integrated XGE, SAS and PCIe controller works fine.
So with this patch set:
Tested-by: Wei Xu
Thanks!
Best Regards,
Wei
Hi Chen Feng,
On 2017/1/24 8:57, Chen Feng wrote:
> Add binding for hisilicon Hi3660 SoC and HiKey960 Board.
>
> Signed-off-by: Chen Feng
> Acked-by: Rob Herring
Applied all to the hisilicon soc tree.
Thanks!
Best Regards,
Wei
> ---
> Documentation/devicetree/bindings/arm/hisilicon/hisilico
Hi Chen Feng,
On 2017/1/10 7:55, Chen Feng wrote:
> Add binding for hisilicon Hi3660 SoC and HiKey960 Board.
>
> Signed-off-by: Chen Feng
> Acked-by: Rob Herring
> ---
Applied both to the hisilicon SoC tree
with minimal changes about the format.
Thanks!
Best Regards,
Wei
> Documentation/dev
Hi Jens,
On 2017/1/18 12:58, Jens Wiklander wrote:
> From: Jerome Forissier
>
> Signed-off-by: Jerome Forissier
> Signed-off-by: Jens Wiklander
Thanks!
Fine to me.
Acked-by: Wei Xu
Best Regards,
Wei
> ---
> arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 7 +++
&g
Hi Pan Wen,
On 2016/10/17 13:07, Pan Wen wrote:
> Add dts files for Hi3516CV300 demo board.
>
> Signed-off-by: Pan Wen
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/hi3516cv300-demb.dts | 148
> arch/arm/boot/dts/hi3516cv300.dtsi | 397
> +
Hi Wang Xiaoyin,
On 2017/1/18 10:04, Wang Xiaoyin wrote:
> This patch adds pinctrl dtsi file
>
> Signed-off-by: Wang Xiaoyin
> ---
> arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 3 +-
> .../arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi | 292
> +
> 2 files change
Hi Mark,
On 2017/1/23 13:46, Mark Rutland wrote:
> On Tue, Jan 10, 2017 at 03:55:15PM +0800, Chen Feng wrote:
>> +memory@0 {
>> +device_type = "memory";
>> +reg = <0x0 0x0040 0x0 0xbfe0>;
>> +};
>
> The unit-address here is incorrect. The base address of th
.
>
> The question this raises is why that clock was missed the first time
> around. I'd suggest whoever owns the clock driver can go through the
> documentation again and look for others that may have been missed,
> then send a patch to the driver to add *all* the missing ones for the
> merge window, and one release later we add the driver depending on
> previously unknown clocks.
I have picked this patch based on the clk-hi6220-rtc which is based on
4.7-rc1 and am planning to send out the pull request which will distinguish
the clk commits and dts commits.
So should I continue to send out the pull request?
Thanks!
Best Regards,
Wei Xu
>
> Arnd
>
> .
>
On 25/07/2016 13:29, Amit Kucheria wrote:
> On Thu, Jul 7, 2016 at 12:13 PM, Amit Kucheria
> wrote:
>> On Sun, Jun 26, 2016 at 10:02 PM, Amit Kucheria
>> wrote:
>>> On Mon, Jun 20, 2016 at 6:46 PM, Leo Yan wrote:
Hi Amit,
On Mon, Jun 20, 2016 at 05:46:36PM +0530, Amit Kucheria
Hi Pan,
On 2016/11/16 8:56, wenpan wrote:
> Hi Marty，
> Does this confict with your patch？ If not，I hope this could be merged first.
> Besides could you tell me the link to your related patch?
This is the link: https://patchwork.kernel.org/patch/9334743/
BR,
Wei
>
> Thanks,
> Pan
>
> On 201
Hi John,
On 2016/11/7 16:44, John Garry wrote:
> This patchset resolves some hip06 SAS device tree issues.
>
Series applied to the hisilicon soc tree.
Thanks!
Best Regards,
Wei
> John Garry (3):
> arm64: dts: hisi: fix hip06 sas am-max-trans quirk
> arm64: dts: hisi: disable sas0 and sas2 f
Hi Kefeng,
On 2016/9/24 10:14, Kefeng Wang wrote:
> This patch adds documentation for the devicetree bindings used by
> the DT files of Hisilicon Hip07 D05 board.
>
> Signed-off-by: Kefeng Wang
> ---
Applied to the hisilicon soc tree.
Thanks!
Best Regards,
Wei
> Documentation/devicetree/bind
Hi Kefeng,
On 2016/9/24 10:14, Kefeng Wang wrote:
> The ohci/ehci hardware pin number should be 640/641, correct them.
>
> Fixes: commit aa8d3e74f54d ("arm64: dts: Add initial dts for Hisilicon Hip06
> D03 board")
> Signed-off-by: Kefeng Wang
> ---
Applied to the hisilicon soc tree.
Thanks!
B
Hi Kefeng,
On 2016/9/24 10:14, Kefeng Wang wrote:
> Adding initial dt file for Hip07 D05 board, it is with dual socket
> and each socket has two SCCLs(supper cpu cluster), one SCCL contains
> four clusters and each cluster has quard Cortex-A72.
>
> Since each SCCL has their own DDR controller, it
Hi Guodong,
On 25/08/2016 04:00, Guodong Xu wrote:
> To support display in Debian on HiKey, cma heap is used to allocate
> graphic buffers. The default size of CMA is 16 MB which is not enough.
>
> Increase the default CMA size to 128 MB.
>
> cc: Fathi Boudra
> cc: John Stultz
> cc: Xinliang L
Hi Jorge,
On 08/07/2016 09:11, Jorge Ramirez-Ortiz wrote:
> Enable support for higher baud rates (up to 3Mbps) in UART1 - required
> for bluetooth transfers.
>
> Signed-off-by: Jorge Ramirez-Ortiz
> Tested-by: Jorge Ramirez-Ortiz
Fine to me.
Thanks!
Acked-by: Wei Xu
Be
On 19/08/2016 07:57, Jorge Ramirez wrote:
> On 07/11/2016 11:53 AM, Wei Xu wrote:
>> Hi Jorge,
>>
>> On 08/07/2016 09:11, Jorge Ramirez-Ortiz wrote:
>>> Enable support for higher baud rates (up to 3Mbps) in UART1 - required
>>> for bluetooth transfers.
>
Hi Jiancheng,
On 15/06/2016 03:19, Jiancheng Xue wrote:
> These three patches are abstracted from the patchset titled
> "[RESEND PATCH v10 0/6] ARM: hisi: Add initial support including
> clock driver for Hi3519 soc."(https://lkml.org/lkml/2016/3/31/175).
> The clock driver part was merged in v4.7-
Hi John,
On 23/06/2016 21:39, John Stultz wrote:
> From: Zhangfei Gao
>
> Add pl031 rtc0 and rtc1 support to hi6220 dtsi
>
> Cc: Michael Turquette
> Cc: Stephen Boyd
> Cc: Rob Herring
> Cc: Pawel Moll
> Cc: Wei Xu
> Cc: Guodong Xu
> Signed-off-by: Zhangfe
atch and make it avilable via the branch for
> Wei, or just take both patches?
>
> thanks
> -john
>
> Cc: Michael Turquette
> Cc: Stephen Boyd
> Cc: Rob Herring
> Cc: Pawel Moll
> Cc: Wei Xu
> Cc: Guodong Xu
> Cc: Zhangfei Gao
>
>
> Zhang
ply these patches. I'd like to take patches 1, 2, and 3 through
>> the clk tree though.
>
> Thanks, you could take first three patches. For patch 4, i will
> re-send it after mailbox driver's patches have been merged.
Hi Leo,
> Wei Xu, is this okay for you?
OK :)
Best
Hi Zhen Lei,
On 2020/9/29 22:14, Zhen Lei wrote:
> From: Kefeng Wang
>
> Enable support for the Hisilicon SD5203 SoC. The core is ARM926EJ-S.
>
> Signed-off-by: Kefeng Wang
> Signed-off-by: Zhen Lei
Thanks!
Applied to the hisilicon arm32 SoC tree.
Best Regards,
Wei
> ---
> arch/arm/mach-h
Hi Zhen Lei,
On 2020/9/29 22:14, Zhen Lei wrote:
> From: Kefeng Wang
>
> Add support of early console for SD5203.
>
> Signed-off-by: Kefeng Wang
> Signed-off-by: Zhen Lei
Thanks!
Applied to the hisilicon arm32 SoC tree.
Best Regards,
Wei
> ---
> arch/arm/Kconfig.debug | 11 ++-
>
Hi Zhen Lei,
On 2020/9/29 22:14, Zhen Lei wrote:
> From: Kefeng Wang
>
> Add sd5203.dts for Hisilicon SD5203 SoC platform.
>
> Signed-off-by: Kefeng Wang
> Signed-off-by: Zhen Lei
Thanks!
Applied to the hisilicon arm32 dt tree.
Best Regards,
Wei
> ---
> arch/arm/boot/dts/Makefile | 2 +
Hi Zhen Lei,
On 2020/9/29 22:14, Zhen Lei wrote:
> The DT binding for Hisilicon system controllers requires to have a
> "syscon" compatible string.
>
> Signed-off-by: Zhen Lei
Thanks!
Applied to the hisilicon arm32 dt tree.
Best Regards,
Wei
> ---
> arch/arm/boot/dts/hi3620.dtsi | 2 +-
> ar
vicetree/bindings/arm/hisilicon/hisilicon.yaml
> b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml
> new file mode 100644
> index 00000000000..362decf3b85c6fb
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml
> @@ -0,0 +1,77 @@
&
Hi Zhen Lei,
On 2020/9/27 14:21, Zhen Lei wrote:
> Split the devicetree bindings of each Hisilicon controller from
> hisilicon.txt into a separate file, the file name is the compatible name
> attach the .txt file name extension.
>
> All Hi6220 dedicated controllers are grouped into subdirectory
Hi John,
On 2020/3/28 0:06, John Garry wrote:
> Since commits a7851aa54c0c ("io: change outX() to have their own IO
> barrier overrides") and 87fe2d543f81 ("io: change inX() to have their own
> IO barrier overrides"), the outX() and inX() functions have memory
> barriers which can be overridden pe
Use PTR_ERR_OR_ZERO to make the code a little bit simpler.
This code was detected with the help of Coccinelle.
Signed-off-by: Wei Xu
---
drivers/pci/controller/dwc/pci-exynos.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-exynos.c
b
Replace GFP_KERNEL with GFP_ATOMIC while resync_post_get_progress_params
is invoked in a spinlock context.
This code was detected with the help of Coccinelle.
Signed-off-by: Wei Xu
---
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
Hi All,
Sorry for the noise and please ignore it!
I found a nearly same patch has been sent out 2 days before.
Best Regards,
Wei
On 2020/9/3 19:45, Wei Xu wrote:
> Replace GFP_KERNEL with GFP_ATOMIC while resync_post_get_progress_params
> is invoked in a spinlock context.
> This
Hi All,
Sorry for the noise and please ignore it.
I found these kind of changes have been sent and rejected before.
Best Regards,
Wei
On 2020/9/3 17:05, Wei Xu wrote:
> Use PTR_ERR_OR_ZERO to make the code a little bit simpler.
> This code was detected with the help of Coccinelle.
>
‘smsc911x_eeprom_write_location’:
drivers/net/ethernet/smsc/smsc911x.c:2058:6: warning: variable ‘temp’ set but
not used [-Wunused-but-set-variable]
Signed-off-by: Wei Xu
---
drivers/net/ethernet/smsc/smsc911x.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers
ort to function in gadget mode (unfortunately not in host, as
> the hub/mux functionality is needed to enable vbus output to
> power devices in host mode).
>
> This is based on an old patch originally by Yu Chen.
>
> Cc: Yu Chen
> Cc: Chunfeng Yun
> Cc: Wei Xu
> C
Hi Krzysztof
On 2020/6/29 16:16, Krzysztof Kozlowski wrote:
> When overriding nodes, usage of phandles instead of full paths reduces
> possible mistakes (e.g. in duplicated unit address) and removes
> duplicate data. The UART nodes were extended via full path and phandle
> which makes it difficu
Hi Krzysztof,
On 2020/6/26 16:06, Krzysztof Kozlowski wrote:
> Fix dtschema validator warnings like:
> l2-cache: $nodename:0: 'l2-cache' does not match
> '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
>
> Signed-off-by: Krzysztof Kozlowski
Thanks!
Applied to the hisilicon arm32 dt tree.
Best Re
Use the ARRAY_SIZE macro to calculate the size of an array.
This code was detected with the help of Coccinelle.
Signed-off-by: Wei Xu
---
drivers/net/ethernet/intel/i40e/i40e_adminq.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/intel/i40e
Use the ARRAY_SIZE macro to calculate the size of an array.
This code was detected with the help of Coccinelle.
Signed-off-by: Wei Xu
---
drivers/net/ethernet/intel/iavf/iavf_adminq.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/intel/iavf
Hi Zhen,
On 2020/9/3 20:27, Zhen Lei wrote:
> From: Kefeng Wang
>
> Add sd5203.dts for Hisilicon SD5203 SoC platform.
>
> Signed-off-by: Kefeng Wang
> Signed-off-by: Zhen Lei
> ---
> arch/arm/boot/dts/Makefile | 2 +
> arch/arm/boot/dts/sd5203.dts | 90
The uninitialized ret in hisi_hikey_usb_parse_kirin970 is useless.
Simply remove it and return 0 on success to fix the issue reported
by Coverity Scan.
Fixes: d210a0023590 ("misc: hisi_hikey_usb: add support for Hikey 970")
Signed-off-by: Wei Xu
---
drivers/misc/hisi_hikey_usb.c | 3 +
On 2020/9/7 20:18, Andre Przywara wrote:
> The SP805 DT binding requires two clocks to be specified, but
> Hisilicon platform DTs currently only specify one clock.
>
> In practice, Linux would pick a clock named "apb_pclk" for the bus
> clock, and the Linux and U-Boot SP805 driver would use the
Hi Andre,
On 2020/9/7 20:18, Andre Przywara wrote:
> The SP804 binding only specifies one or three clocks, but does not allow
> just two clocks.
> The HiSi 3620 .dtsi specified two clocks for the two timers, plus gave
> one "apb_pclk" clock-name to appease the primecell bus driver.
>
> Extend the
Hi Andre,
On 2020/9/7 20:18, Andre Przywara wrote:
> The SP805 DT binding requires two clocks to be specified, but
> Hisilicon platform DTs currently only specify one clock.
>
> In practice, Linux would pick a clock named "apb_pclk" for the bus
> clock, and the Linux and U-Boot SP805 driver would
Hi Manivannan,
On 2/15/2019 5:49 AM, Manivannan Sadhasivam wrote:
> Hello,
>
> This patchset adds Reset controller support for HiSilicon HI3670 SoC.
> HI3670 SoC is architecturally same as HI3660 SoC, hence the same driver
> is reused.
>
> This patchset has been tested on HiKey970 board.
>
> Th
Hi Manivannan,
On 2/28/2019 3:45 PM, Manivannan Sadhasivam wrote:
> Hello,
>
> This patchset adds MMC controller support for HI3670 SoC. Since HI3670
> SoC is architecturally same as the HI3660 SoC, HI3660 DWMMC driver is
> reused here with DT compatible fallback approach. Also, SD and WiFi
> sup
hn
>
> Cc: Tanglei Han
> Cc: Zhuangluan Su
> Cc: Ryan Grachek
> Cc: Manivannan Sadhasivam
> Cc: Wei Xu
> Cc: Rob Herring
> Cc: Mark Rutland
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: devicet...@vger.kernel.org
>
>
> John Stultz (2):
>
stuary:/$ lspci -mk
30:00.0 "Class 0604" "19e5" "1610" "" "0000" "pcieport"
91:00.0 "Class 0300" "19e5" "1711" "" ""
90:00.0 "Class 0604" "19e5
;> suggest we drop the ITS change from this patch entirely, and I instead
>>>> queue this patch:
>>>>
>>>> https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/commit/?h=irq/irqchip-4.12&id=e6db07d0f3b6da1f8cfd485776bfefa4fcdbfc45
>>&g
Hi Daniel,
On 2017/3/16 22:03, Daniel Lezcano wrote:
The MMC hosts could be left in an unconsistent or uninitialized state from
the firmware. Instead of assuming, the firmware did the right things, let's
reset the host controllers.
This change fixes a bug when the mmc2/sdio is initialized leadi
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