ble pstore support on HiKey.
>>>
>>> Cc: Kees Cook
>>> Cc: Guodong Xu
>>> Cc: Haojian Zhuang
>>> Cc: Wei Xu
>>> Cc: Rob Herring
>>> Cc: Mark Rutland
>>> Cc: Catalin Marinas
>>> Cc: Will Deacon
>>> Cc: linux-
Hi Guodong,
On 31/08/2016 14:10, Guodong Xu wrote:
> With these properties added, sd cards inserted into hikey can work at UHS
> mode if they have such capability.
>
> Note, this depends on HiKey UHS-SD support patch [1] to work properly.
> If you didn't add this patch, but added sd-uhs- properti
Hi John,
On 22/08/2016 23:45, John Stultz wrote:
> Things won't work if PINCTRL isn't enabled,
> so make sure to explicitly set it rather
> then betting that we have some other platform
> configed in which selects it.
>
> Cc: Arnd Bergmann
> Cc: Wei Xu
> Cc:
Hi Guodong,
On 24/08/2016 03:42, Guodong Xu wrote:
> Enable various configs for HiKey, including:
> 1. HiSilicon Kirin DRM
> 2. ADV7533
> 3. HiSi Powerkey
> 4. Bluetooth
>
Series applied to the hisilicon soc tree.
Thanks!
Best Regards,
Wei
> v2:
> - Removed CMA size 128M change. Leave that in
Hi John,
On 22/08/2016 23:48, John Stultz wrote:
> From: Xinliang Liu
>
> Add ade and dsi DT nodes for hikey board.
>
> Cc: Guodong Xu
> Cc: Wei Xu
> Cc: Rob Herring
> Cc: Mark Rutland
> Cc: Catalin Marinas
> Cc: Will Deacon
> Cc: linux-arm-ker...@
Hi Jorge,
On 08/07/2016 09:11, Jorge Ramirez-Ortiz wrote:
> Enable support for higher baud rates (up to 3Mbps) in UART1 - required
> for bluetooth transfers.
>
> Signed-off-by: Jorge Ramirez-Ortiz
> Tested-by: Jorge Ramirez-Ortiz
> ---
Applied to the hisi-dt-4.9 branch.
Thanks!
Best Regards,
Hi Yunzhi,
On 2017/8/7 10:33, Yunzhi Li wrote:
> Fix the rc vs. pc typo. There is no a register named rc, I felt
> confused when I read this assembler command in comment.
>
Thanks!
Yes, it is a typo.
And 0xe51ff004 is the machine code to do the jump.
I will change the commit msg as below and pick
Hi Uffe,
On 2017/6/20 9:36, Ulf Hansson wrote:
> Hi Wei,
>
> On 19 June 2017 at 15:00, Wei Xu wrote:
>> Hi Ulf,
>>
>> On 2017/6/19 13:43, Ulf Hansson wrote:
>>> On 14 June 2017 at 10:23, Guodong Xu wrote:
>>>> Add bindings for hi3660 mmc support
Hi Tao,
On 2017/6/20 4:40, Tao Wang wrote:
> This adds documentation of device tree bindings for the
> thermal sensor controller of hi3660 SoC.
>
> Signed-off-by: Tao Wang
> ---
> .../devicetree/bindings/thermal/hi3660-thermal.txt | 17 +
> 1 file changed, 17 insertions(+)
>
Hi Tao Wang,
On 2017/6/20 4:40, Tao Wang wrote:
> This patch adds the support for thermal sensor of Hi3660 SoC.
> this will register sensors for thermal framework and use device
> tree to bind cooling device.
>
> Signed-off-by: Tao Wang
> Signed-off-by: Leo Yan
> ---
> drivers/thermal/Kconfig
Hi Uffe,
On 2017/6/20 11:28, Ulf Hansson wrote:
> On 20 June 2017 at 11:59, Wei Xu wrote:
>> Hi Uffe,
>>
>> On 2017/6/20 9:36, Ulf Hansson wrote:
>>> Hi Wei,
>>>
>>> On 19 June 2017 at 15:00, Wei Xu wrote:
>>>> Hi Ulf,
>>>>
On 10/9/2015 7:26 PM, Arnd Bergmann wrote:
> On Friday 09 October 2015 17:10:36 Wei Xu wrote:
>> Replace console with stdout-path so that we don't have to put the
>> console on the kernel command line.
>>
>> Remove earlyprintk to allow the kernel to boot on
SoC DT updates for 4.4
- Drop console= and earlyprintk bootargs parameter in hisilicon armv7 dts
Wei Xu (1):
ARM: hisilicon: DT: Drop console= and earlyprintk bootargs parameter
arch/arm/boot/dts/hi3620-hi4511.dts | 3
On 10/14/2015 4:53 PM, Arnd Bergmann wrote:
> On Monday 12 October 2015 15:51:23 Wei Xu wrote:
>> Hi Arnd, Hi Olof, Hi Kevin,
>>
>> Please help to pull the following changes.
>> Thanks!
>
Hi Arnd,
> Pulled into next/dt, thanks!
Thanks!
Best Regards,
Wei
Hi All,
We have observed KVM guest sometimes failed to boot because of kernel stack
overflow if KPTI is enabled on a hisilicon arm64 platform.
We also tested with different kernel version and found it is only
happened if the KPTI and KVM(enable-kvm & cpu=host) are enabled on the
guest.
The det
Hi Will,
On 2018/6/20 22:42, Will Deacon wrote:
Hi Wei,
On Wed, Jun 20, 2018 at 10:18:00PM +0800, Wei Xu wrote:
We have observed KVM guest sometimes failed to boot because of kernel stack
overflow if KPTI is enabled on a hisilicon arm64 platform.
We also tested with different kernel version
Hi James,
On 2018/6/20 23:54, James Morse wrote:
Hi Wei,
On 20/06/18 16:52, Wei Xu wrote:
On 2018/6/20 22:42, Will Deacon wrote:
Hmm, I wonder if this is at all related to RAS, since we've just enabled
that and if we take a fault whilst rewriting swapper then we're going to
get s
Hi Will,
On 2018/6/21 0:28, Will Deacon wrote:
On Thu, Jun 21, 2018 at 12:25:05AM +0800, Wei Xu wrote:
Hi James,
On 2018/6/20 23:54, James Morse wrote:
Hi Wei,
On 20/06/18 16:52, Wei Xu wrote:
On 2018/6/20 22:42, Will Deacon wrote:
Hmm, I wonder if this is at all related to RAS, since
Hi James,
On 2018/6/21 9:38, James Morse wrote:
> Hi Will, Wei,
>
> On 20/06/18 17:25, Wei Xu wrote:
>> On 2018/6/20 23:54, James Morse wrote:
>> I have disabled CONFIG_ARM64_RAS_EXTN and reverted that commit.
>> But I still got the stack overflow issue sometime
Hi Will,
On 2018/6/21 10:18, Will Deacon wrote:
> On Thu, Jun 21, 2018 at 09:38:53AM +0100, James Morse wrote:
>> On 20/06/18 17:25, Wei Xu wrote:
>>> [0.042421] Insufficient stack space to handle exception!
>>> [0.042423] ESR: 0x9646 -- DABT (curren
Hi Will,
On 2018/6/21 11:54, Will Deacon wrote:
> Hi Wei,
>
> On Thu, Jun 21, 2018 at 11:14:28AM +0100, Wei Xu wrote:
>> On 2018/6/21 10:18, Will Deacon wrote:
>>> On Thu, Jun 21, 2018 at 09:38:53AM +0100, James Morse wrote:
>>>> On 20/06/18 17:25, W
Hi Will,
On 2018/6/22 17:23, Will Deacon wrote:
Hi Wei,
On Fri, Jun 22, 2018 at 09:33:04AM +0100, Wei Xu wrote:
On 2018/6/21 11:54, Will Deacon wrote:
On Thu, Jun 21, 2018 at 11:14:28AM +0100, Wei Xu wrote:
On 2018/6/21 10:18, Will Deacon wrote:
Wei -- does the diff below help at all? Make
Hi Will,
On 2018/6/22 19:16, Will Deacon wrote:
Hi Wei,
Thanks for giving that a spin.
On Fri, Jun 22, 2018 at 06:45:15PM +0800, Wei Xu wrote:
On 2018/6/22 17:23, Will Deacon wrote:
On Fri, Jun 22, 2018 at 09:33:04AM +0100, Wei Xu wrote:
On 2018/6/21 11:54, Will Deacon wrote:
On Thu, Jun
Hi Will,
On 2018/6/22 21:31, Will Deacon wrote:
Hi again, Wei,
On Fri, Jun 22, 2018 at 09:18:27PM +0800, Wei Xu wrote:
On 2018/6/22 19:16, Will Deacon wrote:
On Fri, Jun 22, 2018 at 06:45:15PM +0800, Wei Xu wrote:
On 2018/6/22 17:23, Will Deacon wrote:
Perhaps just writing back the table
Hi Will,
On 2018/6/22 22:43, Will Deacon wrote:
On Fri, Jun 22, 2018 at 09:46:53PM +0800, Wei Xu wrote:
On 2018/6/22 21:31, Will Deacon wrote:
On Fri, Jun 22, 2018 at 09:18:27PM +0800, Wei Xu wrote:
On 2018/6/22 19:16, Will Deacon wrote:
On Fri, Jun 22, 2018 at 06:45:15PM +0800, Wei Xu
Hi Mark,
On 2018/6/22 22:28, Mark Rutland wrote:
On Fri, Jun 22, 2018 at 09:18:27PM +0800, Wei Xu wrote:
[0.042462] Insufficient stack space to handle exception!
[0.042464] ESR: 0x9646 -- DABT (current EL)
[0.043781] FAR: 0x093a80e0
[0.044239
Hi Will, Mark,
On 2018/6/22 23:41, Will Deacon wrote:
On Fri, Jun 22, 2018 at 11:28:21PM +0800, Wei Xu wrote:
On 2018/6/22 22:28, Mark Rutland wrote:
On Fri, Jun 22, 2018 at 09:18:27PM +0800, Wei Xu wrote:
[0.227507] Mem abort info:
[0.230390] ESR = 0x9606
Hi Viresh,
On 2018/7/31 8:24, Viresh Kumar wrote:
> On 23-07-18, 08:36, Viresh Kumar wrote:
>> The clocks property should either be present for all the CPUs of a
>> cluster or none. If these are present only for a subset of CPUs of a
>> cluster then things will start falling apart as soon as the C
Hi Viresh,
On 2018/7/19 3:40, Viresh Kumar wrote:
> On 18-07-18, 16:34, Wei Xu wrote:
>> Hi Viresh,
>>
>> On 2018/7/5 6:09, Viresh Kumar wrote:
>>> Hi,
>>>
>>> This is an attempt to fix the broken or partially defined DT bindings
>>> for co
Shiju, there was a small problem with the second patch, which did not
> apply cleanly, but I fixed it up. It might have been easier to get a pull
> request through Wei Xu for this, and it would also help to send things
> a lot earlier rather than just before the merge window.
Than
Hi Li Wei,
On 2018/2/13 10:14, Li Wei wrote:
> arm64: dts: add ufs node for Hisilicon.
>
> Signed-off-by: Li Wei
Fine to me. Thanks!
Acked-by: Wei Xu
Best Regards,
Wei
> ---
> arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 19 +++
> 1 file changed, 19 inser
Hi John,
On 2018/1/30 13:22, John Garry wrote:
> For certain workloads the deadline IO scheduler offers
> particular advantages over other schedulers and has shown
> to perform better, so enable it.
>
> The default IO scheduler is unaffected by this change, and
> currently is CFQ.
>
> Signed-off
Hi Manivannan,
On 2018/9/21 7:01, Manivannan Sadhasivam wrote:
> Add clock nodes for HiSilicon Hi3670 SoC.
>
> Signed-off-by: Manivannan Sadhasivam
Applied to the hisilicon soc dt tree.
Thanks!
Best Regards,
Wei
> ---
> arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 43 +++
>
Hi Manivannan,
On 2018/9/21 7:01, Manivannan Sadhasivam wrote:
> Remove fixed clock and source SoC clock for UART6 for
> HiSilicon Hi3670 SoC.
>
> Signed-off-by: Manivannan Sadhasivam
Applied to the hisilicon soc dt tree.
Thanks!
Best Regards,
Wei
> ---
> arch/arm64/boot/dts/hisilicon/hi3670
Hi Manivannan,
On 2018/11/12 7:17, Manivannan Sadhasivam wrote:
> On Wed, Oct 31, 2018 at 10:43:00AM +0100, Linus Walleij wrote:
>> On Tue, Oct 23, 2018 at 9:07 PM Manivannan Sadhasivam
>> wrote:
>>
>>> This patchset adds Pinctrl and GPIO support for HI3670 SoC from HiSilicon
>>> found in the HiK
Hi Manivannan,
On 2018/10/31 13:38, Linus Walleij wrote:
> On Mon, Oct 29, 2018 at 10:43 AM Manivannan Sadhasivam
> wrote:
>
>> This patchset standardizes the onboard LEDs on 96Boards by maintaining
>> common labels and triggers as below:
>>
>> green:user1 default-trigger: heartbeat
>> green:us
Hi Viresh,
On 2018/11/16 10:04, Viresh Kumar wrote:
> The cooling device properties, like "#cooling-cells" and
> "dynamic-power-coefficient", should either be present for all the CPUs
> of a cluster or none. If these are present only for a subset of CPUs of
> a cluster then things will start falli
Hi Viresh,
On 2018/11/16 10:04, Viresh Kumar wrote:
> Each CPU can (and does) participate in cooling down the system but the
> DT only captures a handful of them, normally CPU0, in the cooling maps.
> Things work by chance currently as under normal circumstances its the
> first CPU of each cluster
Hi All,
On 2018/6/21 17:20, Wei Xu wrote:
Hi James,
On 2018/6/21 9:38, James Morse wrote:
Hi Will, Wei,
On 20/06/18 17:25, Wei Xu wrote:
On 2018/6/20 23:54, James Morse wrote:
I have disabled CONFIG_ARM64_RAS_EXTN and reverted that commit.
But I still got the stack overflow issue sometimes
Hi Will,
On 2018/6/26 18:47, Will Deacon wrote:
> Hi Wei,
>
> On Wed, Jun 27, 2018 at 01:16:44AM +0800, Wei Xu wrote:
>> Today I tried the kernel 4.18-rc2(defconfig, no change on top) with qemu
>> 2.12.0.
>> The guest sometimes still failed to boot. But the crash re
Hi James,
On 2018/6/27 9:39, James Morse wrote:
> Hi Wei,
>
> On 26/06/18 18:47, Will Deacon wrote:
>> On Wed, Jun 27, 2018 at 01:16:44AM +0800, Wei Xu wrote:
>>> [0.00] Booting Linux on physical CPU 0x00 [0x480fd010]
>>> [0.0
Hi Will,
On 2018/6/27 14:28, Will Deacon wrote:
> On Wed, Jun 27, 2018 at 02:22:03PM +0100, Wei Xu wrote:
>> On 2018/6/26 18:47, Will Deacon wrote:
>>> If you look at the __idmap_kpti_put_pgtable_ent_ng asm macro, can you try
>>> replacing:
>>>
>>>
Hi James,
On 2018/6/28 9:45, James Morse wrote:
> Hi Wei,
>
> On 27/06/18 14:26, Wei Xu wrote:
>> Sorry, I should highlight that I have only updated the default value
>> of CONFIG_NR_CPUS by menuconfig in the previous mail.
>> That is why it showed dirty.
>
>
Hi Will,
On 2018/6/27 14:28, Will Deacon wrote:
> On Wed, Jun 27, 2018 at 02:22:03PM +0100, Wei Xu wrote:
>> On 2018/6/26 18:47, Will Deacon wrote:
>>> If you look at the __idmap_kpti_put_pgtable_ent_ng asm macro, can you try
>>> replacing:
>>>
>>>
Hi Ryan,
On 2018/6/13 16:13, Ryan Grachek wrote:
> These properties are required for compatibility with runtime PM.
> Without these properties, MMC host controller will not be aware
> of power capabilities. When the wlcore driver attempts to power
> on the device, it will erroneously fail with -EA
Hi Ryan,
On 2018/6/13 19:03, Ryan Grachek wrote:
> These properties are required for compatibility with runtime PM.
> Without these properties, MMC host controller will not be aware
> of power capabilities. When the wlcore driver attempts to power
> on the device, it will erroneously fail with -EA
>
> And quite often this would result in a disk that wouldn't properly
> boot even with older kernels.
>
> It seems the max-frequency property added by the above patch is
> causing the problem, so remove it.
>
> Cc: Ryan Grachek
> Cc: Wei Xu
> Cc: Arnd Bergma
Hi Viresh,
On 2018/5/25 6:40, Viresh Kumar wrote:
> The cooling device properties, like "#cooling-cells" and
> "dynamic-power-coefficient", should either be present for all the CPUs
> of a cluster or none. If these are present only for a subset of CPUs of
> a cluster then things will start falling
Hi Viresh,
On 2018/5/26 19:00, Wei Xu wrote:
> Hi Viresh,
>
> On 2018/5/25 6:40, Viresh Kumar wrote:
>> The cooling device properties, like "#cooling-cells" and
>> "dynamic-power-coefficient", should either be present for all the CPUs
>> of a c
Hi John,
On 2018/4/30 16:15, John Garry wrote:
> This series introduces 3 patches, to enable the
> HISILICON_LPC config in the arm64 defconfig
> and also add the relevant LPC DT entries.
>
> For hip06 UART support, we depend on this patch:
> https://lkml.org/lkml/2018/4/27/258
>
> John Garry (3)
Hi John,
On 2018/5/9 15:48, John Garry wrote:
> On 08/05/2018 12:17, Andy Shevchenko wrote:
>> On Tue, 2018-05-08 at 18:27 +0800, John Garry wrote:
>>> This patchset adds ACPI FW support for the UART on
>>> the LPC bus on the Huawei D03 development board.
>>>
>>> It also drops MFD API usage. It's
Hi Leo,
On 2018/5/9 5:02, Leo Yan wrote:
> On Wed, May 09, 2018 at 09:19:13AM +0530, Jassi Brar wrote:
>> On Wed, Apr 4, 2018 at 8:44 AM, Leo Yan wrote:
>>> From: Daniel Lezcano
>>>
>>> The current defconfig is inconsistent as it selects the mailbox and
>>> the clock for the hi6220 and the hi366
Hi Yao,
On 2018/5/11 10:15, Yao Chen wrote:
> Add pcie msi interrupt attribute for hi3660 SOC.
>
> Signed-off-by: Yao Chen
Applied patch 2 into the hisilicon dt tree.
Thanks!
BR,
Wei
> ---
> arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a
On Tue, May 29, 2018 at 10:10:30AM +0800, Jason Wang wrote:
> This patch introduces basic support for event suppression aka driver
> and device area.
>
> Signed-off-by: Jason Wang
> ---
> drivers/vhost/vhost.c| 191
> ---
> drivers/vhost/vhost.h
Hi Viresh,
On 2018/5/25 6:40, Viresh Kumar wrote:
> The cooling device properties, like "#cooling-cells" and
> "dynamic-power-coefficient", should either be present for all the CPUs
> of a cluster or none. If these are present only for a subset of CPUs of
> a cluster then things will start falling
Hi Ryan,
On 2018/7/13 16:53, Ryan Grachek wrote:
> Remove the keep-power-in-suspend property because it keeps wifi power
> on during suspend. This property is only required when enabling WoWLAN
> and should only be enabled based on need. Also remove dupplicate property
>
> Signed-off-by: Ryan Gra
Hi Ryan,
On 2018/7/13 17:02, Ryan Grachek wrote:
> Remove the keep-power-in-suspend property because it keeps wifi power
> on during suspend. This property is only required when enabling WoWLAN
> and should only be enabled based on need.
>
> Signed-off-by: Ryan Grachek
Thanks!
Applied to the hi
Hi Vincent,
On 2018/7/11 9:34, Vincent Guittot wrote:
> Update entry/exit latency and residency time of hikey960 to use more
> realistic figures based on unitary tests done on the platform.
>
> The complete results (in us) :
> big cluster
> cluster CPU
> max e
Hi Viresh,
On 2018/7/5 6:09, Viresh Kumar wrote:
> Hi,
>
> This is an attempt to fix the broken or partially defined DT bindings
> for cooling-maps. We should list every device that participates in
> cooling down at a certain trip point, instead of just the first in the
> list as that depends on
Hi Ryan,
On 2018/6/18 19:10, Ryan Grachek wrote:
> Certain properties should be moved to the board file to reflect
> the specific properties of the board, and not the SoC. Move these
> properties to proper location and organize properties in both files.
>
> Signed-off-by: Ryan Grachek
Thanks!
A
Hi Ryan,
On 2018/6/18 19:08, Ryan Grachek wrote:
> Signed-off-by: Ryan Grachek
Thanks!
Applied to the hisilicon dt tree.
Best Regards,
Wei
> ---
> arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 1 -
> arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8
> 2 files changed, 9 de
Hi Nicholas,
On 2018/7/12 10:28, Nicholas Mc Guire wrote:
> This patch set addresses two issues in arch/arm/mach-hisi/hotplug.c
>
> 1) The hisi hotplug functions were using a few unchecked
>of_iomap() while at the same time the system relied on
>those mappings. Checks for !NULL were inse
> +/*
> + * Anonymous LRU management is a waste if there is
> + * ultimately no way to reclaim the memory.
> + */
> +bool anon_should_be_aged(struct lruvec *lruvec)
> +{
> + struct pglist_data *pgdat = lruvec_pgdat(lruvec);
> +
> + /* Aging the anon LRU is valuable if swap is present: *
.
Reviewed-by: Wei Xu
On Thu, Apr 1, 2021 at 11:35 AM Dave Hansen wrote:
>
>
> From: Dave Hansen
>
> Prepare for the kernel to auto-migrate pages to other memory nodes
> with a user defined node migration table. This allows creating single
> migration target for each NUMA node to
I agree that it is a good further improvement to make nr_succeeded an optional
output argument of migrate_pages() given that most callers don't need it. IMHO,
the most important thing in this matter is to ensure that nr_succeeded only
returns (when its return value is needed) the successfully migr
On 2014/12/4 20:58, Arnd Bergmann wrote:
> On Friday 28 November 2014 02:15:43 Wang Long wrote:
>> This series patch enable Hisilicon HiP01 SoC. The HiP01 SoC series
>> chip is designed for networking product, it integrates a rich peripheral
>> interfaces to support network applications and suppo
On 2014/12/24 11:09, Wang Long wrote:
> Hi, Xu Wei
>
> This series patch enable Hisilicon HiP01 SoC. The HiP01 SoC series
> chip is designed for networking product, it integrates a rich peripheral
> interfaces to support network applications and supports both one
> core or dual cores and quad c
On Wed, May 16, 2018 at 08:32:20PM +0800, Jason Wang wrote:
> Signed-off-by: Jason Wang
> ---
> drivers/vhost/net.c | 3 +-
> drivers/vhost/vhost.c | 539
> ++
> drivers/vhost/vhost.h | 8 +-
> 3 files changed, 513 insertions(+), 37 deletions
On Wed, May 23, 2018 at 09:39:28AM +0800, Jason Wang wrote:
>
>
> On 2018年05月23日 00:54, Wei Xu wrote:
> >On Wed, May 16, 2018 at 08:32:20PM +0800, Jason Wang wrote:
> >>Signed-off-by: Jason Wang
> >>---
> >> drivers/vhost/net.c
Hi Leo, Daniel,
On 2018/5/15 3:53, Leo Yan wrote:
> From: Daniel Lezcano
>
> The current defconfig is inconsistent as it selects the mailbox and
> the clock for the hi6220 and the hi3660 without having their Kconfigs
> making sure the dependencies are correct. It ends up when selecting
> differe
Hi Leo,
On 2018/5/15 3:53, Leo Yan wrote:
> Since hi3660 drivers have been merged into Linux kernel (mailbox driver is in
> Linux-next branch and other drivers are existed in Linux mainline kernel), so
> this patch series is to enable power management features on hi3660.
>
> This patch series inc
Hi Arnd,
On 2021/1/28 22:08, Arnd Bergmann wrote:
> On Wed, Jan 27, 2021 at 1:42 AM Wei Xu wrote:
>> On 2021/1/27 6:23, Arnd Bergmann wrote:
>>> On Tue, Dec 8, 2020 at 1:46 PM Zhen Lei wrote:
>>>>
>>>> The vendor prefix of "Hisilicon Limited"
Hi Arnd,
On 2021/1/29 9:02, Wei Xu wrote:
> Hi Arnd,
>
> On 2021/1/28 22:08, Arnd Bergmann wrote:
>> On Wed, Jan 27, 2021 at 1:42 AM Wei Xu wrote:
>>> On 2021/1/27 6:23, Arnd Bergmann wrote:
>>>> On Tue, Dec 8, 2020 at 1:46 PM Zhen Lei wrote:
>>>>
Hi Arnd,
On 2021/1/14 0:14, Arnd Bergmann wrote:
> On Fri, Jan 8, 2021 at 11:55 PM Arnd Bergmann wrote:
>
> Just to catch up on the replies I received on my initial email, here
> is the updated status of all the Arm platforms I listed earlier, thanks
> for everyone that contributed information o
On Thu, Apr 15, 2021 at 8:35 AM Dave Hansen wrote:
> > This can help enable more flexible demotion policies to be
> > configured, such as to allow a cgroup to allocate from all fast tier
> > nodes, but only demote to a local slow tier node. Such a policy can
> > reduce memory stranding at the fas
On Wed, Apr 14, 2021 at 1:08 AM Oscar Salvador wrote:
>
> Hi Wei Xu,
>
> I have some questions about it
>
> Fast class/memory are pictured as those nodes with CPUs, while Slow
> class/memory
> are PMEM, right?
> Then, what stands for medium class/memory?
That is Dave&
> cases.
>
> Signed-off-by: Yang Shi
> Signed-off-by: Dave Hansen
> Reviewed-by: Yang Shi
> Cc: Wei Xu
> Cc: Huang Ying
> Cc: Dan Williams
> Cc: David Hildenbrand
> Cc: osalvador
>
> --
>
> Note: Yang Shi originally wrote the patch, thus the SoB. There w
al is to reduce the
> total memory consumption of the entire memcg, across all
> nodes. Migration does not assist memcg reclaim because
> it just moves page contents between nodes rather than
> actually reducing memory consumption.
>
> Signed-off-by: Dave Hansen
> Suggested-by:
possibility of future reclaim.
>
> #Signed-off-by: Keith Busch
> Cc: Keith Busch
> Signed-off-by: Dave Hansen
> Reviewed-by: Yang Shi
> Cc: Wei Xu
> Cc: David Rientjes
> Cc: Huang Ying
> Cc: Dan Williams
> Cc: David Hildenbrand
> Cc: osalvador
>
&
Hi Hao Fang,
On 2021/3/30 14:51, Hao Fang wrote:
> s/Hisilicon/HiSilicon/
> It should use capital S, according to
> https://www.hisilicon.com/en/terms-of-use.
>
> Signed-off-by: Hao Fang
Thanks!
Applied to the hisilicon arm32 SoC tree.
Best Regards,
Wei
> ---
> arch/arm/mach-hisi/hisilicon.c
On Fri, Apr 9, 2021 at 8:50 AM Dave Hansen wrote:
> I also considered passing NULL to mean "I don't care about
> nr_succeeded". I mostly avoided it to reduce churn. But, looking at it
> here, it does seem cleaner.
>
> Any objections to moving over to Oscar's suggestion?
I like this approach (ma
On Thu, Apr 1, 2021 at 11:35 AM Dave Hansen wrote:
> +/*
> + * node_demotion[] example:
> + *
> + * Consider a system with two sockets. Each socket has
> + * three classes of memory attached: fast, medium and slow.
> + * Each memory class is placed in its own NUMA node. The
> + * CPUs are placed
> +static unsigned int demote_page_list(struct list_head *demote_pages,
> +struct pglist_data *pgdat,
> +struct scan_control *sc)
sc is not needed and can be removed from demote_page_list().
Reviewed-by: Wei Xu
vents() a bit, and made them look at the THP
> size directly rather than getting data from migrate_pages()
> ]
>
> Signed-off-by: Yang Shi
> Signed-off-by: Dave Hansen
> Reviewed-by: Yang Shi
> Cc: Wei Xu
> Cc: David Rientjes
> Cc: Huang Ying
> Cc: Dan Williams
On Thu, Apr 1, 2021 at 11:35 AM Dave Hansen wrote:
> This proposes extending the existing "zone_reclaim_mode" (now
> now really node_reclaim_mode) as a method to enable it.
Nit: now now -> now
> We are open to any alternative that allows end users to enable
> this mechanism or disable it it work
Hi Zhen,
On 2020/10/12 14:12, Zhen Lei wrote:
> v1 --> v2:
> Too deep in arm32. I forgot arm64. Add property "#reset-cells" into
> sysctrl.yaml (Patch 9).
>
>
> v1:
> These patches are based on the latest linux-next.
>
> Zhen Lei (10):
> ARM: dts: hisilicon: fix errors detected by snps-dw-ap
Hi Zhen,
On 2020/10/12 21:17, Zhen Lei wrote:
> These patches are based on the latest linux-next. Because some txt files have
> not converted to DT schema, so a lot of errors can not be fixed now. This
> time,
> only some obvious errors are cleared.
>
> Zhen Lei (11):
> arm64: dts: hisilicon:
Hi Serge,
On 2020/11/11 17:15, Serge Semin wrote:
> In accordance with the DWC USB3 bindings the corresponding node
> name is suppose to comply with the Generic USB HCD DT schema, which
> requires the USB nodes to have the name acceptable by the regexp:
> "^usb(@.*)?" . Make sure the "snps,dwc3"-c
Hi Serge,
On 2020/11/11 17:15, Serge Semin wrote:
> In accordance with the Generic EHCI/OHCI bindings the corresponding node
> name is suppose to comply with the Generic USB HCD DT schema, which
> requires the USB nodes to have the name acceptable by the regexp:
> "^usb(@.*)?" . Make sure the "gen
Hi Serge,
On 2020/11/11 17:15, Serge Semin wrote:
> In accordance with the Generic EHCI/OHCI bindings the corresponding node
> name is suppose to comply with the Generic USB HCD DT schema, which
> requires the USB nodes to have the name acceptable by the regexp:
> "^usb(@.*)?" . Make sure the "gen
Hi Jisheng,
On 2020/11/9 17:05, Jisheng Zhang wrote:
> This is to remove similar errors as below:
>
> OF: /.../gpio-port@0: could not find phandle
>
> Commit 7569486d79ae ("gpio: dwapb: Add ngpios DT-property support")
> explained the reason of above errors well and added the generic
> "ngpios"
Hi Mauro,
On 2021/1/15 19:53, Mauro Carvalho Chehab wrote:
> The Hikey 970 device tree has a few missing pieces that are required
> in order for it to be able to support USB and DRM drivers upstream.
>
> Besides PM, USB and DRM specific bits, the hardware's binding
> for I2C buses and pinctrl are
Hi Zhen Lei,
On 2020/12/8 20:46, Zhen Lei wrote:
> The vendor prefix of "Hisilicon Limited" is "hisilicon", it is clearly
> stated in "vendor-prefixes.yaml".
>
> Fixes: 35ca8168133c ("arm64: dts: Add dts files for Hisilicon Hi3660 SoC")
> Fixes: dd8c7b78c11b ("arm64: dts: Add devicetree for Hisil
Hi Arnd,
On 2021/1/27 6:23, Arnd Bergmann wrote:
> On Tue, Dec 8, 2020 at 1:46 PM Zhen Lei wrote:
>>
>> The vendor prefix of "Hisilicon Limited" is "hisilicon", it is clearly
>> stated in "vendor-prefixes.yaml".
>>
>> Fixes: 35ca8168133c ("arm64: dts: Add dts files for Hisilicon Hi3660 SoC")
>> F
Hi Arnd,
On 2021/1/15 20:04, Arnd Bergmann wrote:
> On Fri, Jan 15, 2021 at 12:09 PM Leizhen (ThunderTown)
> wrote:
>> On 2021/1/15 17:26, Arnd Bergmann wrote:
>>> On Fri, Jan 15, 2021 at 8:08 AM Wei Xu wrote:
>>>> On 2021/1/14 0:14, Arnd Bergmann wrote:
>
On 2014/9/26 9:55, Stephen Rothwell wrote:
> Hi all,
>
> After merging the arm-soc tree, today's linux-next build (arm
> multi_v7_defconfig) failed like this:
>
> Error: arch/arm/boot/dts/hisi-x5hd2.dtsi:374.22-23 syntax error
> FATAL ERROR: Unable to parse input tree
>
> There are a series of
On 2014/9/30 8:12, Stephen Rothwell wrote:
> Hi all,
>
> On Fri, 26 Sep 2014 11:55:39 +1000 Stephen Rothwell
> wrote:
>>
>> After merging the arm-soc tree, today's linux-next build (arm
>> multi_v7_defconfig) failed like this:
>>
>> Error: arch/arm/boot/dts/hisi-x5hd2.dtsi:374.22-23 syntax err
On 8/6/2015 7:45 AM, Shawn Lin wrote:
> DesignWare MMC Controller's transfer mode should be decided
> at runtime instead of compile-time. So we remove this config
> option and read dw_mmc's register to select DMA master.
>
> Signed-off-by: Shawn Lin
Acked-by: Wei Xu
Hi Leo,
On 26/02/2016 05:28, Leo Yan wrote:
> This patch adds the L2 cache topology on Hi6220. Hi6220 has two
> clusters, every cluster has 512KiB L2 cache (32KiB x 16 ways).
>
> Signed-off-by: Leo Yan
> ---
Applied.
Thanks!
Best Regards,
Wei
> arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 16
Hi Masahiro,
On 15/11/2015 01:39, Masahiro Yamada wrote:
> These three structures are only defined and referenced in
> mach-hisi/platsmp.c.
>
> Drop the declarations from the header and add static qualifier
> to the definitions.
>
> Signed-off-by: Masahiro Yamada
> --
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