On Thu, Jan 11, 2018 at 05:04:27PM +0530, abhijeet.ku...@intel.com wrote:
> From: Abhijeet Kumar
>
> When we change the resolution of DP pannel or hot plug-unplug it while
> playing an audio clip,sometimes we observe a silent playback(no audio).
can you rephrase this please
> During no audio co
On Mon, Jan 08, 2018 at 10:50:50AM -0500, Zi Yan wrote:
> From: Zi Yan
>
> When CONFIG_DMA_ENGINE_RAID is enabled, unmap pool size can reach to
> 256. But in struct dmaengine_unmap_data, map_cnt is only u8, wrapping
> to 0, if the unmap pool is maximally used. This triggers BUG() when
> struct dm
On Mon, Jan 29, 2018 at 02:40:11PM +0800, Yang Shunyong wrote:
> The type of arg passed to dmatest_callback is struct dmatest_done.
> It refers to test_done in struct dmatest_thread, not done_wait.
Applied, thanks
--
~Vinod
On Mon, Jan 29, 2018 at 06:26:40AM +, Yang, Shunyong wrote:
> Hi, Vinod
>
> On Mon, 2018-01-29 at 10:18 +0530, Vinod Koul wrote:
> > On Mon, Jan 22, 2018 at 06:44:40PM +0800, Yang Shunyong wrote:
> > >
> > > Current coding style prefers octal permissions
On Mon, Jan 22, 2018 at 06:44:41PM +0800, Yang Shunyong wrote:
> Existing option noverify disables both random src/dst address offset
> setup and data verification. Sometimes, we need to control random
> src/dst address setup and verification separately, such as disabling
> random to make sure that
ic_x100_dma: Use PTR_ERR_OR_ZERO()
Vignesh R (1):
dmaengine: ti-dma-crossbar: Fix event mapping for TPCC_EVT_MUX_60_63
Vinod Koul (18):
Merge branch 'topic/device_changes' into topic/qcom
dmaengine: xilinx_dma: Fix typos
dmaengine: sprd: statify 'sprd_dma_
On Wed, Jan 31, 2018 at 03:31:48PM +0530, Viresh Kumar wrote:
> On Mon, Jan 29, 2018 at 10:18 AM, Vinod Koul wrote:
> > On Mon, Jan 22, 2018 at 06:44:40PM +0800, Yang Shunyong wrote:
> >> Current coding style prefers octal permissions values. This patch
> >> changes sy
On Tue, Jan 16, 2018 at 07:02:33PM +, srinivas.kandaga...@linaro.org wrote:
> From: Srinivas Kandagatla
>
> When BAM is remotely controlled it does not sound correct to control
> its clk on Linux side. Make it optional, so that its not madatory
s/madatory/mandatory
> for remote controlled B
On Tue, Jan 16, 2018 at 07:02:34PM +, srinivas.kandaga...@linaro.org wrote:
> From: Srinivas Kandagatla
>
> When Linux is master of BAM, it can directly read registers to know number
> of supported channels, however when its remotely controlled reading these
> registers would trigger a crash
ave status handling")
Signed-off-by: Dan Carpenter
Signed-off-by: Vinod Koul
---
drivers/soundwire/bus.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/soundwire/bus.c b/drivers/soundwire/bus.c
index 5d7226c251e6..d6dc8e7a8614 100644
--- a/drivers/soundwire/
On Mon, Jan 22, 2018 at 09:55:01AM +, Srinivas Kandagatla wrote:
> >>@@ -1180,13 +1180,14 @@ static int bam_dma_probe(struct platform_device
> >>*pdev)
> >>"qcom,controlled-remotely");
> >>bdev->bamclk = devm_clk_get(bdev->dev, "bam_clk");
> >
>
Hey Greg,
Please PULL to get three patches for static checks which people have
found. These have been tested by Fengguang's kbuildbot.
The following changes since commit 1443f5b4fb451fdc894e4845ca67b370ed897a94:
MAINTAINERS: Add SoundWire entry (2017-12-19 11:32:35 +0100)
are available in the
On Fri, Jan 05, 2018 at 05:04:21PM +, Mark Brown wrote:
> On Thu, Dec 14, 2017 at 11:19:38AM +0530, Vinod Koul wrote:
>
> > + /* SoundWire register address are contiguous */
> > + if (config->reg_stride != 0)
> > + return -ENOTSUPP;
>
> That doe
On Fri, Jan 05, 2018 at 11:22:15AM -0600, Pierre-Louis Bossart wrote:
> On 1/5/18 11:04 AM, Mark Brown wrote:
> >On Thu, Dec 14, 2017 at 11:19:38AM +0530, Vinod Koul wrote:
> >
> >>+ /* SoundWire register address are contiguous */
> >>+ if (config->reg
On Fri, Jan 05, 2018 at 05:05:52PM +, Mark Brown wrote:
> On Thu, Dec 14, 2017 at 11:19:38AM +0530, Vinod Koul wrote:
> > SoundWire bus provides sdw_read() and sdw_write() APIs for Slave
> > devices to program the registers. Provide support in regmap for
> > SoundWire bu
Signed-off-by: Vinod Koul
---
changes in v7:
drop SDW bus select
drop stride check
drivers/base/regmap/Kconfig | 7
drivers/base/regmap/Makefile | 1 +
drivers/base/regmap/regmap-sdw.c | 88
include/linux/regmap.h | 37
KBL Kconfigs
These:
Acked-By: Vinod Koul
> Vinod Koul (2):
> ASoC: Intel: kconfig: add some comments for if symbols
> ASoC: Intel: kconfig: drop boiler plate text from config items
--
~Vinod
On Mon, Jan 08, 2018 at 10:02:35AM +, Srinivas Kandagatla wrote:
>
>
> On 06/01/18 06:40, Vinod Koul wrote:
> >+
> >+config REGMAP_HWSPINLOCK
> >+bool
> >+
> Does this belong to this patch?
Ah crap, I rebased on regmap-next and looks like this
Signed-off-by: Vinod Koul
---
changes in v8:
drop bad merge artifcat
changes in v7:
drop SDW bus select
drop stride check
drivers/base/regmap/Kconfig | 4 ++
drivers/base/regmap/Makefile | 1 +
drivers/base/regmap/regmap-sdw.c | 88
include
On Sat, Dec 30, 2017 at 11:53:06PM +0100, Luca Ceresoli wrote:
> The bullet list documenting the 'struct dma_device' fields has several
> nesting errors, making it render improperly. It also has incoherent
> formatting: some fields have a description in the same bullet, some in
> a sub-bullet.
App
On Wed, Jan 03, 2018 at 12:12:08PM +0530, Kedareswara rao Appana wrote:
> When client driver uses dma_get_slave_caps() api,
> it checks for certain fields of dma_device struct
> currently driver is not settings the directions and addr_widths
> fields resulting dma_get_slave_caps() returning failure
On Wed, Jan 03, 2018 at 12:12:09PM +0530, Kedareswara rao Appana wrote:
> If the hardware is configured for Scatter Gather(SG) mode,
> and hardware is idle, in the control register SG mode bit
> must be set to a 0 then back to 1 by the software, to force
> the CDMA SG engine to use a new value writ
From: Wei Yongjun
Fix the typo, 'status' should be instead of 'status2'.
Fixes: b0a9c37b0178 ("soundwire: Add slave status handling")
Signed-off-by: Wei Yongjun
Acked-by: Pierre-Louis Bossart
Acked-by: Vinod Koul
---
drivers/soundwire/bus.c | 10 +-
unsigned long long casts to u64 casts to match the same type of
addr.
Detected by CoverityScan, CID#1463147 ("Unintended sign extension")
Fixes: d52d7a1be02c ("soundwire: Add Slave status handling helpers")
Signed-off-by: Colin Ian King
Acked-by: Vinod Koul
---
drivers/soundwire/bu
On Mon, Jan 08, 2018 at 02:20:13PM +0100, Greg KH wrote:
> On Fri, Jan 05, 2018 at 03:27:16PM +0530, Vinod Koul wrote:
> > Hey Greg,
> >
> > Please PULL to get three patches for static checks which people have
> > found. These have been tested by Fengguang's k
#1463148 ("Logically dead code")
Fixes: 71bb8a1b059e ("soundwire: intel: Add Intel Master driver")
Signed-off-by: Colin Ian King
Acked-by: Vinod Koul
---
drivers/soundwire/intel.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soundwire/intel.c
On Thu, Jan 04, 2018 at 04:45:40PM -0600, Rob Herring wrote:
> The hidma driver open codes populating address and IRQ resources from DT.
> We have standard functions of_address_to_resource and of_irq_to_resource
> for this, so use them instead.
>
> The DT binding states each child should have 2 ad
On Mon, Jan 08, 2018 at 10:52:01AM +, Appana Durga Kedareswara Rao wrote:
> Hi Vinod,
>
> Thanks for the review
>
> >> @@ -2398,6 +2398,7 @@ static int xilinx_dma_chan_probe(struct
> >xilinx_dma_device *xdev,
> >>chan->direction = DMA_MEM_TO_DEV;
> >>chan->i
On Mon, Jan 22, 2018 at 03:28:28PM +0800, Yang Shunyong wrote:
> The type of arg passed to dmatest_callback is struct dmatest_done.
> It refers to test_done in struct dmatest_thread, not done_wait.
>
> Fixes: 6f6a23a213be ("dmaengine: dmatest: move callback wait ...")
> Signed-off-by: Yang Shunyon
On Mon, Jan 22, 2018 at 06:44:40PM +0800, Yang Shunyong wrote:
> Current coding style prefers octal permissions values. This patch
> changes symbolic permissions to octal values.
Is this preference documented anywhere?
--
~Vinod
On Tue, Jan 16, 2018 at 07:02:32PM +, srinivas.kandaga...@linaro.org wrote:
> From: Srinivas Kandagatla
>
> Hi Andy,
>
> I did hit few issues while trying out SLIMBus BAM on DB820c, this BAM instance
> is remotely controlled and powered up after ADSP is booted using QMI commands.
What do yo
On Wed, Jan 17, 2018 at 10:55:34AM +, Srinivas Kandagatla wrote:
>
>
> On 17/01/18 10:18, Vinod Koul wrote:
> >On Tue, Jan 16, 2018 at 07:02:32PM +, srinivas.kandaga...@linaro.org
> >wrote:
> >>From: Srinivas Kandagatla
> >>
> >>Hi Andy
Pierre was MIPI chair for SoundWire spec and we could use his help in
code reviews, so add him as a reviewer.
Signed-off-by: Vinod Koul
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index ef6e802dc882..715d054531af 100644
--- a/MAINTAINERS
+++ b
From: Shreyas NC
pm_runtime_get_sync will return negative values for error
and 0 or 1 for success. Update the error check accordingly.
Signed-off-by: Shreyas NC
Reported-by: Dan Carpenter
Fixes: 9d715fa005eb: ("soundwire: Add IO transfer")
Signed-off-by: Vinod Koul
---
drivers
On Mon, Jan 08, 2018 at 05:25:01PM +, Appana Durga Kedareswara Rao wrote:
> Hi,
>
>
> >> >> + xdev->common.dst_addr_widths = BIT(addr_width / 8);
> >> >> + xdev->common.src_addr_widths = BIT(addr_width / 8);
> >> >
> >> >Do you not support trf of 1byte, 2 bytes, or 4 bytes wide tr
SoundWire bus needs to select the regmap support. So, add it
Signed-off-by: Vinod Koul
---
drivers/soundwire/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soundwire/Kconfig b/drivers/soundwire/Kconfig
index 08aad9f52152..b46084b4b1f8 100644
--- a/drivers/soundwire/Kconfig
On Tue, Jan 09, 2018 at 04:48:10AM +, Appana Durga Kedareswara Rao wrote:
> Hi,
>
> >On Mon, Jan 08, 2018 at 05:25:01PM +, Appana Durga Kedareswara Rao
> >wrote:
> >> Hi,
> >>
> >>
> >> >> >> +xdev->common.dst_addr_widths = BIT(addr_width / 8);
> >> >> >> +xdev->common.src_addr_wi
On Fri, Jan 12, 2018 at 09:20:12PM +, Mark Brown wrote:
> On Fri, Jan 12, 2018 at 09:08:53PM +, Mark Brown wrote:
> > The patch
> >
> >ASoC: hdac_hdmi: Ensuring proper setting of output widget power state
> >
> > has been applied to the asoc tree at
> >
> >https://git.kernel.org/
On Mon, Jan 15, 2018 at 10:30:40AM +, Mark Brown wrote:
> On Mon, Jan 15, 2018 at 11:42:16AM +0530, Vinod Koul wrote:
> > On Fri, Jan 12, 2018 at 09:20:12PM +, Mark Brown wrote:
>
> > > I've dropped this because it caused a conflict with the topic/hdac-hdmi
>
On Tue, Mar 06, 2018 at 11:03:22AM -0500, Frank Mori Hess wrote:
> Do DMAFLUSHP _before_ the first DMAWFP to ensure controller
> and peripheral are in agreement about dma request state before first
> transfer. Add support for burst transfers to/from peripherals. In the new
> scheme, the controller
On Tue, Mar 06, 2018 at 09:13:37AM +0800, Qi Hou wrote:
> When booting up with "threadirqs" in command line, all irq handlers of the DMA
> controller pl330 will be threaded forcedly. These threads will race for the
> same
> list, pl330->req_done.
>
> Before the callback, the spinlock was released
aders to the appropriate subsystem maintainer.
>
> Reported-by: Guenter Roeck
> Cc: Vinod Koul
> Cc: Linus Walleij
> Cc: Joerg Roedel
> Cc: Bjorn Helgaas
> Signed-off-by: Rob Herring
> ---
> MAINTAINERS | 4
> 1 file changed, 4 insertions(+)
>
>
Hello Linus,
We have a small buffer over flow fix for stm32 driver, please pull to
receive this.
Also note that somehow I was not able to push it at regular git.infradead.org
server I use, so updated on kernel.org tree
The following changes since commit 0c8efd610b58cb23cefdfa12015799079aef94ae:
On Thu, Mar 15, 2018 at 03:40:34PM +0800, sean.w...@mediatek.com wrote:
> From: Sean Wang
>
>
> This patchset introduces support for MediaTek High-Speed DMA controller
> (MTK-HSDMA) Currently, the driver is already tested successfully with
> dmatest module on MT7622 and MT7623 SoC.
>
> MTK-HSD
On Thu, Feb 22, 2018 at 12:39:55PM +0100, Maxime Jayat wrote:
> Despite the efforts made to correctly read the NDA and CUBC registers,
> the order in which the registers are read could sometimes lead to an
> inconsistent state.
>
> Re-using the timeline from the comments, this following timing of
On Wed, Mar 21, 2018 at 10:30:22AM +0200, Peter Ujfalusi wrote:
> If the allocation fails then disable the memcpy support.
Applied, thanks
--
~Vinod
On Wed, Mar 21, 2018 at 10:24:13AM +, Colin King wrote:
> From: Colin Ian King
>
> Trivial fix to spelling mistake in dev_err error message text
>
Applied, thanks
--
~Vinod
On Mon, Apr 02, 2018 at 04:09:01PM +0530, Radhey Shyam Pandey wrote:
> Add an optional AXI DMA property 'has_axieth_connected'. This can be
> specified to indicate that AXI DMA is connected to AXI Ethernet in
> hardware design and dma driver needs to do some additional handling.
1. why are DT peop
On Mon, Apr 02, 2018 at 04:09:04PM +0530, Radhey Shyam Pandey wrote:
> AXIDMA IP sets completion bit to 1 when the transfer is completed. Read
> this bit to move descriptor from active list to the done list. This feature
> is needed when interrupt delay timeout and IRQThreshold is enabled i.e
> Dly
On Mon, Apr 02, 2018 at 04:09:02PM +0530, Radhey Shyam Pandey wrote:
> +
> + if (chan->xdev->has_axieth_connected) {
> + seg = list_first_entry(&desc->segments,
> + struct xilinx_axidma_tx_segment, node);
> + i
On Mon, Apr 02, 2018 at 04:09:05PM +0530, Radhey Shyam Pandey wrote:
> Program IRQDelay for AXI DMA. The interrupt timeout mechanism causes
> the DMA engine to generate an interrupt after the delay time period
> has expired. It enables dmaengine to respond in real-time even though
> interrupt coale
On Tue, Apr 10, 2018 at 03:46:03PM +0800, Baolin Wang wrote:
> From: Eric Long
>
> Define the DMA transfer step type to make code more readable.
>
> Signed-off-by: Eric Long
> Signed-off-by: Baolin Wang
> ---
> drivers/dma/sprd-dma.c | 28 ++--
> 1 file changed, 22 i
On Tue, Apr 10, 2018 at 03:46:06PM +0800, Baolin Wang wrote:
> +/*
> + * struct sprd_dma_config - DMA configuration structure
> + * @config: dma slave channel config
> + * @fragment_len: specify one fragment transfer length
> + * @block_len: specify one block transfer length
> + * @transcation_len
On Tue, Apr 10, 2018 at 03:46:07PM +0800, Baolin Wang wrote:
> This patch adds the 'device_config' and 'device_prep_slave_sg' interfaces
> for users to configure DMA.
>
> Signed-off-by: Baolin Wang
> ---
> drivers/dma/sprd-dma.c | 48
>
> 1 fil
On Wed, Apr 11, 2018 at 08:13:28PM +0800, Baolin Wang wrote:
> Hi Vinod,
>
> On 11 April 2018 at 17:36, Vinod Koul wrote:
> > On Tue, Apr 10, 2018 at 03:46:06PM +0800, Baolin Wang wrote:
> >
> >> +/*
> >> + * struct sprd_dma_config - DMA configuratio
On Thu, Apr 12, 2018 at 07:30:01PM +0800, Baolin Wang wrote:
> >> > what does block and transaction len refer to here
> >>
> >> Our DMA has 3 transfer mode: transaction transfer, block transfer and
> >> fragment transfer. One transaction transfer can contain several blocks
> >> transfer, and each
On Thu, Apr 12, 2018 at 07:36:34PM +0800, Baolin Wang wrote:
> >>> >> +/*
> >>> >> + * struct sprd_dma_config - DMA configuration structure
> >>> >> + * @config: dma slave channel config
> >>> >> + * @fragment_len: specify one fragment transfer length
> >>> >> + * @block_len: specify one block tran
On Wed, Apr 11, 2018 at 04:44:39PM +0200, Pierre-Yves MORDRET wrote:
> struct stm32_mdma_desc {
> struct virt_dma_desc vdesc;
> u32 ccr;
> - struct stm32_mdma_hwdesc *hwdesc;
> - dma_addr_t hwdesc_phys;
> bool cyclic;
> u32 count;
> + struct stm32_mdma_desc_nod
On Fri, Apr 13, 2018 at 02:17:34PM +0800, Baolin Wang wrote:
> > Agreed, users only care about grabbing a channel, setting a descriptor and
> > submitting that.
> >
> > I think you need to go back and think about this a bit, please do go thru
> > dmaengine documentation and see other driver exampl
On Fri, Apr 13, 2018 at 10:39:48AM +0200, Geert Uytterhoeven wrote:
> Hi Vinod,
>
> On Fri, Apr 13, 2018 at 6:02 AM, Vinod Koul wrote:
> > On Wed, Apr 11, 2018 at 04:44:39PM +0200, Pierre-Yves MORDRET wrote:
> >
> >> struct stm32_mdma_desc {
> >> str
On Fri, Apr 13, 2018 at 02:41:48PM +0800, Baolin Wang wrote:
> On 13 April 2018 at 14:36, Vinod Koul wrote:
> > On Fri, Apr 13, 2018 at 02:17:34PM +0800, Baolin Wang wrote:
> >
> >> > Agreed, users only care about grabbing a channel, setting a descriptor
> &
On Mon, Mar 19, 2018 at 12:53:41PM +0530, Vinod Koul wrote:
> On Mon, Mar 19, 2018 at 09:14:00AM +0200, Peter Ujfalusi wrote:
> > On 2018-03-19 05:08, Vinod Koul wrote:
> > > On Sun, Mar 18, 2018 at 11:44:51AM +0100, Greg Kroah-Hartman wrote:
> > >> On Sun, Mar 18,
On Tue, Mar 13, 2018 at 05:55:35PM +0100, Pierre-Yves MORDRET wrote:
> The bitfield dma_inuse is allocated of size dma_requests bits, thus a
> valid bit address is from 0 to (dma_requests - 1).
> When find_first_zero_bit() fails, it returns dma_requests as invalid
> address.
> Using such address fo
On Mon, Apr 09, 2018 at 09:39:06PM +0200, Takashi Iwai wrote:
> On Mon, 09 Apr 2018 20:57:43 +0200,
> Pierre-Louis Bossart wrote:
> >
> > On 4/9/18 5:46 AM, Jia-Ju Bai wrote:
> > > broxton_audio_probe() is never called in atomic context.
> > > This function is only set as ".probe" in "struct platf
dmaengine: qcom: bam_dma: get num-channels and num-ees from dt
dmaengine: qcom: bam_dma: do not write to global regs in remote mode
dmaengine: qcom: bam_dma: disable runtime pm on remote controlled
Thierry Bultel (1):
dmaengine: imx-sdma: fix pagefault when channel is disabled
On Mon, Apr 09, 2018 at 08:41:18PM -0400, Frank Mori Hess wrote:
> On Tue, Mar 13, 2018 at 2:34 PM, Frank Mori Hess wrote:
> > Do DMAFLUSHP _before_ the first DMAWFP to ensure controller
> > and peripheral are in agreement about dma request state before first
> > transfer. Add support for burst t
On Mon, Apr 09, 2018 at 04:14:20PM -0700, Laura Abbott wrote:
> On 04/09/2018 03:48 PM, Sinan Kaya wrote:
> >On 4/9/2018 5:06 PM, Laura Abbott wrote:
> >>+ /* dst_cnt can't be more than u8 */
> >>+ dma_addr_t dma_pq[255];
> >
> >This is 2k stack space on 64 bit a
On 25-10-18, 11:05, Nathan Chancellor wrote:
> Clang warns:
>
> drivers/dma/xilinx/zynqmp_dma.c:166:4: warning: attribute 'aligned' is
> ignored, place it after "struct" to apply attribute to type declaration
> [-Wignored-attributes]
> }; __aligned(64)
>^
> ./include/linux/compiler_types.h:200
On 12-10-18, 01:41, Masahiro Yamada wrote:
> 1/2: DT-binding
> 2/2: driver
Applied this series, thanks
While building I noticed that we get few warns when compiling with
C=1, I would prefer you fix them. Please send fixes on top of the
applied patches.
Thanks
--
~Vinod
On 06-11-18, 11:33, Jia-Ju Bai wrote:
> The function coh901318_alloc_chan_resources() calls spin_lock_irqsave()
> before calling coh901318_config().
> But coh901318_config() calls spin_lock_irqsave() again in its
> definition, which may cause a double-lock bug.
>
> Because coh901318_config() is o
On 19-11-18, 10:15, Yangtao Li wrote:
> couln't -> couldn't
Applied, thanks
--
~Vinod
with below:
-- >8 --
>From fbbdec195155b4497cb83be37788865f98f31dca Mon Sep 17 00:00:00 2001
From: Vinod Koul
Date: Mon, 26 Nov 2018 13:34:15 +0530
Subject: [PATCH] dmaengine: coh901318: Remove unused variable
Commit 627469e4445b ("dmaengine: coh901318: Fix a double-lock bug&quo
Hi Govind,
On 26-11-18, 19:51, Govind Singh wrote:
> Add device node for the ath10k SNOC platform driver probe
> and add resources required for WCN3990 on qcs404 soc.
> Optional clock and regulator controls are not yet available in
> upstream, hence add them once available.
>
> Signed-off-by: Gov
Hi Govind,
On 26-11-18, 22:28, Govind Singh wrote:
> On 2018-11-26 20:14, Vinod Koul wrote:
> > On 26-11-18, 19:51, Govind Singh wrote:
> > Lastly, I am not sure, but should the wifi node be always enabled?
> > Should it not be enabled in the board dts file? Bjorn..?
>
On 25-11-18, 22:53, Masahiro Yamada wrote:
> On Sat, Nov 24, 2018 at 11:16 PM Vinod Koul wrote:
> >
> > On 12-10-18, 01:41, Masahiro Yamada wrote:
> > > 1/2: DT-binding
> > > 2/2: driver
> >
> > Applied this series, thanks
>
>
> Thanks.
&g
om/qcs404-evb.dtsi
> index 0767389c68c1..36905524b0ff 100644
> --- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
> @@ -310,6 +310,10 @@
> status = "okay";
> };
>
> +&wifi {
> + status = "okay&quo
On 27-11-18, 17:06, Richard Genoud wrote:
> The leak was found when opening/closing a serial port a great number of
> time, increasing kmalloc-32 in slabinfo.
>
> Each time the port was opened, dma_request_slave_channel() was called.
> Then, in at_dma_xlate(), atslave was allocated with devm_kzall
On 18-11-18, 12:01, Bjorn Andersson wrote:
> This finalizes the definition of the BLSP UART, I2C and SPI devices found in
> the QCS404 SoC.
Reviewed-by: Vinod Koul
--
~Vinod
On 27-11-18, 17:06, Richard Genoud wrote:
> of_dma_controller_free() was not called on module onloading.
> This lead to a soft lockup:
> watchdog: BUG: soft lockup - CPU#0 stuck for 23s!
> Modules linked in: at_hdmac [last unloaded: at_hdmac]
> when of_dma_request_slave_channel() tried to call ofdm
dec support should be trivial w.r.t qdsp6 side, however
> there are other dependencies like compress UAPI header changes and
> FastRPC which are being worked in parallel. Once ready will post them!
Thanks Srini, with this we will have compress support upstream for a
public board.
Acked-by: Vinod Koul
--
~Vinod
On 01-10-18, 11:51, Vinod Koul wrote:
> This adds prng-ee nodes for msm8996 and sdm845
Ping Andy, would appreciate if you can pick these up.
Thanks
>
> changes in v6:
> - Fix comments given by Stan
>
> changes in v5:
> - Add more description in patch logs
>
> c
On 15-11-18, 11:20, Andy Gross wrote:
> On Thu, Nov 15, 2018 at 09:15:18AM +0530, Vinod Koul wrote:
> > On 01-10-18, 11:51, Vinod Koul wrote:
> > > This adds prng-ee nodes for msm8996 and sdm845
> >
> > Ping Andy, would appreciate if you can pick these up.
>
&
On 27-10-18, 15:34, Julia Lawall wrote:
> The snd_soc_dai_ops structures are only stored in the ops field of a
> snd_soc_dai_driver structure, so make the snd_soc_dai_ops structures
> const as well.
Applied, thanks
--
~Vinod
On 03-12-18, 17:49, Dan Carpenter wrote:
> We recently moved the test size tests around but it means we need to
> adjust the error handling as well or we leak the "pq_coefs" memory. I
> updated the label name to reflect that we're freeing coefs.
Applied, thanks
--
~Vinod
On 06-11-18, 03:40, Robin Gong wrote:
> This patch set to correct dma pool used in the commit fe5b85c656bc
> ("dmaengine: imx-sdma: alloclate bd memory from dma pool")
> because all bds should be contiguous in memory in multi bds case
> for sdma, but dma pool can't statify it and cause transfer fai
On 30-11-18, 10:42, Yangtao Li wrote:
> We already have the DEFINE_SHOW_ATTRIBUTE,There is no need to define
> such a macro,so remove DBGFS_FUNC_DECL.Also use macro to simplify some
> code.
Spaces after full stop and comma please
>
> Signed-off-by: Yangtao Li
> ---
> drivers/dma/amba-pl08x.c
On 06-11-18, 13:01, Baolin Wang wrote:
> This patchset removes the direction usage from struct dma_slave_config,
> and add one new field to save the direction. It also fixes some issues
> for link-list transfer. Moreover this patchset adds new 2-stage transfer
> support for our DMA.
Applied, thank
On 05-12-18, 23:49, Frank Lee wrote:
> On Wed, Dec 5, 2018 at 4:27 PM Vinod Koul wrote:
> >
> > On 30-11-18, 10:42, Yangtao Li wrote:
> > > We already have the DEFINE_SHOW_ATTRIBUTE,There is no need to define
> > > such a macro,so remove DBGFS_FUNC_DECL.Also use
Hi Greg,
On 05-12-18, 11:03, Greg Kroah-Hartman wrote:
> On Wed, Dec 05, 2018 at 04:42:56PM +0800, Long Cheng wrote:
> > In Mediatek SOCs, the uart can support DMA function.
> > Base on DMA engine formwork, we add the DMA code to support uart. And put
> > the code under drivers/dma.
> >
> > This
Hi Linus,
Here is another PULL request for dmaengine. We got bunch of fixes early
this week and all are tagged to stable. Hope this is last fix for this
cycle.
Please pull to receive fixes for imx-sdma, cppi and dw controllers.
The following changes since commit 2595646791c319cadfdbf271563aac97d
From: Srinivas Kandagatla
gpll0_out_main parent is cxo so fix it.
Fixes: 652f1813c113 ("clk: qcom: gcc: Add global clock controller driver for
QCS404")
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Vinod Koul
---
drivers/clk/qcom/gcc-qcs404.c | 2 +-
1 file changed, 1 inser
From: Srinivas Kandagatla
gpll0_out_main parent is cxo so fix it.
Fixes: 652f1813c113 ("clk: qcom: gcc: Add global clock controller driver for
QCS404")
Signed-off-by: Srinivas Kandagatla
Reviewed-by: Bjorn Andersson
Signed-off-by: Vinod Koul
---
v2: add qc404 in title and rev
Hi Linus,
Here is the pull request for v4.20-rc5. It contains two fixes (cced
stable) to fix serial dma memory leak on at_hdmac dma
The following changes since commit 651022382c7f8da46cb4872a545ee1da6d097d2a:
Linux 4.20-rc1 (2018-11-04 15:37:52 -0800)
are available in the Git repository at:
On 29-11-18, 23:34, Bjorn Andersson wrote:
> The pshold block is used to drive pshold towards the PMIC, which is used
> to trigger a configurable event, such as reboot or poweroff of the
> QCS404 platform. Add the necessary node to enable this functionality.
Reviewed-by: Vinod Koul
On 08-11-18, 15:45, Rob Herring wrote:
> > +/ {
> > + interrupt-parent = <&intc>;
> > +
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + chosen { };
> > +
> > + clocks {
> > + xo_board: xo_board {
>
> Build your dtbs with "W=12" and fix a
On 08-11-18, 15:42, Rob Herring wrote:
> On Thu, Nov 8, 2018 at 12:41 PM Vinod Koul wrote:
> >
> > Add the GPIOs present on PMS405 chip.
> >
> > Signed-off-by: Vinod Koul
> > ---
> > arch/arm64/boot/dts/qcom/pms405.dtsi | 19 +++
> >
On 08-11-18, 15:04, Shawn Guo wrote:
> From: Sriharsha Allenki
>
> It adds bindings for Synopsys 28nm femto phy controller that supports
> LS/FS/HS usb connectivity on Qualcomm chipsets.
>
> Signed-off-by: Sriharsha Allenki
> Signed-off-by: Anu Ramanathan
> Signed-off-by: Bjorn Andersson
> Si
On 08-11-18, 15:04, Shawn Guo wrote:
> +static int qcom_snps_hsphy_config_regulators(struct hsphy_priv *priv, int
> high)
> +{
> + int min, ret, i;
> +
> + min = high ? 1 : 0; /* low or none? */
> +
> + for (i = 0; i < VREG_NUM; i++) {
> + ret = regulator_set_voltage(priv->
From: Bjorn Andersson
Enable GCC and pin control configs to make it possible to boot the
QCS404 EVBs.
Signed-off-by: Bjorn Andersson
Signed-off-by: Vinod Koul
---
arch/arm64/configs/defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64
From: Bjorn Andersson
Enable remoteproc configs to boot the remoteprocs on QC chipsets. These
are common configs and not specific to a specific SoC so should be enabled
across the board.
Signed-off-by: Bjorn Andersson
Signed-off-by: Vinod Koul
---
arch/arm64/configs/defconfig | 6 ++
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