CPU frequency scaling (governor) issue (acpi-cpufreq)

2018-01-06 Thread U.Mutlu
never goes above 2.1 GHz. Is this a kernel issue, or is it something else? (Btw, I don't use any external program to manage this, so I assume it's managed by the kernel). I would like keep the "ondemand", but it of course should also use the max_freq when needed. Kernel: 4.12.0 Thx U.Mutlu

Re: x86/MCE: drop bogus const modifier from AMD's bank4_names()

2015-01-23 Thread U.Mutlu
Jan Beulich wrote, On 01/23/2015 09:32 AM: -static const char * const bank4_names(struct threshold_block *b) +static const char *bank4_names(const struct threshold_block *b) There is a big difference in the return type, cf. below. Of course, if possible, the more const the better. Borislav Pe

Re: [RFC PATCH v2 RESEND] drivers: ata: ahci_sunxi: Increased SATA/AHCI DMA TX/RX FIFOs

2019-05-13 Thread U.Mutlu
Hans de Goede wrote on 05/13/2019 09:44 AM: On 12-05-19 22:59, Uenal Mutlu wrote: Increasing the SATA/AHCI DMA TX/RX FIFOs (P0DMACR.TXTS and .RXTS, ie. TX_TRANSACTION_SIZE and RX_TRANSACTION_SIZE) from default 0x0 each to 0x3 each, gives a write performance boost of 120 MiB/s to 132 MiB/s from l

Re: [RFC PATCH v2 RESEND] drivers: ata: ahci_sunxi: Increased SATA/AHCI DMA TX/RX FIFOs

2019-05-13 Thread U.Mutlu
Maxime Ripard wrote on 05/13/2019 11:59 AM: On Sun, May 12, 2019 at 10:59:54PM +0200, Uenal Mutlu wrote: Increasing the SATA/AHCI DMA TX/RX FIFOs (P0DMACR.TXTS and .RXTS, ie. TX_TRANSACTION_SIZE and RX_TRANSACTION_SIZE) from default 0x0 each to 0x3 each, gives a write performance boost of 120 Mi

BUG: Internal error: Oops: 17 [#1] SMP / _raw_spin_lock()

2019-04-14 Thread U.Mutlu
Hi, while issuing the command "dd if=/dev/zero of=test2 bs=8k count=64k conv=sync" in /tmp3 on the rootfs (/dev/sda1; a SSD drive), the system sometime crashes (maybe in 5% of the cases) The device is a Banana Pi using Allwinner A20 SoC (sunxi/sun7i/ARM), the kernel in use is the stock 5.0.5 ker