Hi Kukjin,
On Saturday 28 of September 2013 19:49:14 Tomasz Figa wrote:
> All S3C64XX SoCs come with ARM1176JZF-s core, which fully supports
> ARMv6K extensions. This patch lets the kernel use them on S3C6410 by
> adding selection of CPU_V6K to ARCH_S3C64XX.
>
> Signed-off-
Hi Kukjin,
On Sunday 29 of September 2013 18:12:01 Tomasz Figa wrote:
> According to board schematics, for HSMMC1 a GPIO line is used to detect
> card presence, while currently it is being configured for internal card
> detect line, which is multiplexed with card detect line of HSMMC0 a
Hi Kukjin,
On Thursday 26 of September 2013 14:05:09 Kukjin Kim wrote:
> Chander Kashyap wrote:
> > Replace irq_domain_add_simple with "irq_domain_add_linear" in order to
> > use linear irq domain, and to remove hardcoded irq_base_value.
> >
> > Signed-off-by: Chander Kashyap
> > ---
> >
> > Ch
Hi Mike, Kukjin, Rafael,
On Tuesday 24 of September 2013 14:50:06 Mateusz Krawczuk wrote:
> This patch series is the new s5pv210 clock implementation
> (using common clk framework).
>
> This implementation is compatible with device tree definition and board
> files.
>
> This patch series is base
This patch extends the range of settings configurable via pinfunc API
to cover pin value as well. This allows configuration of default values
of pins.
Signed-off-by: Tomasz Figa
Acked-by: Kyungmin Park
---
Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt | 1 +
drivers/pinctrl
Hi,
On Thursday 07 of November 2013 12:12:45 Vyacheslav Tyrtov wrote:
> The series of patches represent support of Exynos 5410 SoC
>
> The Exynos 5410 is the first Samsung SoC based on bigLITTLE architecture
> Patches allow all 8 CPU cores (4 x A7 and 4 x A15) to run at the same time
>
> Patches
Hi Stephen,
On Tuesday 19 of November 2013 11:46:10 Stephen Warren wrote:
> On 11/19/2013 10:15 AM, Tomasz Figa wrote:
> > This patch extends the range of settings configurable via pinfunc API
> > to cover pin value as well. This allows configuration of default values
> > of
On Tuesday 19 of November 2013 10:59:39 Doug Anderson wrote:
> On Tue, Nov 19, 2013 at 10:46 AM, Stephen Warren
> wrote:
> > On 11/19/2013 10:15 AM, Tomasz Figa wrote:
> >> This patch extends the range of settings configurable via pinfunc API
> >> to cover
On Monday 25 of November 2013 15:23:27 Guenter Roeck wrote:
> On 11/25/2013 02:55 PM, Doug Anderson wrote:
> > On modern SoCs the watchdog timer is parented on a clock that doesn't
> > change every time we have a cpufreq change. That means we don't need
> > to constantly adjust the watchdog timer,
On Monday 25 of November 2013 15:28:29 Doug Anderson wrote:
> Guenter,
>
> On Mon, Nov 25, 2013 at 3:23 PM, Guenter Roeck wrote:
> > On 11/25/2013 02:55 PM, Doug Anderson wrote:
> >>
> >> On modern SoCs the watchdog timer is parented on a clock that doesn't
> >> change every time we have a cpufre
make sure that kernel supports
> common clock and change this to user common clock framework.
>
> Signed-off-by: Doug Anderson
> ---
> Changes in v2:
> - Use the updated config name.
>
> drivers/watchdog/s3c2410_wdt.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion
On Tuesday 26 of November 2013 00:08:31 Ben Dooks wrote:
> On Mon, Nov 25, 2013 at 02:55:37PM -0800, Doug Anderson wrote:
> > On modern SoCs the watchdog timer is parented on a clock that doesn't
> > change every time we have a cpufreq change. That means we don't need
> > to constantly adjust the
On Monday 25 of November 2013 22:01:42 Kevin Bracey wrote:
> On 25/11/2013 16:34, Linus Walleij wrote:
> > On Wed, Nov 20, 2013 at 1:02 AM, Kyungmin Park wrote:
> >> On Wed, Nov 20, 2013 at 4:16 AM, Stephen Warren
> >> wrote:
> >>> I think that last point should be addressed by having a driver t
On Monday 25 of November 2013 15:46:12 Linus Walleij wrote:
> On Wed, Nov 20, 2013 at 3:00 PM, Tomasz Figa wrote:
> > Stephen:
> >> Is the lifetime of the string "returned" by
> >> of_property_read_string_index() really so short that you must copy the
> >
Hi Naveen,
On Friday 11 of October 2013 16:56:54 Naveen Krishna Chatradhi wrote:
> The exynos5 i2c clock is based on a fixed 66 MHz peripheral clock, and
> therefore is completely independent of the cpu frequency.
> Thus, registering for a CPU freq notifier is very wasteful.
>
> This patch modife
[Fixing incorrent mail addresses and dropping the old DT ML.]
On Saturday 12 of October 2013 04:22:04 Tomasz Figa wrote:
> Hi Naveen,
>
> On Friday 11 of October 2013 16:56:54 Naveen Krishna Chatradhi wrote:
> > The exynos5 i2c clock is based on a fixed 66 MHz peripheral clock, an
On Saturday 12 of October 2013 04:28:51 Tomasz Figa wrote:
> [Fixing incorrent mail addresses and dropping the old DT ML.]
>
> On Saturday 12 of October 2013 04:22:04 Tomasz Figa wrote:
> > Hi Naveen,
> >
> > On Friday 11 of October 2013 16:56:54 Naveen Krishna Chatrad
I followed by Trusted Foundations does *not* follow the SMC
>>> calling conventions. It has nothing to do with PSCI neither and is only
>>> relevant to devices that use Trusted Foundations (like most Tegra-based
>>> retail devices).
>>>
>>> Signed
Hi Kamil,
On Monday 28 of October 2013 14:52:19 Kamil Debski wrote:
> Hi Kishon,
>
> Thank you for your review! I will answer your comments below.
[snip]
> > > +
> > > + switch (drv->cfg->cpu) {
> > > + case TYPE_EXYNOS4210:
> >
> > > + case TYPE_EXYNOS4212:
> > Lets not add such cpu checks insi
Hi Soren,
On Thursday 10 of October 2013 10:10:17 Soren Brinkmann wrote:
> In some use cases Zynq's FPGA clocks are used as static clock
> generators for IP in the FPGA part of the SOC for which no Linux driver
> exists and would control those clocks. To avoid automatic
> gating of these clocks in
Hi Soren,
On Tuesday 15 of October 2013 12:08:04 Soren Brinkmann wrote:
> Add a driver for Arasan's SDHCI controller core.
>
> Signed-off-by: Soren Brinkmann
> ---
> .../devicetree/bindings/mmc/arasan,sdhci.txt | 23 +++
> MAINTAINERS| 1 +
> dri
On Monday 28 of October 2013 14:43:35 Sören Brinkmann wrote:
> On Mon, Oct 28, 2013 at 10:13:28PM +0100, Tomasz Figa wrote:
> > Hi Soren,
> >
> > On Thursday 10 of October 2013 10:10:17 Soren Brinkmann wrote:
> > > In some use cases Zynq's FPGA clocks are used a
On Monday 28 of October 2013 14:47:38 Sören Brinkmann wrote:
> On Mon, Oct 28, 2013 at 10:16:49PM +0100, Tomasz Figa wrote:
> > Hi Soren,
> >
> > On Tuesday 15 of October 2013 12:08:04 Soren Brinkmann wrote:
> > > Add a driver for Arasan's SDHCI controller core
On Monday 28 of October 2013 01:37:34 Kumar Gala wrote:
> On Oct 27, 2013, at 11:14 AM, Sebastian Reichel wrote:
> > Add device tree support for the spi variant of wl1251
> > and document the binding.
> >
> > Signed-off-by: Sebastian Reichel
> > ---
> > .../devicetree/bindings/net/wireless/ti,wl1
> Note: The API followed by Trusted Foundations does *not* follow the
> > > SMC
> > > calling conventions. It has nothing to do with PSCI neither and is
> > > only
> > > relevant to devices that use Trusted Foundations (like most
> > > Tegra-based
&g
Hi Kukjin, Mike,
On Monday 21 of October 2013 05:16:05 Mike Turquette wrote:
> Quoting Kukjin Kim (2013-10-20 13:51:42)
> > On 10/20/13 01:03, Tomasz Figa wrote:
> > > Hi Mike, Kukjin, Rafael,
> > >
> > > On Tuesday 24 of September 2013 14:50:06 Mateusz Krawczu
Hi,
On Monday 14 of October 2013 19:08:23 Vyacheslav Tyrtov wrote:
> From: Tarek Dakhran
>
> The EXYNOS5410 clocks are statically listed and registered
> using the Samsung specific common clock helper functions.
>
> Signed-off-by: Tarek Dakhran
> Signed-off-by: Vyacheslav Tyrtov
> ---
> .../
5 files changed, 40 insertions(+)
Reviewed-by: Tomasz Figa
Best regards,
Tomasz
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00644 arch/arm/boot/dts/exynos5410.dtsi
Reviewed-by: Tomasz Figa
Best regards,
Tomasz
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On Tuesday 03 of December 2013 10:31:12 Linus Walleij wrote:
> On Tue, Nov 26, 2013 at 1:30 AM, Tomasz Figa wrote:
>
> > IMHO a way to specify a default safe state of all pins (with lowest power
> > consumption, without possibility of glitching external devices, etc.)
> >
2013/12/4 Douglas Gilbert :
> On 13-12-04 04:21 PM, Alan Stern wrote:
>>
>> On Wed, 4 Dec 2013, boris brezillon wrote:
>>
The patches look fine to me. But only the 1/3 patch fixes a bug; the
others merely change the resource management.
>>>
>>>
>>> Do you want me to split this series ?
>
Hi panchaxari,
On Thursday 12 of December 2013 10:42:32 panchaxari wrote:
> ARM_PATCH_PHYS_VIRT and AUTO_ZRELADDR have been enabled as default configs
> to S5P64X0 platforms.
>
> Introduction of PHYS_VIRT config as default would enable phy-to-virt and
> virt-to-phy translation function at boot an
On Thursday 12 of December 2013 16:33:46 Panchaxari Prasannamurthy Tumkur wrote:
> Hi Tomasz
>
> > Could you explain the purpose of this change on S5P64x0?
> >
> > This is actually quite a poor platform choice. As of today, the kernel
> > is stuck with supporting just SMDK6440/6450 boards, which a
2013/12/12 Linus Walleij :
> On Thu, Dec 12, 2013 at 10:47 AM, Tomasz Figa wrote:
>
>> This is actually quite a poor platform choice. As of today, the kernel
>> is stuck with supporting just SMDK6440/6450 boards, which are proprietary
>> development boards and it doesn
Hi Alex,
On Saturday 14 of December 2013 13:21:30 Alex Ling wrote:
> This patch adds "biu" and "ciu" clocks for exynos4412 dwmmc
> node. Without this patch, dwmmc host driver will skip enabling the
> two clocks and it will break dwmmc host function on exynos4412.
> Tested on FriendlyARM TINY4412 b
Hi Alex,
On Friday 15 of November 2013 21:09:29 Alex Ling wrote:
> Add a minimal board dts file for EXYNOS4412 based FriendlyARM's
> TINY4412 board. This patch including adds the node to support
> peripherals like UART, SD card on SDMMC2 port, and this patch
> adds GPIO connected LEDS and configur
On Sunday 15 of December 2013 22:30:13 Yadwinder Singh Brar wrote:
[snip]
> >> +
> >> + return NULL;
> >> +}
> >> +
> >> +unsigned int asv_get_volt(enum asv_type_id target_type,
> >> + unsigned int target_freq)
> >
> > Do you need this function at all
On Tuesday 17 of December 2013 11:51:36 Russell King - ARM Linux wrote:
> On Tue, Dec 17, 2013 at 12:10:22PM +0100, Thierry Reding wrote:
> > On Fri, Dec 13, 2013 at 04:57:04PM +0800, Xiubo Li wrote:
> > > +static inline u32 fsl_pwm_readl(struct fsl_pwm_chip *fpc,
> > > + const void __iomem
On Tuesday 17 of December 2013 13:45:06 Thierry Reding wrote:
> On Tue, Dec 17, 2013 at 01:00:10PM +0100, Tomasz Figa wrote:
> > On Tuesday 17 of December 2013 11:51:36 Russell King - ARM Linux wrote:
> > > On Tue, Dec 17, 2013 at 12:10:22PM +0100, Thierry Reding wrote:
>
On Tuesday 17 of December 2013 13:04:35 Russell King - ARM Linux wrote:
> On Tue, Dec 17, 2013 at 01:54:35PM +0100, Tomasz Figa wrote:
> > On Tuesday 17 of December 2013 13:45:06 Thierry Reding wrote:
> > > I fail to see how that would eliminate the problem with the types. That
-assisted suspend/resume by
leveraging recently introduced suspend and resume firmware operations
and modifying existing suspend/resume paths to account for presence of
secure firmware.
Signed-off-by: Tomasz Figa
---
arch/arm/mach-exynos/Makefile | 1 +
arch/arm/mach-exynos/common.h | 4
ex A9,
- rebased on next-20140717 tag of linux-next tree.
Tomasz Figa (2):
ARM: firmware: Introduce suspend and resume operations
ARM: EXYNOS: Add support for firmware-assisted suspend/resume
Documentation/arm/firmware.txt | 28 +
arch/arm/include/asm/firmware.h
platform suspend code after waking up to restore low
level hardware state, which can't be restored in non-secure mode.
While at it, outdated version of the structure is removed from the
documentation and replaced with a reference to the header file.
Signed-off-by: Tomasz Figa
Acked-by: Alex
On 17.07.2014 17:51, Jason Cooper wrote:
> On Thu, Jul 17, 2014 at 05:40:50PM +0200, Tomasz Figa wrote:
>> Hi Jason,
>>
>> On 17.07.2014 17:32, Jason Cooper wrote:
>>> On Thu, Jul 17, 2014 at 05:23:44PM +0200, Tomasz Figa wrote:
>>>> Certain GIC imp
On Exynos SoCs it is necessary to resume operation of L2C early in
assembly code, because otherwise certain systems will crash. This patch
adds necessary code to non-secure resume handler.
Signed-off-by: Tomasz Figa
---
arch/arm/mach-exynos/common.h | 1 +
arch/arm/mach-exynos/firmware.c
This patch adds device tree nodes for L2 cache controller present on
Exynos4 SoCs.
Signed-off-by: Tomasz Figa
---
arch/arm/boot/dts/exynos4210.dtsi | 9 +
arch/arm/boot/dts/exynos4x12.dtsi | 14 ++
2 files changed, 23 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4210
.configure callbacks is provided by this patch.
Signed-off-by: Tomasz Figa
---
arch/arm/mach-exynos/firmware.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index f5e626d..554b350 100644
-by: Tomasz Figa
---
arch/arm/mm/cache-l2x0.c | 201 ++-
1 file changed, 110 insertions(+), 91 deletions(-)
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 5f2c988..385c047 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm
n in cache-l2x0.c,
- added support of overriding of prefetch settings to work around incorrect
default settings on certain Exynos4x12-based boards,
- added call to firmware to invalidate whole L2 cache before setting enable
bit in L2C control register (required by Exynos secure firmware).
Toma
.
Signed-off-by: Tomasz Figa
---
Documentation/devicetree/bindings/arm/l2cc.txt | 10 +++
arch/arm/mm/cache-l2x0.c | 39 ++
2 files changed, 49 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt
b/Documentation/devicetree/bindings
earlier. This patch fixes this by making the assignment
conditional, depending on whether current .write_sec callback is NULL.
Signed-off-by: Tomasz Figa
---
arch/arm/kernel/irq.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
parameters. This patch adds such.
Signed-off-by: Tomasz Figa
---
arch/arm/include/asm/outercache.h | 3 +++
arch/arm/mm/cache-l2x0.c | 5 +
2 files changed, 8 insertions(+)
diff --git a/arch/arm/include/asm/outercache.h
b/arch/arm/include/asm/outercache.h
index 891a56b..563b92f
Hi Krzysztof,
On 18.07.2014 11:53, Krzysztof Kozlowski wrote:
> Enable ARMCLK down and up features on Exynos4212 and 4412 SoCs. The
> frequency of ARMCLK will be reduced upon entering idle mode (WFI or
> WFE). Additionally upon exiting from idle mode the divider for ARMCLK
> will be brought back
Hi Kukjin,
On 18.07.2014 21:38, Kukjin Kim wrote:
> On 07/16/14 09:56, Tomasz Figa wrote:
>> On 16.07.2014 02:53, Kukjin Kim wrote:
>>> Kukjin Kim wrote:
>>>>
>>>> On 07/05/14 02:48, Tomasz Figa wrote:
>>>>> Move debug-macro.S from mach/in
Hi,
On 15.07.2014 16:26, Tomasz Figa wrote:
> Forgot to CC Daniel and linux-pm. Sorry for the noise.
>
> On 15.07.2014 16:24, Tomasz Figa wrote:
>> Due to recent consolidation of Exynos suspend and cpuidle code, some
>> parts of suspend and resume sequences are executed
On 16.07.2014 01:59, Tomasz Figa wrote:
> On 15.07.2014 20:02, Kukjin Kim wrote:
>> On 07/08/14 22:54, Tomasz Figa wrote:
>>> On 08.07.2014 15:48, Kukjin Kim wrote:
>>>> Tomasz Figa wrote:
>>>>>
>>>>> Due to recently merged patches an
x126C 0x100>, <0x10020718 0x4>;
>> interrupts = <0 137 0>;
>> clock-names = "adc", "sclk";
>> clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
>&g
a driver.
Signed-off-by: Tomasz Figa
Reviewed-by: Stephen Boyd
Reviewed-by: Philipp Zabel
[on i.MX6 GK802]
Tested-by: Philipp Zabel
Reviewed-by: Mark Brown
Reviewed-by: Ulf Hansson
---
drivers/base/dd.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/base
-specific power domain
bindings is provided, but for now the new code is not compiled when
CONFIG_ARCH_EXYNOS is selected to avoid collision with legacy code. This
will change as soon as Exynos power domain code gets converted to use
the generic framework in further patch.
Signed-off-by: Tomasz Figa
rect hooks in driver core to make power domain
support independent from specific bus type and allow error handling.
Tomasz Figa (3):
base: power: Add generic OF-based power domain look-up
drivercore: Bind/unbind power domain on probe/remove
ARM: exynos: Move to generic power domai
This patch moves Exynos power domain code to use the new generic power
domain look-up framework introduced by previous patch, allowing the new
code to be compiled with CONFIG_ARCH_EXYNOS selected as well.
Signed-off-by: Tomasz Figa
---
.../bindings/arm/exynos/power_domain.txt | 12
Hi Tarek,
On 14.04.2014 13:59, Tarek Dakhran wrote:
On 04/14/2014 03:03 PM, Arnd Bergmann wrote:
On Monday 14 April 2014 11:17:38 Tarek Dakhran wrote:
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -159,6 +159,15 @@ static struct map_desc exynos5250_iodesc[]
__initd
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Seems reasonable.
Reviewed-by: Tomasz Figa
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Tomasz
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Hi Humberto,
Please see my comments inline.
On 31.07.2014 13:22, Humberto Silva Naves wrote:
> Added NULL pointer checks for device_node input parameter and
> for the samsung_clk_provider context returned by samsung_clk_init.
> Even though the *current* samsung_clk_init function never returns
> a
Hi Humberto,
Please see my comments inline.
On 31.07.2014 13:22, Humberto Silva Naves wrote:
> The different register groups (SRC, DIV, PLL, GATE, etc) are
> now separated by a blank line, and within the same group, the
> definitions are ordered by address. This is done to reduce the
> chances of
Hi Humberto,
You can find my comments inline.
On 31.07.2014 13:22, Humberto Silva Naves wrote:
> This implements the fixed rate clocks generated either inside or
> outside the SoC. It also adds a dt-binding constant for the
> sclk_hdmiphy clock, which shall be later used by other drivers,
> such
Hi Humberto,
You can find my comments inline.
On 31.07.2014 13:22, Humberto Silva Naves wrote:
> Added the remaining PLL clocks, and also added the configuration
> tables with the PLL coefficients for the supported frequencies.
> These frequency tables are only installed when a 24MHz clock is
> s
Hi Humberto,
On 31.07.2014 13:22, Humberto Silva Naves wrote:
> This patch implements all the necessary code that handles register
> saving and restoring during a suspend/resume cycle. To make this
> possible, the local variable reg_base from the function
> exynos5410_clk_init was changed to globa
z
>
> Best,
> Humberto
>
> On Thu, Jul 31, 2014 at 2:34 PM, Tomasz Figa wrote:
>> Hi Humberto,
>>
>> Please see my comments inline.
>>
>> On 31.07.2014 13:22, Humberto Silva Naves wrote:
>>> Added NULL pointer checks for device_node inpu
ant to Exynos5410, which just
uses the generic fixed rate binding and has the thing done right from
the start.
Best regards,
Tomasz
>
> Best,
> Humberto
>
> On Thu, Jul 31, 2014 at 2:53 PM, Tomasz Figa wrote:
>> Hi Humberto,
>>
>> You can find my comments inline.
On 31.07.2014 15:37, Humberto Naves wrote:
> Hi Tomasz,
>
> I remember checking these rates on my calculator. You might notice the
> odd frequency of 45158401Hz (no pun intended) in the EPLL clock. This
> particular clock frequency was giving me a big headache in a previous
> project, since it was
From: Tomasz Figa
Hi Mike,
The following changes since commit bdfcdf18c380a3c376b42709a89eb2cc52e95ae0:
Merge branch 'v3.16-samsung-clk-fixes-1' into samsung-clk-next (2014-06-30
15:06:43 +0200)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel
Hi Andreas,
Sorry for joining the party a bit late, but there were patches with less
people involved so I preferred to review them first.
You can find my comments inline.
On 31.07.2014 18:08, Andreas Färber wrote:
> Adds initial support for the HP Chromebook 11.
[snip]
> + gpio-keys {
> +
Hi Kukjin,
On 17.07.2014 17:56, Tomasz Figa wrote:
> On Exynos-based boards running secure firmware the sequence of low level
> operations to enter and leave system-wide sleep mode is different than
> on those without the firmware. Namely:
> - CP15 power control and diagnostic regi
On 17.07.2014 18:38, Tomasz Figa wrote:
> This series intends to add support for L2 cache on Exynos4 SoCs on boards
> running under secure firmware, which requires certain initialization steps
> to be done with help of firmware, as selected registers are writable only
> from
Andreas,
Please see my comments inline.
On 31.07.2014 18:08, Andreas Färber wrote:
> Use the new style of referencing inherited nodes and use symbolic names.
>
> Suggested-by: Doug Anderson
> Signed-off-by: Andreas Färber
[snip]
> -
> usb@1211 {
> - samsung,vbus-gpio =
(Doug Anderson)
> Redundant with Jaehoon Chung's general slot@0 deprecation,
> in case that hits the tree earlier.
>
> arch/arm/boot/dts/exynos5250-snow.dts | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
Reviewed-by: Tomasz Figa
Best regards
Please see my comments inline.
On 31.07.2014 18:08, Andreas Färber wrote:
> The remaining common ChromeOS pieces are fairly minor.
>
For people that might stumble upon this patch in future, it would be
nice to specify the reason for this change.
Otherwise feel free to add:
Reviewed-by:
Andreas,
On 31.07.2014 21:20, Andreas Färber wrote:
> Am 31.07.2014 21:05, schrieb Tomasz Figa:
>> On 31.07.2014 18:08, Andreas Färber wrote:
>>> Adds initial support for the HP Chromebook 11.
>>
>> [snip]
>>
>>> + gpio-keys {
>>> +
Humberto,
On 31.07.2014 23:01, Humberto Naves wrote:
> Hi,
>
> On Thu, Jul 31, 2014 at 1:45 PM, Sylwester Nawrocki
> wrote:
>> Can you explain what is rationale behind this change ? Is it related to
>> suspend/resume ordering ?
>
> I had forgotten, but now remember the reason why I did this. If
On 31.07.2014 22:36, Andreas Färber wrote:
> Am 31.07.2014 21:05, schrieb Tomasz Figa:
>>> + };
>>> +
>>> + fixed-rate-clocks {
>>> + xxti {
>>> + compatible = "samsung,clock-xxti&
Humberto,
[dropping few addresses from Cc as this topic is rather irrelevant for
them and adding Mike and Sylwester]
On 31.07.2014 23:19, Humberto Naves wrote:
> Hi,
>
> On Thu, Jul 31, 2014 at 5:19 PM, Tomasz Figa wrote:
>>
>> I'm not sure I get the idea of the fie
;
> This patch was suggested by Tomasz Figa in
> http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg34982.html
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On 01.08.2014 01:17, Andreas Färber wrote:
> Am 31.07.2014 21:40, schrieb Tomasz Figa:
>> On 31.07.2014 21:20, Andreas Färber wrote:
>>> Am 31.07.2014 21:05, schrieb Tomasz Figa:
>>>> On 31.07.2014 18:08, Andreas Färber wrote:
[snip]
>>>>&
From: Tomasz Figa
Due to recent consolidation of Exynos suspend and cpuidle code, some
parts of suspend and resume sequences are executed two times, once from
exynos_pm_syscore_ops and then from exynos_cpu_pm_notifier() and thus it
breaks suspend, at least on Exynos4-based boards. In addition
On 18.09.2014 21:29, Paul Bolle wrote:
> On Thu, 2014-09-04 at 12:16 +0200, Paul Bolle wrote:
>> On Wed, 2014-07-16 at 14:58 +0200, Tomasz Figa wrote:
>>> I had two patches fixing those, but apparently this was lost in action.
>>> The correct solution is s/PLAT_S5P/AR
emoved the Kconfig symbol S5P_GPIO_DRVSTR. It didn't remove one check
> for the related macro. Remove that check and the dead code it hides.
>
> Signed-off-by: Paul Bolle
Thanks for the patch.
Reviewed-by: Tomasz Figa
Best regards,
Tomasz
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Hi Pankaj,
Please see my comments inline.
On 19.09.2014 15:06, Pankaj Dubey wrote:
> Currently a syscon entity can be only registered directly through a
> platform device that binds to a dedicated syscon driver. However in
> certain use cases it is desirable to make a device used with another
> d
On 19.09.2014 17:11, Tomasz Figa wrote:
>> +
>> +if (!of_device_is_available(np) ||
>
> Wouldn't it be enough to simply call of_find_device_by_node(np) and if
> it fails then instead create a dummy device?
>
>> +of_node_test_and_set_
Hi Alim,
Please see my comments inline.
On 16.09.2014 13:32, Alim Akhtar wrote:
> Add earlycon support for the samsung serial port. This allows enabling
> the samsung serial port for console when early_params are parse and processed.
>
> Signed-off-by: Alim Akhtar
> ---
> Documentation/kernel-
important fix to v3.17-rcX. Without it support for Samsung
> S5PV210 SoCs is not functional.
>
> Mike, could you take it to the fixes branch?
Acked-by: Tomasz Figa
Mike, since it seems like this is the only fix to be queued for next -rc
release, I think it would be reasonable if
On 21.09.2014 16:36, Alim Akhtar wrote:
> Hi Tomasz,
> Thanks for your valuable feedback on this patch.
You're welcome.
>>> diff --git a/Documentation/kernel-parameters.txt
>>> b/Documentation/kernel-parameters.txt
>>> index 5ae8608..e01c0e5 100644
>>> --- a/Documentation/kernel-parameters.txt
>
On 22.09.2014 01:10, Alim Akhtar wrote:
[snip]
>>> As you said there is no support for ioremap on ARM, so this is not
>>> tested on ARM.
>>
>> Don't forget that this driver is primarily targeted for ARM platforms
>> (versus just one ARM64-based Exynos7), so either this feature should be
>> clearl
Hi Kevin,
On 14.01.2014 16:42, Kevin Hilman wrote:
Tomasz Figa writes:
This patch introduces generic code to perform power domain look-up using
device tree and automatically bind devices to their power domains.
Generic device tree binding is introduced to specify power domains of
devices in
Hi Lorenzo,
On 16.01.2014 17:34, Lorenzo Pieralisi wrote:
Hi Tomasz,
thank you for posting this series. I would like to use the DT bindings
for power domains in the bindings for C-states on ARM:
http://comments.gmane.org/gmane.linux.power-management.general/41012
and in particular link a give
On 02.09.2014 15:21, Krzysztof Kozlowski wrote:
> Add clock provider for clocks in DMC domain including EPLL and BPLL. The
> DMC clocks are necessary for Exynos3 devfreq driver.
>
> The DMC clock domain uses different address space (0x105C) than
> standard clock domain (0x1003 - 0x1005
On 09.09.2014 14:14, Krzysztof Kozlowski wrote:
> On 05.09.2014 13:54, Pankaj Dubey wrote:
>> As per Exynos3250 user manual mmc0/1 mux selection has 4 bit wide.
>>
>> Signed-off-by: Pankaj Dubey
>> ---
>> drivers/clk/samsung/clk-exynos3250.c |4 ++--
>> 1 file changed, 2 insertions(+), 2 de
On 09.09.2014 14:14, Krzysztof Kozlowski wrote:
> On 09.09.2014 13:54, Pankaj Dubey wrote:
>> Update shift and width field of div_spi0_isp clock as per Exynos3250
>> user manual.
>>
>> Signed-off-by: Pankaj Dubey
>> ---
>> drivers/clk/samsung/clk-exynos3250.c |2 +-
>> 1 file changed, 1 ins
On 09.09.2014 14:24, Krzysztof Kozłowski wrote:
> On 06.09.2014 15:03, Pankaj Dubey wrote:
>> As per user manual of Exynos3250 SRC_CAM can select
>> div_cam_blk_320 if it's value is 0xC, so placing
>> div_cam_blk_320 at proper index in parent list of mout_cam_blk.
>>
>> Signed-off-by: Pankaj Dubey
On 22.09.2014 06:55, Pankaj Dubey wrote:
> Hi Tomasz,
>
> Will you please take this patch and following three Exynos3250 clock fixes
> in your tree.
>
> 1: clk: samsung: exynos3250: fix width field of mout_mmc0/1
>https://lkml.org/lkml/2014/9/5/265
> 2: clk: samsung: exynos3250: fix width and
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