The Kona SDHCI block requires a clock that must be specified in the
device tree. Update the documentation to reflect this requirement.
Signed-off-by: Tim Kryger
Reviewed-by: Matt Porter
---
Documentation/devicetree/bindings/mmc/kona-sdhci.txt | 4
1 file changed, 4 insertions(+)
diff
references to the relevant clocks following the
common clock binding.
Signed-off-by: Tim Kryger
Reviewed-by: Markus Mayer
Reviewed-by: Matt Porter
---
arch/arm/boot/dts/bcm11351.dtsi | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arc
Specify the external clock label in the timer node.
Signed-off-by: Tim Kryger
Reviewed-by: Markus Mayer
Reviewed-by: Matt Porter
---
arch/arm/boot/dts/bcm11351.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351
iver patch
Changes in v2:
- Renamed bsc4_clk to pmu_bsc_clk
Tim Kryger (8):
ARM: dts: Declare clocks as fixed on bcm11351
ARM: dts: Specify clocks for UARTs on bcm11351
Documentation: dt: kona-sdhci: Add clocks property
ARM: dts: Specify clocks for SDHCIs on bcm11351
mmc: sdhci-bcm
The frequency for the Kona timer can either be specified through the
device tree or determined by checking the rate of the clock specified
in the device tree. Update the documentation to reflect both ways.
Signed-off-by: Tim Kryger
Reviewed-by: Matt Porter
---
Documentation/devicetree
Declare clocks that are enabled and configured by bootloaders as fixed
rate clocks in the DTS such that device drivers may use standard clock
function calls.
Signed-off-by: Tim Kryger
Reviewed-by: Markus Mayer
Reviewed-by: Matt Porter
---
arch/arm/boot/dts/bcm11351.dtsi | 97
Enable the external clock needed by the host controller during the
probe and disable it during the remove.
Signed-off-by: Tim Kryger
Reviewed-by: Markus Mayer
Reviewed-by: Matt Porter
---
drivers/mmc/host/sdhci-bcm-kona.c | 37 +++--
1 file changed, 35
The board schematic states that the "SD_CARD_DET_N gets pulled to GND
when card is inserted" so the polarity has been updated to active low.
Polarity is now specified with a GPIO define instead of a magic number.
Signed-off-by: Tim Kryger
Reviewed-by: Matt Porter
---
arch/ar
Since there may be other clocksources available, this driver should not
trigger a panic simply because it can not determine the frequency of an
external clock. This change refactors the driver to allow a warning to
be printed in this case instead.
Signed-off-by: Tim Kryger
Reviewed-by: Markus
The sdio1 interface pins are routed to an unpopulated daughter card
connector on the bcm28155-ap board. Thus there is no need to mark
this interface as enabled.
Signed-off-by: Tim Kryger
Reviewed-by: Matt Porter
---
arch/arm/boot/dts/bcm28155-ap.dts | 5 -
1 file changed, 5 deletions
Now that CONFIG_OABI_COMPAT is off by default, remove the explicit
disabling of this feature.
Signed-off-by: Tim Kryger
Reviewed-by: Markus Mayer
---
arch/arm/configs/bcm_defconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/configs/bcm_defconfig b/arch/arm/configs
Do not build the Pseudo Random Number Generation for Cryptographic
modules since it is not currently being used for this platform.
Signed-off-by: Tim Kryger
Reviewed-by: Markus Mayer
---
arch/arm/configs/bcm_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs
This series includes two minor updates to the bcm_defconfig that
removes an option that wasn't being used and eliminates a line that
is now unnecessary due to a change in the defaults for that option.
Tim Kryger (2):
ARM: bcm_defconfig: CONFIG_OABI_COMPAT default off
ARM: bcm_defconfig:
The bootloaders used with Broadcom mobile SoCs are capable of handling
a device tree separately from the zImage so there is no need for this
option to be enabled.
Signed-off-by: Tim Kryger
Reviewed-by: Markus Mayer
---
arch/arm/configs/bcm_defconfig | 1 -
1 file changed, 1 deletion(-)
diff
Enable all available i2c busses.
Signed-off-by: Tim Kryger
Reviewed-by: Christian Daudt
Reviewed-by: Matt Porter
Reviewed-by: Markus Mayer
---
arch/arm/boot/dts/bcm28155-ap.dts | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/bcm28155-ap.dts
b/arch
Add the DTS nodes for all the i2c busses in the SoC.
Signed-off-by: Tim Kryger
Reviewed-by: Christian Daudt
Reviewed-by: Matt Porter
Reviewed-by: Markus Mayer
---
arch/arm/boot/dts/bcm11351.dtsi | 40
1 file changed, 40 insertions(+)
diff --git a
This series enables all the I2C busses on the bcm28155-ap board.
These patches appeared in another series that was partially accepted.
https://lkml.org/lkml/2013/11/14/517
It depends on: https://lkml.org/lkml/2013/12/5/508
Tim Kryger (2):
ARM: dts: bcm281xx: Add i2c busses
ARM: dts
On Fri, Dec 6, 2013 at 3:51 PM, James Hogan wrote:
> On Friday 06 December 2013 23:29:02 James Hogan wrote:
>> So it looks like the LCR does always change immediately for me in this case
>> (obviously it hasn't hit the BUSY case), but not all the bits can be
>> written. In particular bit 5 and bit
There is no need for regulator consumers to include special logic for
fixed voltage regulators as they support regulator_set_voltage() just
like their non-fixed regulator counterparts.
Signed-off-by: Tim Kryger
---
Changes in v2:
- Remove query of the current voltage, just set the desired
On Thu, Aug 14, 2014 at 5:39 AM, Javier Martinez Canillas
wrote:
> The operation conditions register (OCR) stores the voltage
> profile of the card, however the list of possible voltages
> is restricted by the voltage range supported by the supply
> used as VCC/VDD. So in mmc_vddrange_to_ocrmask()
e its voltage?
It seems odd to make callers be the ones to handle this subtlety.
Thanks,
Tim Kryger
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On Fri, Aug 15, 2014 at 12:48 AM, Javier Martinez Canillas
wrote:
> Hello Tim,
>
> On 08/15/2014 07:36 AM, Tim Kryger wrote:
>> On Thu, Aug 14, 2014 at 8:19 AM, Mark Brown wrote:
>>
>>> Right, there's two things going on here. One is that as you describe we
&
On Fri, Aug 15, 2014 at 3:29 PM, Mark Brown wrote:
> On Fri, Aug 15, 2014 at 07:19:41AM -0700, Tim Kryger wrote:
>
>> That is a little different from my suggestion where the constraints
>> check is skipped when the regulator output is fixed. It effectively
>> does thi
On Wed, Nov 5, 2014 at 12:10 AM, Alexandre Courbot wrote:
> On 11/05/2014 12:31 AM, Tim Kryger wrote:
>>
>> On Tue, Nov 4, 2014 at 1:00 AM, Alexandre Courbot
>> wrote:
>>>
>>> Hi Tim, thanks for your reply!
>>>
>>> On 11/04/2014 02:28 PM,
patch you proposed would break Exynos4210 so I don't think it is
appropriate.
Do you understand why this code block is executed on your hardware? I
wouldn't expect it.
Can you provide the relevant parts of the log before the problem occurs?
Thanks,
Tim Kryger
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On Tue, Nov 4, 2014 at 1:00 AM, Alexandre Courbot wrote:
> Hi Tim, thanks for your reply!
>
> On 11/04/2014 02:28 PM, Tim Kryger wrote:
>>
>> On Mon, Nov 3, 2014 at 7:05 PM, Alexandre Courbot
>> wrote:
>>>
>>> Hi guys,
>>>
>>> On
On Fri, Nov 28, 2014 at 3:47 PM, Arun Ramamurthy
wrote:
>
>
> On 14-11-25 09:51 PM, Tim Kryger wrote:
>>
>> On Tue, Nov 25, 2014 at 11:40 AM, Scott Branden
>> wrote:
>>>
>>> From: Arun Ramamurthy
>>>
>>> The probe routine unnec
On Fri, Nov 28, 2014 at 3:48 PM, Arun Ramamurthy
wrote:
>
>
> On 14-11-25 10:22 PM, Tim Kryger wrote:
>>
>> On Tue, Nov 25, 2014 at 11:40 AM, Scott Branden
>> wrote:
>>>
>>> From: Arun Ramamurthy
>>>
>>> The pwm core code requ
On Fri, Nov 28, 2014 at 3:49 PM, Arun Ramamurthy
wrote:
>
>
> On 14-11-25 11:29 PM, Tim Kryger wrote:
>>
>> On Tue, Nov 25, 2014 at 11:40 AM, Scott Branden
>> wrote:
>>>
>>> From: Arun Ramamurthy
>>>
>>> - Added helper functions to
On Fri, Nov 28, 2014 at 5:19 PM, Arun Ramamurthy
wrote:
>
>
> On 14-11-28 05:08 PM, Tim Kryger wrote:
>>
>> On Fri, Nov 28, 2014 at 3:47 PM, Arun Ramamurthy
>> wrote:
>>>
>>>
>>>
>>> On 14-11-25 09:51 PM, Tim Kryger wrote:
On Mon, Dec 1, 2014 at 11:37 AM, Arun Ramamurthy
wrote:
>
>
> On 14-11-28 06:30 PM, Tim Kryger wrote:
>>
>> On Fri, Nov 28, 2014 at 3:49 PM, Arun Ramamurthy
>> wrote:
>>>
>>>
>>>
>>> On 14-11-25 11:29 PM, Tim Kryger wrote:
On Tue, Nov 25, 2014 at 11:40 AM, Scott Branden wrote:
> From: Arun Ramamurthy
>
> The probe routine unnecessarily sets the smooth type and polarity for
> all channels. This causes the channel for the speaker to click at the same
> time the backlight turns on. The smooth type and polarity should
On Tue, Nov 25, 2014 at 11:40 AM, Scott Branden wrote:
> From: Arun Ramamurthy
>
> The pwm core code requires a separate call for enabling the channel
> and hence the driver does not need to set pwm_trigger after a
> polarity change
The framework does restrict when polarity changes can occur but
On Tue, Nov 25, 2014 at 11:40 AM, Scott Branden wrote:
> From: Arun Ramamurthy
>
> - Added helper functions to set and clear smooth and trigger bits
> - Added 400ns delays when clearing and setting trigger bit as requied
> by spec
> - Added helper function to write prescale and other settings
>
On Thu, May 21, 2015 at 3:50 PM, Jonathan Richardson
wrote:
> If this is correct - polarity changes affect the output signal
> immediately, then I can change our driver. Could you confirm first this
> is what we want?
Yes. This seems best. Please do.
-Tim
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On Tue, May 12, 2015 at 4:28 PM, Jonathan Richardson
wrote:
> The polarity procedure no longer applies the settings to change the
> output signal because it can't be called when the pwm is enabled anyway.
> The polarity is only updated in the control register. The correct
> polarity will be appli
On Fri, Apr 10, 2015 at 11:58 AM, Jonathan Richardson
wrote:
> The polarity procedure no longer applies the settings to change the
> output signal because it can't be called when the pwm is enabled anyway.
> The polarity is only updated in the control register. The correct
> polarity will be appl
On Wed, Dec 17, 2014 at 10:46 AM, Jonathan Richardson
wrote:
> The config procedure doesn't follow the spec which periodically results
> in failing to enable the output signal. This happens one in ten or
> twenty attempts. Following the spec and adding a 400ns delay in the
> approp
On Wed, Dec 17, 2014 at 11:57 AM, Bjorn Andersson wrote:
> I'm somewhat puzzled to what benefit 52221610d brings after bringing
> back the write of BIT(0). Is it just that we don't hit the BUG() on
> non-standard voltages?
It is to allow the use of external regulators that are capable of
supplyi
On Mon, Mar 9, 2015 at 6:32 AM, Alan Cox wrote:
>> Maybe the next release of the board we will upgrade the serial block to the
>> new version.
>> but the issue is that how we circumvent this problem in kernel?
>
> What is the official vendor workaround ?
They introduced a UART_16550_COMPATIBLE o
On Mon, Mar 9, 2015 at 8:05 AM, Alan Cox wrote:
> Ah no - I meant what is their official software workaround for existing
> parts with the bug ? Presumably they have an errata document that
> discusses this and the correct methods they recommend to avoid the
> hang ?
As far as I know, the only a
You only hit the silicon bug if you bombard the uart with characters
and simultaneously request a baud rate or framing change.
I'm not sure why you would do either to the uart console. Is it
possible your host machine is doing something weird?
If you have the leverage, remind the SoC vendor to u
d to bit zero of that same
register. The driver should be updated to configure bit zero
appropriately even when an external regulator is used.
If you like, I can propose a patch or if you have one ready, I will be
happy to review yours.
Thanks,
Tim Kryger
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On Sat, Dec 13, 2014 at 11:22 PM, Bjorn Andersson wrote:
> On Tue, Nov 4, 2014 at 7:31 AM, Tim Kryger wrote:
>> On Tue, Nov 4, 2014 at 1:00 AM, Alexandre Courbot
>> wrote:
>>> Hi Tim, thanks for your reply!
>>>
>>> On 11/04/2014 02:28 PM, Tim Kryger wr
and trigger bit are both low, the output is constant high.
If you look at the PWM output on a scope you will see it go high for
400 ns during your disable even if the duty prior to the disable was
zero.
How are you testing your proposed changes?
Thanks,
Tim Kryger
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On Wed, May 3, 2017 at 8:40 AM, Olliver Schinagl wrote:
> Hey Tim,
>
> Ok, so as far as I understand (from the datasheet) the intended way to do
> this would be to check for the BUSY IRQ & USR[0] IRQ and if it is busy,
> (re-write) the LCR. We no longer do this because it did not work due to the
On Wed, May 3, 2017 at 4:26 AM, Olliver Schinagl wrote:
> Hey Chen-Yu
>
> On 03-05-17 12:40, Chen-Yu Tsai wrote:
>>
>> On Wed, May 3, 2017 at 6:17 PM, Olliver Schinagl
>> wrote:
>>>
>>> Hey Jamie,
>>>
>>> Several years ago you wrote the glue-code [0] for the DW 8250 IP. Over
>>> the
>>> years var
Commit-ID: ad037c1f4ae6f9258f27fddb679ceb703ff07a88
Gitweb: http://git.kernel.org/tip/ad037c1f4ae6f9258f27fddb679ceb703ff07a88
Author: Tim Kryger
AuthorDate: Tue, 4 Feb 2014 16:15:04 -0800
Committer: Thomas Gleixner
CommitDate: Thu, 6 Feb 2014 16:01:40 +0100
clocksource: Kona: Print
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