Hi Bjorn,
On 6/8/2019 9:18 AM, Bjorn Andersson wrote:
> On Wed 05 Jun 10:16 PDT 2019, Sricharan R wrote:
>
>> Add initial device tree support for the Qualcomm IPQ6018 SoC and
>> CP01 evaluation board.
>>
>> Signed-off-by: Sricharan R
>> Signed-off-by: Abhi
Hi Marc,
On 6/5/2019 10:56 PM, Marc Zyngier wrote:
> On 05/06/2019 18:16, Sricharan R wrote:
>> Add initial device tree support for the Qualcomm IPQ6018 SoC and
>> CP01 evaluation board.
>>
>> Signed-off-by: Sricharan R
>> Signed-off-by: Abhishek Sahu
&g
Hi Sudeep,
On 6/5/2019 11:04 PM, Sudeep Holla wrote:
> On Wed, Jun 05, 2019 at 10:58:57PM +0530, Sricharan R wrote:
>> Add initial device tree support for the Qualcomm IPQ6018 SoC and
>> CP01 evaluation board.
>>
>> Signed-off-by: Sricharan R
>> Signed-off-b
Srinivas Kandagatla
Signed-off-by: Sricharan R
---
drivers/dma/qcom/bam_dma.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/dma/qcom/bam_dma.c b/drivers/dma/qcom/bam_dma.c
index 4b43844..8e90a40 100644
--- a/drivers/dma/qcom/bam_dma.c
+++ b/drivers/dma/qcom/bam_dma.c
@@ -799,6
n, QSB and the top PLL are always a fixed rate and thus
>> only support one frequency each. These sources provide the lowest
>> frequencies for the CPUs. The HFPLLs are where we can make the CPU go
>> faster (GHz range). Sometimes we need to run the HFPLL twice as
>> fast
gt;>
>>
>> On 7 September 2018 10:57:34 BST, Sricharan R
>> wrote:
>>> Hi Craig,
>>>
>>>
>>>>> [v12]
>>>>> * Added my signed-off that was missing in some patches.
>>>>> * Added Bjorn's acked that i
>>
>>
>> On 7 September 2018 10:57:34 BST, Sricharan R
>> wrote:
>>> Hi Craig,
>>>
>>>
>>>>> [v12]
>>>>> * Added my signed-off that was missing in some patches.
>>>>> * Added Bjorn's acked
)
Signed-off-by: Sricharan R
[bjorn: Rewrote as a separate driver, intead of extending q6v5_pil.c]
Signed-off-by: Bjorn Andersson
---
[v2] Fixed Kconfig to remove SMD dependency and addressed
Vinod's comments.
.../devicetree/bindings/remoteproc/qcom,q6v5.txt | 7 +-
drivers/remot
Hi Bjorn,
Thanks a lot for all the reviews.
On 3/27/2018 10:20 PM, Bjorn Andersson wrote:
> On Fri 23 Mar 03:18 PDT 2018, Sricharan R wrote:
>> @@ -172,6 +180,22 @@
>> clock-names = "core", "iface";
>> #address-c
On 3/27/2018 10:34 PM, Bjorn Andersson wrote:
> On Fri 23 Mar 03:18 PDT 2018, Sricharan R wrote:
>> +soc {
>> +pinctrl@100 {
>> +serial_0_pins: serial0_pinmux {
>
> Please, no underscores in the node name.
ok.
>
>&
Hi Bjorn,
On 3/27/2018 10:42 PM, Bjorn Andersson wrote:
> On Fri 23 Mar 03:18 PDT 2018, Sricharan R wrote:
>> +#include "qcom-ipq4019-ap.dk04.1.dtsi"
>> +
>> +/ {
>> +model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1-C1";
>> +
>
&
On 3/27/2018 10:44 PM, Bjorn Andersson wrote:
> On Fri 23 Mar 03:18 PDT 2018, Sricharan R wrote:
>> +#include "qcom-ipq4019-ap.dk04.1.dtsi"
>> +
>> +/ {
>> +model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1-C3";
>
> Add a compat
On 3/27/2018 10:50 PM, Bjorn Andersson wrote:
> On Fri 23 Mar 03:18 PDT 2018, Sricharan R wrote:
>> +#include "qcom-ipq4019.dtsi"
>> +#include
>> +#include
>> +
>> +/ {
>> +model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1";
On 3/27/2018 10:52 PM, Bjorn Andersson wrote:
> On Fri 23 Mar 03:18 PDT 2018, Sricharan R wrote:
>> +#include "qcom-ipq4019-ap.dk07.1.dtsi"
>> +
>> +/ {
>> +model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1-C1";
>
> Add co
Hi Bjorn,
On 3/27/2018 10:59 PM, Bjorn Andersson wrote:
> On Fri 23 Mar 03:18 PDT 2018, Sricharan R wrote:
>
>> Reviewed-by: Abhishek Sahu
>> Signed-off-by: Sricharan R
>> ---
>> arch/arm/boot/dts/Makefile | 1 +
>> arch/arm/boot/dt
On 3/27/2018 11:15 PM, Bjorn Andersson wrote:
> On Fri 23 Mar 03:18 PDT 2018, Sricharan R wrote:
>> +serial_blsp0: serial@78af000 {
>
> Please try to have a single scheme for how you name your labels; this is
> serial0 or blsp1_uart1.
>
> [..]
>> +
On 3/27/2018 11:16 PM, Bjorn Andersson wrote:
> On Fri 23 Mar 03:18 PDT 2018, Sricharan R wrote:
>
>> The driver/phy support for ipq8074 is available now.
>> So enabling the nodes in DT.
>>
>
> Acked-by: Bjorn Andersson
>
Thanks.
Regards,
Sricharan
>
Hi Bjorn,
On 3/27/2018 11:19 PM, Bjorn Andersson wrote:
> On Fri 23 Mar 03:18 PDT 2018, Sricharan R wrote:
>
>> Reviewed-by: Abhishek Sahu
>> Signed-off-by: Sricharan R
>> ---
>> arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 103
>> ++
Hi Ilia,
> diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
> index 7f56fe5..71350e2 100644
> --- a/drivers/cpufreq/Kconfig.arm
> +++ b/drivers/cpufreq/Kconfig.arm
> @@ -134,6 +134,17 @@ config ARM_OMAP2PLUS_CPUFREQ
> depends on ARCH_OMAP2PLUS
> default ARCH_OMAP2
Hi Viresh,
On 4/2/2018 3:00 PM, Viresh Kumar wrote:
> +Sricharan,
>
> On 30-03-18, 00:26, Ilia Lin wrote:
>> In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996
>> that have KRYO processors, the CPU ferequencies subset and voltage value
>> of each OPP varies based on the silicon
Hi Viresh,
On 4/2/2018 8:37 PM, Sricharan R wrote:
> Hi Viresh,
>
> On 4/2/2018 3:00 PM, Viresh Kumar wrote:
>> +Sricharan,
>>
>> On 30-03-18, 00:26, Ilia Lin wrote:
>>> In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996
>>> th
ck-8x60.c?at=moretz&fileviewer=file-view-default
> On Tue, Feb 27, 2018 at 3:06 PM, Sricharan R wrote:
>
>> * Dropped the DT update from the series. Will send separatelyssbi
>
> Are these available somewhere so I can test the sum total on
> the Nexus 7 and see if
t; BAM will generate the completion interrupt.
>
> Signed-off-by: Abhishek Sahu
> ---
>
Reviewed-by: Sricharan R
Regards,
Sricharan
> * Changes from v1:
>
> 1. Modified commit message with more details
>
> drivers/i2c/busses/i2c-qup.c | 39
[v2]
* Addressed all comments from Abhishek
* Removed dk01-c2 and dk04-c5 spinand based boards
as support for spinand is not complete
* Based all patches on top of Andy's for-next branch
[V1]
* https://www.spinics.net/lists/arm-kernel/msg631318.html
Sricharan
Add the compatible for ipq4019.
This does not need clocks to do scm calls.
Reviewed-by: Rob Herring
Signed-off-by: Sricharan R
---
Documentation/devicetree/bindings/firmware/qcom,scm.txt | 3 ++-
drivers/firmware/qcom_scm.c | 3 +++
2 files changed, 5 insertions
Now with the driver updates for some peripherals being there,
add i2c, spi, pcie, bam, qpic-nand, scm nodes to enhance the available
peripheral support.
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 134
1 file changed, 134 insertions
Adds missing memory, reserved-memory nodes.
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 28 +++
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts | 20
2 files changed, 21 insertions(+)
create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts
diff --git a/arch/arm/boot/dts
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c3.dts | 8
2 files changed, 9 insertions(+)
create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c3.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts | 65 +
2 files changed, 66 insertions(+)
create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts
diff --git a/arch/arm/boot
Add serial, i2c, bam, spi, qpic peripheral nodes.
Signed-off-by: Sricharan R
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 105 ++
1 file changed, 105 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index
The driver/phy support for ipq8074 is available now.
So enabling the nodes in DT.
Signed-off-by: Sricharan R
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 157 +-
1 file changed, 156 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
Signed-off-by: Sricharan R
---
arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 103 ++
1 file changed, 103 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
index 6a838b5..81dff867 100644
--- a/arch/arm64
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dts | 26 +
2 files changed, 27 insertions(+)
create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c2.dts
diff --git a/arch/arm/boot
Add the common data for all dk07 based boards.
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi | 83 +++
1 file changed, 83 insertions(+)
create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1.dtsi
diff --git a/arch/arm/boot/dts/qcom
Add the common parts for the dk04 boards.
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 129 ++
1 file changed, 129 insertions(+)
create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
diff --git a/arch/arm/boot/dts/qcom
The max opp frequency is 716MHZ. So update that.
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi
b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index e38fffa..2ee71c2 100644
--- a
Hi Marc,
On 3/16/2018 5:47 PM, Marc Zyngier wrote:
> On 16/03/18 09:38, Sricharan R wrote:
>> Now with the driver updates for some peripherals being there,
>> add i2c, spi, pcie, bam, qpic-nand, scm nodes to enhance the available
>> peripheral support.
>>
&g
Hi Abhishek,
On 3/16/2018 4:50 PM, Abhishek Sahu wrote:
> On 2018-03-16 15:08, Sricharan R wrote:
>> The driver/phy support for ipq8074 is available now.
>> So enabling the nodes in DT.
>>
>> Signed-off-by: Sricharan R
>> ---
>> arch
Hi Abhishek,
On 3/16/2018 4:27 PM, Abhishek Sahu wrote:
> On 2018-03-16 15:08, Sricharan R wrote:
>> Signed-off-by: Sricharan R
>> ---
>> arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 103
>> ++
>> 1 file changed, 103 insertions(+)
&
On 3/16/2018 4:17 PM, Abhishek Sahu wrote:
> On 2018-03-16 15:08, Sricharan R wrote:
>> Add serial, i2c, bam, spi, qpic peripheral nodes.
>>
>> Signed-off-by: Sricharan R
>> ---
>> arch/arm64/boot/dts/qcom/ipq8074.dtsi | 105
>> +++
On 3/16/2018 3:55 PM, Abhishek Sahu wrote:
> On 2018-03-16 15:08, Sricharan R wrote:
>> Signed-off-by: Sricharan R
>> ---
>> arch/arm/boot/dts/Makefile | 1 +
>> arch/arm/boot/dts/qcom-ipq4019-ap.dk07.1-c1.dts | 65
>>
Hi Sven,
On 4/18/2018 12:29 PM, Sven Eckelmann wrote:
> On Freitag, 23. März 2018 15:48:51 CEST Sricharan R wrote:
>> Add the common data for all dk07 based boards.
>>
>> Reviewed-by: Abhishek Sahu
>> Signed-off-by: Sricharan R
>> ---
>> arch/arm/bo
Hi Sven,
On 4/18/2018 12:37 PM, Sven Eckelmann wrote:
> On Mittwoch, 18. April 2018 08:59:46 CEST Sven Eckelmann wrote:
> [...]
>> I would not know how to disable QSEE on these boards and thus would assume
>> that it should be part of this dtsi.
>
>
> Just did some reviews of the reserved-memor
Hi Sven,
On 4/18/2018 1:08 PM, Sven Eckelmann wrote:
> Hi,
>
> On Mittwoch, 18. April 2018 12:45:20 CEST Sricharan R wrote:
>> Right, will add the above change to soc.dtsi in V6. Does that sound ok for
>> you ?
>
> I have submitted a patch for this now [1] beca
The newly added DMA_ATTR_PRIVILEGED is useful for creating mappings that
are only accessible to privileged DMA engines. Adding it to the
arm dma-mapping.c so that the ARM32 DMA IOMMU mapper can make use of it.
Signed-off-by: Sricharan R
Reviewed-by: Will Deacon
---
arch/arm/mm/dma-mapping.c
it be controlled by the pagetable
settings.
Acked-by: Will Deacon
Signed-off-by: Sricharan R
---
drivers/iommu/arm-smmu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index a60cded..73a0a25 100644
--- a/drivers/iommu/arm-s
From: Mitchel Humpherys
The newly added DMA_ATTR_PRIVILEGED is useful for creating mappings that
are only accessible to privileged DMA engines. Implement it in
dma-iommu.c so that the ARM64 DMA IOMMU mapper can make use of it.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Acked-by: Will D
From: Robin Murphy
This reverts commit df5e1a0f2a2d779ad467a691203bcbc74d75690e.
Now that proper privileged mappings can be requested via IOMMU_PRIV,
unconditionally overriding the incoming PRIVCFG becomes the wrong thing
to do, so stop it.
Signed-off-by: Robin Murphy
---
drivers/iommu/arm-sm
From: Mitchel Humpherys
The PL330 is hard-wired such that instruction fetches on both the
manager and channel threads go out onto the bus with the "privileged"
bit set. This can become troublesome once there is an IOMMU or other
form of memory protection downstream, since those will typically be
From: Mitchel Humpherys
Add the IOMMU_PRIV attribute, which is used to indicate privileged
mappings.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Signed-off-by: Mitchel Humpherys
Acked-by: Will Deacon
---
include/linux/iommu.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/
From: Jeremy Gebben
Allow the creation of privileged mode mappings, for stage 1 only.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Acked-by: Will Deacon
Signed-off-by: Jeremy Gebben
---
drivers/iommu/io-pgtable-arm.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
From: Robin Murphy
The short-descriptor format also allows privileged-only mappings, so
let's wire it up.
Signed-off-by: Robin Murphy
Tested-by: Sricharan R
---
drivers/iommu/io-pgtable-arm-v7s.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/iom
ing: add DMA_ATTR_PRIVILEGED attribute
arm64/dma-mapping: Implement DMA_ATTR_PRIVILEGED
dmaengine: pl330: Make sure microcode is privileged
Robin Murphy (2):
iommu/io-pgtable-arm-v7s: Add support for the IOMMU_PRIV flag
Revert "iommu/arm-smmu: Set PRIVCFG in stage 1 STEs"
Srichar
From: Mitchel Humpherys
This patch adds the DMA_ATTR_PRIVILEGED attribute to the DMA-mapping
subsystem.
Some advanced peripherals such as remote processors and GPUs perform
accesses to DMA buffers in both privileged "supervisor" and unprivileged
"user" modes. This attribute is used to indicate
that would never happen when there
is already an error condition on the bus. Also the error handling
procedure should be the same for both NACK and other bus errors in
case of dma mode. So correct that as well.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-
which can be carveouts, hence the check fails.
Change allocation of sg buffers from dma_coherent memory to kzalloc
to fix the issue. Note that now dma_map/unmap is used to make the
kzalloc'ed buffers coherent before passing it to the dmaengine.
Signed-off-by: Sricharan R
Reviewed-by: Andy
index gets incremented during check to determine if the
messages can be transferred with dma. But not reset after
that, resulting in wrong start value in subsequent loop,
causing failure. Fix it.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 2 ++
1 file changed, 2 insertions
tag for patch#1,
as there was no code change.
Depends on patch[1] for the error handling to be complete.
[1] https://lkml.org/lkml/2016/5/9/447
Sricharan R (3):
i2c: qup: Fix broken dma when CONFIG_DEBUG_SG is enabled
i2c: qup: Fix wrong value of index variable
i2c: qup: Fix error handling
to be powered off by software.
Signed-off-by: Rajendra Nayak
Signed-off-by: Sricharan R
---
[V2] Fixed to take care of the return value of gdsc_hwctrl
drivers/clk/qcom/gdsc.c | 19 +++
drivers/clk/qcom/gdsc.h | 1 +
2 files changed, 20 insertions(+)
diff --git a/drivers/clk
eturn value for gdsc_hwctrl
[1] https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1270922.html
Rajendra Nayak (1):
clk: qcom: gdsc: Add support for gdscs with HW control
Sricharan R (1):
clk: qcom: Put venus core0/1 gdscs to hw control mode
drivers/clk/qcom/gdsc.c | 19 +
The venus video ip's internal core blocks are under the
control of the firmware and their powerdomains needs to be
'ON' only when used by the firmware. So putting it into
hw controlled mode lets this to happen, otherwise the firmware
hangs checking for this.
Signed-off-
to be powered off by software.
Signed-off-by: Rajendra Nayak
Signed-off-by: Sricharan R
---
[V2] Fixed to take care of the return value of gdsc_hwctrl
drivers/clk/qcom/gdsc.c | 19 +++
drivers/clk/qcom/gdsc.h | 1 +
2 files changed, 20 insertions(+)
diff --git a/drivers/clk
The venus video ip's internal core blocks are under the
control of the firmware and their powerdomains needs to be
'ON' only when used by the firmware. So putting it into
hw controlled mode lets this to happen, otherwise the firmware
hangs checking for this.
Signed-off-
eturn value for gdsc_hwctrl
[1] https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1270922.html
Rajendra Nayak (1):
clk: qcom: gdsc: Add support for gdscs with HW control
Sricharan R (1):
clk: qcom: Put venus core0/1 gdscs to hw control mode
drivers/clk/qcom/gdsc.c | 19 +
sc: Add support for gdscs with HW control
Sricharan R (2):
clk: qcom: Put venus core0/1 gdscs to hw control mode
clk: qcom: Set BRANCH_HALT_DELAY flags for venus core0/1 clks
drivers/clk/qcom/gdsc.c | 15 +++
drivers/clk/qcom/gdsc.h | 1 +
drivers/clk/qcom/mmcc
enabling/disabling those clocks.
Signed-off-by: Sricharan R
---
drivers/clk/qcom/mmcc-msm8996.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clk/qcom/mmcc-msm8996.c b/drivers/clk/qcom/mmcc-msm8996.c
index 41aabe3..8f3f480 100644
--- a/drivers/clk/qcom/mmcc-msm8996.c
+++ b/drivers
to be powered off by software.
Signed-off-by: Rajendra Nayak
Signed-off-by: Sricharan R
---
drivers/clk/qcom/gdsc.c | 15 +++
drivers/clk/qcom/gdsc.h | 1 +
2 files changed, 16 insertions(+)
diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c
index f12d7b2..a5e1c8c
The venus video ip's internal core blocks are under the
control of the firmware and their powerdomains needs to be
'ON' only when used by the firmware. So putting it into
hw controlled mode lets this to happen, otherwise the firmware
hangs checking for this.
Signed-off-
From: Jeremy Gebben
Allow the creation of privileged mode mappings, for stage 1 only.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Acked-by: Will Deacon
Signed-off-by: Jeremy Gebben
---
drivers/iommu/io-pgtable-arm.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
_ATTR_PRIVILEGED
dmaengine: pl330: Make sure microcode is privileged
Robin Murphy (2):
iommu/io-pgtable-arm-v7s: Add support for the IOMMU_PRIV flag
Revert "iommu/arm-smmu: Set PRIVCFG in stage 1 STEs"
Sricharan R (2):
arm/dma-mapping: Implement DMA_ATTR_PRIVILEGED
iommu/arm-smmu
From: Mitchel Humpherys
The newly added DMA_ATTR_PRIVILEGED is useful for creating mappings that
are only accessible to privileged DMA engines. Implement it in
dma-iommu.c so that the ARM64 DMA IOMMU mapper can make use of it.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Acked-by: Will D
From: Mitchel Humpherys
The PL330 is hard-wired such that instruction fetches on both the
manager and channel threads go out onto the bus with the "privileged"
bit set. This can become troublesome once there is an IOMMU or other
form of memory protection downstream, since those will typically be
The newly added DMA_ATTR_PRIVILEGED is useful for creating mappings that
are only accessible to privileged DMA engines. Adding it to the
arm dma-mapping.c so that the ARM32 DMA IOMMU mapper can make use of it.
Signed-off-by: Sricharan R
---
arch/arm/mm/dma-mapping.c | 60
From: Mitchel Humpherys
Add the IOMMU_PRIV attribute, which is used to indicate privileged
mappings.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Signed-off-by: Mitchel Humpherys
Acked-by: Will Deacon
---
include/linux/iommu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include
it be controlled by the pagetable
settings.
Acked-by: Will Deacon
Signed-off-by: Sricharan R
---
drivers/iommu/arm-smmu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index a60cded..73a0a25 100644
--- a/drivers/iommu/arm-s
From: Robin Murphy
This reverts commit df5e1a0f2a2d779ad467a691203bcbc74d75690e.
Now that proper privileged mappings can be requested via IOMMU_PRIV,
unconditionally overriding the incoming PRIVCFG becomes the wrong thing
to do, so stop it.
Signed-off-by: Robin Murphy
---
drivers/iommu/arm-sm
From: Mitchel Humpherys
This patch adds the DMA_ATTR_PRIVILEGED attribute to the DMA-mapping
subsystem.
Some advanced peripherals such as remote processors and GPUs perform
accesses to DMA buffers in both privileged "supervisor" and unprivileged
"user" modes. This attribute is used to indicate
From: Robin Murphy
The short-descriptor format also allows privileged-only mappings, so
let's wire it up.
Signed-off-by: Robin Murphy
Tested-by: Sricharan R
---
drivers/iommu/io-pgtable-arm-v7s.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/iom
MA_ATTR_PRIVILEGED attribute
arm64/dma-mapping: Implement DMA_ATTR_PRIVILEGED
dmaengine: pl330: Make sure microcode is privileged
Robin Murphy (2):
iommu/io-pgtable-arm-v7s: Add support for the IOMMU_PRIV flag
iommu/arm-smmu: Revert "iommu/arm-smmu: Set PRIVCFG in stage 1 STEs"
From: Mitchel Humpherys
Add the IOMMU_PRIV attribute, which is used to indicate privileged
mappings.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Signed-off-by: Mitchel Humpherys
Acked-by: Will Deacon
---
include/linux/iommu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include
From: Mitchel Humpherys
The newly added DMA_ATTR_PRIVILEGED is useful for creating mappings that
are only accessible to privileged DMA engines. Implement it in
dma-iommu.c so that the ARM64 DMA IOMMU mapper can make use of it.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Acked-by: Will D
From: Mitchel Humpherys
This patch adds the DMA_ATTR_PRIVILEGED attribute to the DMA-mapping
subsystem.
Some advanced peripherals such as remote processors and GPUs perform
accesses to DMA buffers in both privileged "supervisor" and unprivileged
"user" modes. This attribute is used to indicate
From: Jeremy Gebben
Allow the creation of privileged mode mappings, for stage 1 only.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Acked-by: Will Deacon
Signed-off-by: Jeremy Gebben
---
drivers/iommu/io-pgtable-arm.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
From: Mitchel Humpherys
The PL330 is hard-wired such that instruction fetches on both the
manager and channel threads go out onto the bus with the "privileged"
bit set. This can become troublesome once there is an IOMMU or other
form of memory protection downstream, since those will typically be
From: Robin Murphy
Now that proper privileged mappings can be requested via IOMMU_PRIV,
unconditionally overriding the incoming PRIVCFG becomes the wrong thing
to do, so stop it.
This reverts commit df5e1a0f2a2d779ad467a691203bcbc74d75690e.
Signed-off-by: Robin Murphy
---
drivers/iommu/arm-sm
it be controlled by the pagetable
settings.
Acked-by: Will Deacon
Signed-off-by: Sricharan R
---
drivers/iommu/arm-smmu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index eaa8f44..8bb0eea 100644
--- a/drivers/iommu/arm-s
From: Robin Murphy
The short-descriptor format also allows privileged-only mappings, so
let's wire it up.
Signed-off-by: Robin Murphy
Tested-by: Sricharan R
---
drivers/iommu/io-pgtable-arm-v7s.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/iom
From: Mitchel Humpherys
Add the IOMMU_PRIV attribute, which is used to indicate privileged
mappings.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Acked-by: Will Deacon
Signed-off-by: Mitchel Humpherys
---
[V6] No change
include/linux/iommu.h | 1 +
1 file changed, 1 insertion(+)
dif
From: Jeremy Gebben
Allow the creation of privileged mode mappings, for stage 1 only.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Acked-by: Will Deacon
Signed-off-by: Jeremy Gebben
---
[V6] No change
drivers/iommu/io-pgtable-arm.c | 5 -
1 file changed, 4 insertions(+), 1 deleti
From: Mitchel Humpherys
The newly added DMA_ATTR_PRIVILEGED is useful for creating mappings that
are only accessible to privileged DMA engines. Implement it in
dma-iommu.c so that the ARM64 DMA IOMMU mapper can make use of it.
Reviewed-by: Robin Murphy
Tested-by: Robin Murphy
Acked-by: Will D
sure microcode is privileged
Sricharan R (1):
iommu/arm-smmu: Set privileged attribute to 'default' instead of
'unprivileged'
Documentation/DMA-attributes.txt | 10 ++
arch/arm64/mm/dma-mapping.c | 6 +++---
drivers/dma/pl330.c | 6 --
drivers/iom
From: Mitchel Humpherys
This patch adds the DMA_ATTR_PRIVILEGED attribute to the DMA-mapping
subsystem.
Some advanced peripherals such as remote processors and GPUs perform
accesses to DMA buffers in both privileged "supervisor" and unprivileged
"user" modes. This attribute is used to indicate
it be controlled by the pagetable
settings.
Signed-off-by: Sricharan R
---
[V6] V5 was doing this with a 'revert'[1] patch, which no more
applies on this code base. So changed the same like this.
[1] https://patchwork.kernel.org/patch/9250493/
drivers/iommu/arm-smmu.c | 2 +-
From: Mitchel Humpherys
The PL330 performs privileged instruction fetches. This can result in
SMMU permission faults on SMMUs that implement the ARMv8 VMSA, which
specifies that mappings that are writeable at one execution level shall
not be executable at any higher-privileged level. Fix this b
transfer more than
256 bytes, without a 'stop' which is not possible otherwise.
Signed-off-by: Sricharan R
Reviewed-by: Andy Gross
Tested-by: Archit Taneja
Tested-by: Telkar Nagender
---
Fixed Sparse/Static warnings.
drivers/i2c/busses/i2c-q
The IPQ6018 is Qualcomm’s 802.11ax SoC for Routers,
Gateways and Access Points.
This series adds minimal board boot support for ipq6018-cp01
board.
Sricharan R (6):
pinctrl: qcom: Add ipq6018 pinctrl driver
dt-bindings: qcom: Add ipq6018 bindings
clk: qcom: Add DT bindings for ipq6018 gcc
Add the compatible strings and the include file for ipq6018
gcc clock controller.
Signed-off-by: Sricharan R
Signed-off-by: anusha
Signed-off-by: Abhishek Sahu
---
.../devicetree/bindings/clock/qcom,gcc.txt | 1 +
include/dt-bindings/clock/qcom,gcc-ipq6018.h | 405
Signed-off-by: Sricharan R
Signed-off-by: speriaka
---
Documentation/devicetree/bindings/arm/qcom.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml
b/Documentation/devicetree/bindings/arm/qcom.yaml
index f6316ab..7b19028 100644
--- a
Add initial pinctrl driver to support pin configuration with
pinctrl framework for ipq6018.
Signed-off-by: Sricharan R
Signed-off-by: Rajkumar Ayyasamy
Signed-off-by: speriaka
---
.../bindings/pinctrl/qcom,ipq6018-pinctrl.txt | 186 +++
drivers/pinctrl/qcom/Kconfig
501 - 600 of 893 matches
Mail list logo
