Hi,
On Wed, Mar 17, 2021 at 9:31 AM Dan Williams wrote:
>
> On Tue, Mar 16, 2021 at 10:31 PM Lukas Wunner wrote:
> >
> > On Tue, Mar 16, 2021 at 10:08:31PM -0700, Dan Williams wrote:
> > > On Tue, Mar 16, 2021 at 9:14 PM Lukas Wunner wrote:
> > > >
> > > > On Fri, Mar 12, 2021 at 07:32:08PM -08
Hi,
On Wed, Mar 17, 2021 at 10:45 AM Dan Williams wrote:
>
> On Wed, Mar 17, 2021 at 10:20 AM Sathyanarayanan Kuppuswamy Natarajan
> wrote:
> >
> > Hi,
> >
> > On Wed, Mar 17, 2021 at 9:31 AM Dan Williams
> > wrote:
> > >
> >
On Wed, Oct 14, 2020 at 11:43 PM Christoph Hellwig wrote:
>
> On Tue, Oct 13, 2020 at 08:17:39AM -0700, Kuppuswamy, Sathyanarayanan wrote:
> >
> >
> > On 10/13/20 4:56 AM, Christoph Hellwig wrote:
> > > You might want to split out pcie_do_fatal_recovery and get rid of the
> > > state argument:
> >
Hi Andy,
Thanks for your comments.
On Sun, Apr 2, 2017 at 6:58 AM, Andy Shevchenko
wrote:
> On Sat, Apr 1, 2017 at 2:27 AM, Kuppuswamy Sathyanarayanan
> wrote:
>> This patch adds API's to read/write/update PMC GC registers.
>> PMC dependent devices like iTCO_WDT, Telemetry has requirement
>
> i
Yes, just applying this patch will fix the existing offset issue.
On Sun, Apr 2, 2017 at 7:11 AM, Andy Shevchenko
wrote:
> On Sat, Apr 1, 2017 at 2:27 AM, Kuppuswamy Sathyanarayanan
> wrote:
>> According to Broxton APL PMC spec, gcr mem region starts
>> at offset 0x1000 from ipc mem base address
Hi Andy,
On Sun, Apr 2, 2017 at 7:10 AM, Andy Shevchenko
wrote:
> On Sat, Apr 1, 2017 at 2:27 AM, Kuppuswamy Sathyanarayanan
> wrote:
>> iTCO watchdog driver need access to PMC_CFG GCR register to modify
>
> iTCO_wdt or use above in the rest of the series.
>
> So, choose one and use it everywh
Hi,
On Sun, Apr 2, 2017 at 7:04 AM, Andy Shevchenko
wrote:
> On Sat, Apr 1, 2017 at 2:27 AM, Kuppuswamy Sathyanarayanan
> wrote:
>> In some SOCs, setting noreboot bit needs modification to
>
> SoCs.
>
> Perhaps you can create a wikipage to share with your team what style
> issues usually needs t
Hi Lee,
Thanks. Will remove the code segment in next version.
On Wed, Apr 12, 2017 at 3:45 AM, Lee Jones wrote:
> On Mon, 10 Apr 2017, sathyanarayanan.kuppusw...@linux.intel.com wrote:
>
>> From: Kuppuswamy Sathyanarayanan
>>
>> TMU interrupts are registered as a separate interrupt chip, and
>>
Sorry, its a mistake from my end. It looks like typec wcove driver got
merged recently and I missed to add it to my cleanup patch set.
Lee,
I have created a patch to fix this issue.
Do you want me to send the entire series again with this fix or just
send the fix alone.
On Tue, May 30, 2017 at
Hi All,
On Tue, May 30, 2017 at 8:38 PM, Stephen Rothwell wrote:
> Hi all,
>
> On Tue, 30 May 2017 09:53:06 +0100 Lee Jones wrote:
>>
>> Dear fellow Maintainers,
>>
>> Enjoy!
>>
>> The following changes since commit 2ea659a9ef488125eb46da6eb571de5eae5c43f6:
>>
>> Linux 4.12-rc1 (2017-05-13 13:
Hi,
On Sat, Jun 3, 2017 at 6:00 AM, Andy Shevchenko
wrote:
> On Thu, Jun 1, 2017 at 1:37 AM,
> wrote:
>> From: Kuppuswamy Sathyanarayanan
>>
>> PMIC mfd driver only exports first level irq for thermal device.
>> But currently we are reading the irqs from the second level irq
>> chip, So this pa
Hi,
On Sat, Jun 3, 2017 at 10:32 AM, Andy Shevchenko
wrote:
> On Sat, Jun 3, 2017 at 8:28 PM, Sathyanarayanan Kuppuswamy Natarajan
> wrote:
>> Hi,
>>
>> On Sat, Jun 3, 2017 at 6:00 AM, Andy Shevchenko
>> wrote:
>>> On Thu, Jun 1, 2017 at 1:3
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