On Thursday 24 April 2014 12:47 PM, David Miller wrote:
> From: Santosh Shilimkar
> Date: Tue, 22 Apr 2014 17:21:15 -0400
>
>> +struct netcp_tx_pipe {
>> +struct netcp_device *netcp_device;
>> +void*dma_queue;
>
> Indent *dma_queue the same as
On Wednesday 24 September 2014 04:43 PM, David Miller wrote:
> From: Santosh Shilimkar
> Date: Wed, 24 Sep 2014 15:51:15 -0400
>
>> Here is an updated version with above fixed. Not posting the entire
>> series again since its just small update on the patch.
>
>
v3->v4
Couple of fixes in in error path as pointed [4] out by David. Rest of
the patches are unchanged from v3. I would like get this in for v3.18
merge window if David is happy with this version.
v2->v3
Update v3 after incorporating Jamal and David Miller'scomment/suggestion
from earlier versions
From: Sandeep Nair
Signed-off-by: Sandeep Nair
Signed-off-by: Santosh Shilimkar
---
MAINTAINERS |7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index aefa948..4821dcf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9117,6 +9117,13 @@ F: drivers
|-> Ethernet Port 3
Common driver supports GBE as well XGBE network processors.
Cc: Rob Herring
Cc: Grant Likely
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Cc: David Miller
Signed-off-by: Sandeep Nair
Signed-off-by: Santosh Shilimkar
---
Cc: Olof Johansson
Cc: Arnd Bergmann
Signed-off-by: Sandeep Nair
Signed-off-by: Santosh Shilimkar
---
I know we are not adding firmware to kernel and the idea is to get them
loaded via rootfs. But this firmware is for an infrastructure component
which is needed for Keystone. The respective
On Thursday 25 September 2014 11:15 AM, Greg Kroah-Hartman wrote:
> On Thu, Sep 25, 2014 at 10:13:43AM -0400, Santosh Shilimkar wrote:
>> From: Sandeep Nair
>>
>> QMSS(Queue Manager Sub System) uses PDSPs to implement various
>> QM related functions like packet
On Thursday 25 September 2014 10:29 AM, Joe Perches wrote:
> On Thu, 2014-09-25 at 10:03 -0400, Santosh Shilimkar wrote:
>> From: Sandeep Nair
>>
>> The network coprocessor (NetCP) is a hardware accelerator that processes
>> Ethernet packets. NetCP has a gigabit Ethe
v4->v5
Sorry to spin v5 quickly but I missed few check-patch warnings which
were pointed by Joe Perches(thanks). I folded his changes [5] along with
few more check-patch warning fixes. I would like get this in for v3.18
merge window if David is happy with this version.
v3->v4
Couple of fixes in in
|-> Ethernet Port 3
Common driver supports GBE as well XGBE network processors.
Cc: Rob Herring
Cc: Grant Likely
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Cc: David Miller
Signed-off-by: Sandeep Nair
Signed-off-by: Santosh Shilimkar
---
On Thursday 25 September 2014 01:04 PM, Santosh Shilimkar wrote:
> On Thursday 25 September 2014 11:15 AM, Greg Kroah-Hartman wrote:
>> On Thu, Sep 25, 2014 at 10:13:43AM -0400, Santosh Shilimkar wrote:
>>> From: Sandeep Nair
[..]
>> Did you submit this to
From: Sandeep Nair
Signed-off-by: Sandeep Nair
Signed-off-by: Santosh Shilimkar
---
MAINTAINERS |7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index aefa948..4821dcf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9117,6 +9117,13 @@ F: drivers
On Wednesday 10 September 2014 07:33 AM, Jamal Hadi Salim wrote:
> On 09/09/14 11:19, Santosh Shilimkar wrote:
>
>> All the documentation is open including packet accelerator offload
>> in ti.com.
>
> Very nice.
> Would you do me a kindness and point to the switch int
Dave,
On Monday 08 September 2014 10:41 AM, Santosh Shilimkar wrote:
> Hi Dave,
>
> On 8/22/14 3:45 PM, Santosh Shilimkar wrote:
>> Hi David,
>>
>> On Thursday 21 August 2014 07:36 PM, David Miller wrote:
>>> From: Santosh Shilimkar
>>> Date: Fr
On Thursday 11 September 2014 11:40 AM, Murali Karicheri wrote:
> Fix incorrect clock names for usb1, pcie1 and domain register
> offset for pcie1 clock nodes on K2E EVM
>
> Signed-off-by: Murali Karicheri
> ---
Thanks Murali. I will queue this up.
> arch/arm/boot/dts/k2e-clocks.dtsi |6 +++
On Thursday 11 September 2014 05:00 PM, Doug Anderson wrote:
> From: Heiko Stübner
>
> IO domain voltages on some Rockchip SoCs are variable but need to be
> kept in sync between the regulators and the SoC using a special
> register.
>
> A specific example using rk3288:
> - If the regulator hook
On Thursday 11 September 2014 06:07 PM, Doug Anderson wrote:
> Santosh,
>
> On Thu, Sep 11, 2014 at 2:31 PM, Santosh Shilimkar
> wrote:
>>> +Required properties:
>>> +- compatible: should be one of:
>>> + - "rockchip,rk3188-iodomain" for rk31
onzhuk
> Cc: Santosh Shilimkar
> Signed-off-by: Guenter Roeck
> ---
Looks ok for me.
Acked-by: Santosh Shilimkar
Ivan,
Can you please just test it once ? Thanks !!
Regards,
Santosh
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On Monday 29 September 2014 03:52 PM, David Miller wrote:
> From: Santosh Shilimkar
> Date: Thu, 25 Sep 2014 13:48:36 -0400
>
>> +static inline int gbe_phy_link_status(struct gbe_slave *slave)
>> +{
>> +if (!slave->phy)
>> +return
On Monday 29 September 2014 04:12 PM, David Miller wrote:
> From: Santosh Shilimkar
> Date: Mon, 29 Sep 2014 16:02:24 -0400
>
>> We are badly missing mainline network driver support for the Keystone
>> and hence I request you to help here.
>
> It is absolutely no
From: Sandeep Nair
Signed-off-by: Sandeep Nair
Signed-off-by: Santosh Shilimkar
---
MAINTAINERS |6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 134483f..7b1c41d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9038,6 +9038,12 @@ F: drivers
|-> Ethernet Port 3
Common driver supports GBE as well XGBE network processors.
Cc: Rob Herring
Cc: Grant Likely
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Cc: David Miller
Signed-off-by: Sandeep Nair
Signed-off-by: Santosh Shilimkar
---
Update v3 after incorporating Jamal and David Miller's comment/suggestion
from earlier versions [1] [2]. I would like to get these merged for upcoming
3.18 merge window if there are no concerns on this version.
After per the discussion here [3], the controversial custom exports have
been dropped n
On Friday 07 March 2014 11:13 AM, Rob Herring wrote:
> On Thu, Mar 6, 2014 at 3:19 AM, Santosh Shilimkar
> wrote:
>> The of_dma_is_coherent() helper parses the given DT device
>> node to see if the "dma-coherent" property is supported and
>> returns true o
On Friday 07 March 2014 11:49 AM, Rob Herring wrote:
> On Thu, Mar 6, 2014 at 3:19 AM, Santosh Shilimkar
> wrote:
>> From: Grygorii Strashko
>>
>> Retrieve DMA configuration from DT and setup platform device's DMA
>> parameters.
>>
>> The DMA con
On Friday 07 March 2014 11:55 AM, Rob Herring wrote:
> On Thu, Mar 6, 2014 at 9:44 PM, Santosh Shilimkar
> wrote:
>> On Friday 07 March 2014 11:13 AM, Rob Herring wrote:
>>> On Thu, Mar 6, 2014 at 3:19 AM, Santosh Shilimkar
>>> wrote:
>>>> The of_dm
On Saturday 08 March 2014 12:09 AM, Arnd Bergmann wrote:
> On Friday 07 March 2014, Santosh Shilimkar wrote:
>> On Friday 07 March 2014 11:55 AM, Rob Herring wrote:
>>
>>> Thinking about this some more, if the arch is always coherent or
>>> always non-coherent, the
On Tuesday 11 March 2014 01:02 AM, Rob Herring wrote:
> On Fri, Feb 28, 2014 at 5:18 PM, Santosh Shilimkar
> wrote:
>> From: Sandeep Nair
>>
>> The QMSS (Queue Manager Sub System) found on Keystone SOCs is one of
>> the main hardware sub system which forms the bac
On Tuesday 11 March 2014 10:04 PM, Kumar Gala wrote:
>
> On Mar 10, 2014, at 4:19 PM, Santosh Shilimkar
> wrote:
>
>>>> + -- reg-names : Names for the above register regions. The name
>>>> to be
>>>&
On Tuesday 11 March 2014 06:23 PM, Vinod Koul wrote:
> On Fri, Feb 28, 2014 at 05:56:40PM -0500, Santosh Shilimkar wrote:
>> From: Sandeep Nair
>>
>> The Packet DMA driver sets up the dma channels and flows for the
>> QMSS(Queue Manager SubSystem) who triggers the actu
Brian,
On Wednesday 16 April 2014 05:47 AM, Ivan Khoronzhuk wrote:
>
> On 04/16/2014 10:08 AM, Brian Norris wrote:
>> On Tue, Apr 08, 2014 at 03:51:34PM +0300, Ivan Khoronzhuk wrote:
>>> On 03/20/2014 10:14 PM, Santosh Shilimkar wrote:
>>>> On Thursday 20 Mar
On Monday 19 May 2014 06:25 AM, Ivan Khoronzhuk wrote:
> These patches introduce keystone reset driver.
>
> The keystone SoC can be rebooted in several ways. By external reset
> pin, by soft and by watchdogs. This driver allows software reset and reset
> by one of the watchdogs. Also added oppor
On Tuesday 20 May 2014 09:44 AM, Arnd Bergmann wrote:
> On Tuesday 20 May 2014 16:16:08 Ivan Khoronzhuk wrote:
>> Thank for the reply
>>
>> The reset driver uses two ranges:
>> - RSTYPE, RSTCTRL,RSTCFG, RSISO (Reset Main PLL Controller)
>> - RESETMUX8-10 registers
>>
>> The content of these regist
Greg,
On Wednesday 23 April 2014 07:46 PM, Santosh Shilimkar wrote:
> Here is an updated version of the Keystone Navigator drivers after
> addressing comments from earlier version [1].
>
> The QMSS found on Keystone SOCs is one of the main hardware sub
> system which forms the
Ping,
On Monday 10 February 2014 03:26 PM, Santosh Shilimkar wrote:
> Mike,
>
> Can you please look at these couple of keystone clock fixes ?
> Without these, we have seen some random kernel crashes. I
> have included the dts fix since both fixes are related. Do
> let me know
Greg,
On Wednesday 05 February 2014 02:46 PM, Ivan Khoronzhuk wrote:
> These patches introduce Async External Memory Interface (EMIF16/AEMIF)
> controller driver for Davinci/Keystone archs.
>
> For more informations see documentation:
> Davinci DM646x - http://www.ti.com/lit/ug/sprueq7c/sprueq7c.
Hi Grant,
On Tuesday 29 April 2014 10:41 AM, Grant Likely wrote:
> On Thu, 24 Apr 2014 11:30:04 -0400, Santosh Shilimkar
> wrote:
>> Retrieve DMA configuration from DT and setup platform device's DMA
>> parameters. The DMA configuration in DT has to be specified using
&
mapping
>
Thanks for the updates. The series looks good to me.
Feel free to my ack if you need one...
Acked-by: Santosh Shilimkar
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On Thursday 01 May 2014 09:12 AM, Grant Likely wrote:
> On Wed, 30 Apr 2014 10:19:15 -0400, Santosh Shilimkar
> wrote:
>> Hi Grant,
>>
>> On Tuesday 29 April 2014 10:41 AM, Grant Likely wrote:
>>> On Thu, 24 Apr 2014 11:30:04 -0400, Santosh Shilimkar
>>&g
Rob, Russell,
On Thursday 24 April 2014 11:30 AM, Santosh Shilimkar wrote:
> Here is an updated v3 of the series. Series introduces support for setting up
> dma parameters based on device tree properties like 'dma-ranges' and
> 'dma-coherent' and also update to ARM 32
On Thursday 01 May 2014 09:25 AM, Russell King - ARM Linux wrote:
> On Thu, May 01, 2014 at 09:19:18AM -0400, Santosh Shilimkar wrote:
>> Rob, Russell,
>>
>> On Thursday 24 April 2014 11:30 AM, Santosh Shilimkar wrote:
>>> Here is an updated v3 of the series. Series
On Thursday 01 May 2014 02:26 AM, Brian Norris wrote:
> This defconfig contains the CONFIG_M25P80 symbol, which is now
> dependent on the MTD_SPI_NOR symbol. Add CONFIG_MTD_SPI_NOR to satisfy
> the new dependency.
>
> Signed-off-by: Brian Norris
> Cc: Santosh Shilimkar
&
On Friday 02 May 2014 05:58 AM, Arnd Bergmann wrote:
> On Thursday 01 May 2014 14:12:10 Grant Likely wrote:
I've got two concerns here. of_dma_get_range() retrieves only the first
tuple from the dma-ranges property, but it is perfectly valid for
dma-ranges to contain multiple tuples.
On Friday 02 May 2014 10:58 AM, Russell King - ARM Linux wrote:
> On Thu, Apr 24, 2014 at 11:30:05AM -0400, Santosh Shilimkar wrote:
>> diff --git a/arch/arm/include/asm/dma-mapping.h
>> b/arch/arm/include/asm/dma-mapping.h
>> index e701a4d..424fda9 100644
>> ---
On Friday 02 May 2014 10:41 AM, Rob Herring wrote:
> On Thu, May 1, 2014 at 8:25 AM, Russell King - ARM Linux
> wrote:
>> On Thu, May 01, 2014 at 09:19:18AM -0400, Santosh Shilimkar wrote:
>>> Rob, Russell,
>>>
>>> On Thursday 24 April 2014 11:30 AM, S
On Tuesday 29 April 2014 03:07 AM, Lad Prabhakar wrote:
> From: "Lad, Prabhakar"
>
> this patch removes COMMON_CLK_DEBUG config option
> from defconfig file as this config option is obsolete.
>
> Signed-off-by: Lad, Prabhakar
> ---
> Changes for v2:
> a> Dropped imx defconfig files as suggest
On Thursday 08 May 2014 06:31 PM, Ivan Khoronzhuk wrote:
> From: Sandeep Paulraj
>
> It is needed for k2l keystone2 EVM which uses NAND flash with 4K page
> size, hence add support for 4K page size nand devices.
>
> Signed-off-by: Sandeep Paulraj
> Signed-off-by: Ivan Khoronzhuk
> ---
>
> Bas
On Wednesday 12 March 2014 12:35 PM, Santosh Shilimkar wrote:
> On Wednesday 12 March 2014 11:48 PM, Felipe Balbi wrote:
>> Currently, even when building keystone only
>> kernel builds, DTB won't get build because
>> we lack a Makefile rule to get it compiled.
>>
On Monday 24 March 2014 07:55 PM, Stephen Rothwell wrote:
> Hi Santosh,
>
> Today's linux-next merge of the keystone tree got a conflict in
> arch/arm/boot/dts/Makefile between commit ba5a37e52194 ("ARM: mvebu: Move
> kirkwood DT boards into mach-mvebu") from the arm-soc tree and commit
> 400550ae
On Monday 24 March 2014 09:23 PM, Balbi, Felipe wrote:
> On Mon, Mar 24, 2014 at 08:00:03PM -0400, Santosh Shilimkar wrote:
>> On Monday 24 March 2014 07:55 PM, Stephen Rothwell wrote:
>>> Hi Santosh,
>>>
>>> Today's linux-next merge of the keystone tre
On Friday 21 March 2014 10:43 AM, Felipe Balbi wrote:
> On Fri, Mar 21, 2014 at 10:40:00AM -0400, Santosh Shilimkar wrote:
>> On Wednesday 12 March 2014 12:35 PM, Santosh Shilimkar wrote:
>>> On Wednesday 12 March 2014 11:48 PM, Felipe Balbi wrote:
>>>> Currently, ev
Arnd, Rob,
On Friday 14 March 2014 01:25 PM, Arnd Bergmann wrote:
> On Friday 14 March 2014, Rob Herring wrote:
>> On Wed, Mar 12, 2014 at 11:58 AM, Arnd Bergmann wrote:
>>> On Wednesday 12 March 2014 15:19:48 Grygorii Strashko wrote:
> Isn't the question here how do we handle restrictions ad
On Wednesday 16 April 2014 05:47 AM, Ivan Khoronzhuk wrote:
>
> On 04/16/2014 10:08 AM, Brian Norris wrote:
>> On Tue, Apr 08, 2014 at 03:51:34PM +0300, Ivan Khoronzhuk wrote:
>>> On 03/20/2014 10:14 PM, Santosh Shilimkar wrote:
>>>> On Thursday 20 March 201
On Monday 09 June 2014 09:59 AM, Santosh Shilimkar wrote:
> On Sunday 08 June 2014 10:13 PM, Fabio Estevam wrote:
>> On Thu, Jun 5, 2014 at 12:22 PM, Santosh Shilimkar
>> wrote:
>>> Recently we introduced the generic device tree infrastructure for couple of
>>>
eries posted to the mailing list.
>>>
>>> CC: Santosh Shilimkar
>>> CC: Russell King
>>> CC: Grant Likely
>>> CC: Rob Herring
>>> CC: Mohit Kumar
>>> CC: Jingoo Han
>>> CC: Bjorn Helgaas
>>> CC: Pratyush Anand
&g
On Friday 20 June 2014 11:50 AM, Rob Herring wrote:
> On Fri, Jun 20, 2014 at 10:04 AM, Santosh Shilimkar
> wrote:
>> On Monday 09 June 2014 09:59 AM, Santosh Shilimkar wrote:
>>> On Sunday 08 June 2014 10:13 PM, Fabio Estevam wrote:
>>>> On Thu, Jun 5, 20
ne 11, 2014 12:21 AM
>>> To: linux-arm-ker...@lists.infradead.org; linux-kernel@vger.kernel.org;
>>> linux-...@vger.kernel.org; devicet...@vger.kernel.org; linux-
>>> d...@vger.kernel.org
>>> Cc: Murali Karicheri; Santosh Shilimkar; Russell King; Grant Likely; Rob
>>> H
On Friday 20 June 2014 02:56 PM, Arnd Bergmann wrote:
> On Friday 20 June 2014 13:17:43 Santosh Shilimkar wrote:
>>>> + dma-coherent;
>>>> + dma-ranges;
>>>> +
>>>> + dwc3@269000
On Friday 20 June 2014 03:46 PM, Rob Herring wrote:
> On Fri, Jun 20, 2014 at 2:02 PM, Santosh Shilimkar
> wrote:
>> On Friday 20 June 2014 02:56 PM, Arnd Bergmann wrote:
>>> On Friday 20 June 2014 13:17:43 Santosh Shilimkar wrote:
>>>>>&g
Signed-off-by: Santosh Shilimkar
---
MAINTAINERS | 26 +-
1 file changed, 25 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 3f2e171..ae6d967 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1052,9 +1052,33 @@ M: Santosh Shilimkar
L
the DW core driver
> functions and required modification in some to support
> the old DW h/w based Keystone driver.
>
> Please review and let me know if you have any comments.
>
> CC: Santosh Shilimkar
> CC: Russell King
> CC: Grant Likely
> CC: Rob Herring
> CC:
em
> See http://www.ti.com/lit/ug/spruhj5/spruhj5.pdf
>
> Hence, reuse Davinci MDIO driver for Keystone 2 and
> enable TI networking for Keystone 2 devices
>
> Signed-off-by: Grygorii Strashko
> ---
Looks good to me.
Reviewed-by: Santosh Shilimkar
> .../devicetree/bin
PHYs from DT only in case if PHY child nodes are explicitly
> + * defined to support backward compatibility with DTs which assume that
> + * Davinci MDIO will always scan the bus for PHYs detection.
> + */
multi line comment is not as per coding style. Please fix that.
Patch as such
On Tuesday 01 July 2014 12:32 PM, Viresh Kumar wrote:
> Drivers supporting multiple clusters or multiple 'struct cpufreq_policy'
> instances may need to keep per-policy data. If the core doesn't support them,
> they might do it in the most unoptimized way: 'per-cpu' data.
>
> This patch adds anoth
+ Lorenzo
On Tuesday 01 July 2014 12:32 PM, Viresh Kumar wrote:
> Create a new routine of_clk_shared_by_cpus() that finds if clock lines are
> shared between two CPUs. This is verified by comparing "clocks" property from
> CPU's DT node.
>
> Returns 1 if clock line is shared between them, 0 if cl
On Tuesday 01 July 2014 12:32 PM, Viresh Kumar wrote:
> CPU clk is not optional for this driver and probe would fail if it couldn't
> find
> a suitable clock.
>
> And so, while calling clk_put() we don't need to validate clocks.
>
> Signed-off-by: Viresh Kumar
&g
On Tuesday 01 July 2014 12:32 PM, Viresh Kumar wrote:
> Two people are maintaining it now, Viresh and Shawn. Add Viresh's details in
> MODULE_AUTHOR() and copyright section.
>
> Suggested-by: Shawn Guo
> Signed-off-by: Viresh Kumar
> ---
> drivers/cpufreq/cpufreq-cpu0.c | 4
> 1 file chang
;t intentional probably.
> Its just that
> we are returning the right error with wrong print message.
>
> Fix print message to convey right error.
>
> Signed-off-by: Viresh Kumar
> ---
> drivers/cpufreq/cpufreq-cpu0.c | 13 +++--
> 1 file changed,
gs as suggested by Stephen,
patch looks good to me.
Acked-by: Santosh Shilimkar
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ned-off-by: Viresh Kumar
> ---
> drivers/cpufreq/cpufreq-cpu0.c | 32 ++--
> 1 file changed, 18 insertions(+), 14 deletions(-)
>
Looks good to me.
Acked-by: Santosh Shilimkar
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On Tuesday 01 July 2014 12:32 PM, Viresh Kumar wrote:
> Currently this driver only support platforms on which all CPUs share clock &
> voltage lines and there is requirement to support platforms which have
> separate
> clock & voltage lines for CPUs, like Qualcomm's Krait and ARM's big LITTLE.
>
On Wednesday 09 July 2014 11:08 AM, Viresh Kumar wrote:
> On 9 July 2014 20:12, Santosh Shilimkar wrote:
>> Not related to this patch but I think its time to change
>> the name of this driver. I never liked this 'cpufreq-cpu0.c'
>> and already mentioned that durin
On Wednesday 09 July 2014 11:17 AM, Viresh Kumar wrote:
> On 9 July 2014 20:23, Santosh Shilimkar wrote:
>> I scanned this patch and subsequent patches from the series. Since you are
>> modifying the interfaces and bindings, I just think its better if we can
>> address the
On Wednesday 09 July 2014 11:27 AM, Viresh Kumar wrote:
> On 9 July 2014 20:56, Santosh Shilimkar wrote:
>>>> We still *don't* support platforms with separate clock/voltage lines for
>>>> CPUs.
>>>> This would be done in a separate patch.
>
>
On Thursday 10 July 2014 08:39 AM, Nishanth Menon wrote:
> On Thu, Jul 10, 2014 at 6:19 AM, Viresh Kumar wrote:
>> On 9 July 2014 20:14, Santosh Shilimkar wrote:
>>> Assuming you are updating bidnings as suggested by Stephen,
>>> patch looks good to me.
>>> Ac
t;
:D
> While at it, update coverage to the current year and update the template
> to remove redundant information and use the standard boiler plate
> licensing.
>
> Signed-off-by: Nishanth Menon
> ---
Acked-by: Santosh Shilimkar
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> ---
>
Acked-by: Santosh Shilimkar
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ts.
>
> This series cleansup omap_l3_noc driver and adds data to support DRA7
> and AM437x SoCs.
>
I looked at the series and its looks pretty good. Thanks for fixups, updates.
For whole series,
Acked-by: Santosh Shilimkar
> Patches(including Peter's) is available here:
>
On Thursday 17 April 2014 04:49 PM, Nishanth Menon wrote:
> we do not use iclk directly anymore. And, even if we had to, we
> should be using pm_runtime APIs to do the same to be completely SoC
> independent.
>
> Signed-off-by: Nishanth Menon
> ---
Acked-by: Santosh Shilimkar
On Thursday 17 April 2014 05:52 PM, Felipe Balbi wrote:
> Hi,
>
> On Thu, Apr 17, 2014 at 03:49:21PM -0500, Nishanth Menon wrote:
>> Currently we use __raw_readl and writel in this driver, however, there
>
> __raw_* and *_relaxed variants are the same, just have a look
>
Except the relaxed vers
On a 32 bit ARM architecture with LPAE extension physical addresses
cannot fit into unsigned long variable.
So fix it by using phys_addr_t instead of unsigned long.
Signed-off-by: Santosh Shilimkar
---
arch/arm/mm/dma-mapping.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
artman
Cc: Russell King
Cc: Arnd Bergmann
Cc: Olof Johansson
Cc: Grant Likely
Cc: Rob Herring
Cc: Catalin Marinas
Cc: Linus Walleij
Signed-off-by: Santosh Shilimkar
Signed-off-by: Grygorii Strashko
---
drivers/of/platform.c | 23 +++
include/linux/of_platfor
artman
Cc: Russell King
Cc: Arnd Bergmann
Cc: Olof Johansson
Cc: Grant Likely
Cc: Rob Herring
Cc: Catalin Marinas
Cc: Linus Walleij
Signed-off-by: Grygorii Strashko
Signed-off-by: Santosh Shilimkar
---
arch/arm/include/asm/dma-mapping.h | 17 +
1 file changed, 13 inse
ely
Cc: Rob Herring
Cc: Catalin Marinas
Cc: Linus Walleij
Signed-off-by: Grygorii Strashko
Signed-off-by: Santosh Shilimkar
---
drivers/of/platform.c | 43 +++
include/linux/dma-mapping.h |7 +++
2 files changed, 50 insertions(+)
di
Implement the set_arch_dma_coherent_ops() for ARM architecture.
Cc: Greg Kroah-Hartman
Cc: Russell King
Cc: Arnd Bergmann
Cc: Olof Johansson
Cc: Grant Likely
Cc: Rob Herring
Cc: Catalin Marinas
Cc: Linus Walleij
Signed-off-by: Grygorii Strashko
Signed-off-by: Santosh Shilimkar
---
arch
e init code while creating the devices.
Cc: Greg Kroah-Hartman
Cc: Russell King
Cc: Arnd Bergmann
Cc: Olof Johansson
Cc: Grant Likely
Cc: Rob Herring
Cc: Catalin Marinas
Cc: Linus Walleij
Signed-off-by: Grygorii Strashko
Signed-off-by: Santosh Shilimkar
---
include/linux/device.h |2
Greg Kroah-Hartman
Cc: Russell King
Cc: Arnd Bergmann
Cc: Olof Johansson
Cc: Grant Likely
Cc: Rob Herring
Cc: Catalin Marinas
Cc: Linus Walleij
Signed-off-by: Grygorii Strashko
Signed-off-by: Santosh Shilimkar
---
drivers/of/platform.c | 85 ++
ntroduce of_dma_get_range() helper
ARM: dma: Use dma_pfn_offset for dma address translation
Santosh Shilimkar (5):
device: introduce per device dma_pfn_offset
of: introduce of_dma_is_coherent() helper
of: configure the platform device dma parameters
ARM: dma: implement set_arch_dma_cohere
On Saturday 19 April 2014 12:25 PM, Thomas Petazzoni wrote:
> Dear Santosh Shilimkar,
>
> On Sat, 19 Apr 2014 10:32:45 -0400, Santosh Shilimkar wrote:
>> Here is an updated version of [2] based on discussion. Series introduces
>> support for setting up dma parameters
On Saturday 19 April 2014 03:43 PM, Russell King - ARM Linux wrote:
> On Sat, Apr 19, 2014 at 10:32:50AM -0400, Santosh Shilimkar wrote:
>> From: Grygorii Strashko
>>
>> In most of cases DMA addresses can be performed using offset value of
>> Bus address space rel
(Adding few CC's)
On Saturday 19 April 2014 10:32 AM, Santosh Shilimkar wrote:
> On a 32 bit ARM architecture with LPAE extension physical addresses
> cannot fit into unsigned long variable.
>
> So fix it by using phys_addr_t instead of unsigned long.
>
> Signed-of
Hi Rob,
On Monday 21 April 2014 10:37 AM, Rob Herring wrote:
> On Sat, Apr 19, 2014 at 9:32 AM, Santosh Shilimkar
> wrote:
>> Here is an updated version of [2] based on discussion. Series introduces
>> support for setting up dma parameters based on device tree properties
>&g
On Monday 21 April 2014 11:35 AM, Rob Herring wrote:
> On Mon, Apr 21, 2014 at 10:13 AM, Santosh Shilimkar
> wrote:
>> Hi Rob,
>>
>> On Monday 21 April 2014 10:37 AM, Rob Herring wrote:
>>> On Sat, Apr 19, 2014 at 9:32 AM, Santosh Shilimkar
>>> wrote:
&g
On Monday 21 April 2014 02:19 PM, Thomas Petazzoni wrote:
> Dear Santosh Shilimkar,
>
> On Mon, 21 Apr 2014 09:35:25 -0400, Santosh Shilimkar wrote:
>
>>> In mach-mvebu, what we do is that we register a bus notifier on the
>>> platform bus, so that we can set our
On Wednesday 23 July 2014 11:10 AM, Linus Walleij wrote:
> On Wed, Jul 16, 2014 at 12:43 PM, Grygorii Strashko
> wrote:
>
>> From: Murali Karicheri
>>
>> On Keystone SOCs, ARM host can send interrupts to DSP cores using the
>> DSP GPIO controller IP. Each DSP GPIO controller provides 28 IRQ sign
On Thursday 24 July 2014 10:12 AM, Linus Walleij wrote:
> On Wed, Jul 23, 2014 at 5:25 PM, Santosh Shilimkar
> wrote:
>
>> I will try to answer this. This IP is indeed a GPIO block
>> but the IO's are used just OUTPUT lines from Linux
>> HOST perspective. The
On Thursday 24 July 2014 11:23 AM, Linus Walleij wrote:
> On Thu, Jul 24, 2014 at 4:21 PM, Santosh Shilimkar
> wrote:
>> On Thursday 24 July 2014 10:12 AM, Linus Walleij wrote:
>>> On Wed, Jul 23, 2014 at 5:25 PM, Santosh Shilimkar
>>> wrote:
>>>
>>&g
On Thursday 24 July 2014 01:19 PM, Jassi Brar wrote:
> On 23 July 2014 20:40, Linus Walleij wrote:
>> On Wed, Jul 16, 2014 at 12:43 PM, Grygorii Strashko
>> wrote:
>>
>>> From: Murali Karicheri
>>>
>>> On Keystone SOCs, ARM host can send interrupts to DSP cores using the
>>> DSP GPIO controller
On Thursday 24 July 2014 02:52 PM, Suman Anna wrote:
> Hi,
>
> On 07/24/2014 01:12 PM, Jassi Brar wrote:
>> On 24 July 2014 22:52, Santosh Shilimkar wrote:
>>> On Thursday 24 July 2014 01:19 PM, Jassi Brar wrote:
>>>> On 23 July 2014 20:40, Linus Walleij wro
Gala
Signed-off-by: Grygorii Strashko
Signed-off-by: Santosh Shilimkar
---
Documentation/devicetree/booting-without-of.txt | 60 +++
1 file changed, 60 insertions(+)
diff --git a/Documentation/devicetree/booting-without-of.txt
b/Documentation/devicetree/booting-without-
601 - 700 of 1304 matches
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