RFC: Bug in generic_forget_inode() ?

2005-03-18 Thread Russ Weight
ata.nrpages) truncate_inode_pages(&inode->i_data, 0); clear_inode(inode); destroy_inode(inode); } -- - Russ Russ Weight IBM Linux Technology Center (LTC) (503) 578-3461, T/L 775-3461 [EMAIL PROTECTED] - To unsubscribe from this list: send the line "unsubsc

Re: RFC: Bug in generic_forget_inode() ?

2005-03-18 Thread Russ Weight
On Fri, 2005-03-18 at 14:17 -0800, Andrew Morton wrote: > Russ Weight <[EMAIL PROTECTED]> wrote: > > > > generic_forget_inode() is eventually called (within the context of > > iput), the inode is placed on the unused list, and the inode_lock is > > dropped. &g

Re: RFC: Bug in generic_forget_inode() ?

2005-03-30 Thread Russ Weight
On Fri, 2005-03-18 at 16:11 -0800, Andrew Morton wrote: > Russ Weight <[EMAIL PROTECTED]> wrote: > > > > On Fri, 2005-03-18 at 14:17 -0800, Andrew Morton wrote: > > > Russ Weight <[EMAIL PROTECTED]> wrote: > > > > > > > > generi

[PATCH] Set MS_ACTIVE in isofs_fill_super()

2005-03-30 Thread Russ Weight
This patch sets the MS_ACTIVE bit in isofs_fill_super() prior to calling iget() or iput(). This eliminates a race condition between mount (for isofs) and kswapd that results in a system panic. Signed-off-by: Russ Weight <[EMAIL PROTECTED]> --- linux-2.6.12-rc1/fs/isofs/inode.c 2005-03-17

Re: [PATCH] Set MS_ACTIVE in isofs_fill_super()

2005-03-30 Thread Russ Weight
On Wed, 2005-03-30 at 12:39 -0800, Andrew Morton wrote: > Russ Weight <[EMAIL PROTECTED]> wrote: > > > > This patch sets the MS_ACTIVE bit in isofs_fill_super() prior to calling > > iget() or iput(). This eliminates a race condition between mount > > (for isofs) an

[RFC] [PATCH] Set MS_ACTIVE bit before calling ->fill_super functions

2005-04-01 Thread Russ Weight
This patch changes all cases where the MS_ACTIVE bit gets set. This is done to eliminate a race condition that can occur if an inode is allocated and then released (using iput) during the ->fill_super functions. The race condition is between kswapd and mount. For most filesystems this can only hap

Re: [PATCH v9 0/7] FPGA Security Manager Class Driver

2021-02-16 Thread Russ Weight
I believe all of the dependencies have been accepted now. - Russ On 2/15/21 6:56 AM, Tom Rix wrote: > Russ, Moritz > > This patchset still applies. > > Updating the fpga is a fairly important feature. > > Are there any dependencies we are waiting on ? > > Tom > &g

Re: [PATCHv5 0/7] Extend Intel service layer, FPGA manager and region

2021-04-07 Thread Russ Weight
Hi Moritz, On 3/31/21 3:16 PM, Moritz Fischer wrote: > Hi Russ, > On Wed, Mar 31, 2021 at 11:47:26AM -0700, Russ Weight wrote: >> Moritz, >> >> On 3/28/21 10:20 AM, Moritz Fischer wrote: >>> Tom, >>> >>> On Sun, Mar 28, 2021 at 08:40:24AM -07

[PATCH v7 1/1] fpga: dfl: afu: harden port enable logic

2021-02-23 Thread Russ Weight
Port enable is not complete until ACK = 0. Change __afu_port_enable() to guarantee that the enable process is complete by polling for ACK == 0. Signed-off-by: Russ Weight Reviewed-by: Tom Rix Reviewed-by: Matthew Gerlach Acked-by: Wu Hao --- v7: - Added Acked-by tag from Wu Hao v6

Re: [PATCH v2 1/1] fpga: dfl: afu: harden port enable logic

2021-02-02 Thread Russ Weight
Sorry for the delay on this patch. It seemed like a lower priority patch than others, since we haven't seen any issues with current products. Please my responses inline. On 9/17/20 7:08 PM, Wu, Hao wrote: >> -Original Message- >> From: Russ Weight >> Sent: Friday,

Re: [PATCH v2 1/1] fpga: dfl: afu: harden port enable logic

2021-02-02 Thread Russ Weight
On 9/17/20 1:28 PM, Tom Rix wrote: > On 9/17/20 11:32 AM, Russ Weight wrote: >> Port enable is not complete until ACK = 0. Change >> __afu_port_enable() to guarantee that the enable process >> is complete by polling for ACK == 0. >> >> Signed-off-by: Russ Weight

Re: [PATCH v2 1/1] fpga: dfl: afu: harden port enable logic

2021-02-02 Thread Russ Weight
On 2/2/21 12:32 PM, Russ Weight wrote: > > On 9/17/20 1:28 PM, Tom Rix wrote: >> On 9/17/20 11:32 AM, Russ Weight wrote: >>> Port enable is not complete until ACK = 0. Change >>> __afu_port_enable() to guarantee that the enable process >>> is complete by p

Re: [PATCH v2 1/1] fpga: dfl: afu: harden port enable logic

2021-02-02 Thread Russ Weight
On 9/17/20 2:38 PM, Moritz Fischer wrote: > On Thu, Sep 17, 2020 at 01:28:22PM -0700, Tom Rix wrote: >> On 9/17/20 11:32 AM, Russ Weight wrote: >>> Port enable is not complete until ACK = 0. Change >>> __afu_port_enable() to guarantee that the enable process >>

[PATCH v3 1/1] fpga: dfl: afu: harden port enable logic

2021-02-02 Thread Russ Weight
Port enable is not complete until ACK = 0. Change __afu_port_enable() to guarantee that the enable process is complete by polling for ACK == 0. Signed-off-by: Russ Weight --- v3: - afu_port_err_clear() changed to prioritize port_enable failure over other a detected mismatch in port errors

Re: [PATCH v2 1/1] fpga: dfl: afu: harden port enable logic

2021-02-03 Thread Russ Weight
Please my >> responses inline. >> >> On 9/17/20 7:08 PM, Wu, Hao wrote: >>>> -Original Message- >>>> From: Russ Weight >>>> Sent: Friday, September 18, 2020 2:32 AM >>>> To: m...@kernel.org; linux-f...@vger.kernel.org; linux- >

Re: [PATCH v3 1/1] fpga: dfl: afu: harden port enable logic

2021-02-03 Thread Russ Weight
On 2/3/21 1:01 AM, Wu, Hao wrote: >> Subject: [PATCH v3 1/1] fpga: dfl: afu: harden port enable logic >> >> Port enable is not complete until ACK = 0. Change >> __afu_port_enable() to guarantee that the enable process >> is complete by polling for ACK == 0. &g

Re: [PATCH v3 1/1] fpga: dfl: afu: harden port enable logic

2021-02-03 Thread Russ Weight
On 2/3/21 7:25 AM, Tom Rix wrote: > ..snip.. > > On 2/2/21 3:06 PM, Russ Weight wrote: >> diff --git a/drivers/fpga/dfl-afu.h b/drivers/fpga/dfl-afu.h >> index 576e94960086..e5020e2b1f3d 100644 >> --- a/drivers/fpga/dfl-afu.h >> +++ b/drivers/fpga/dfl-afu.h &g

Re: [PATCH v3 1/1] fpga: dfl: afu: harden port enable logic

2021-02-04 Thread Russ Weight
hat the enable process >>>> is complete by polling for ACK == 0. >>>> >>>> Signed-off-by: Russ Weight >>>> --- >>>> v3: >>>> - afu_port_err_clear() changed to prioritize port_enable failure over >>>> other

[PATCH v4 1/1] fpga: dfl: afu: harden port enable logic

2021-02-04 Thread Russ Weight
Port enable is not complete until ACK = 0. Change __afu_port_enable() to guarantee that the enable process is complete by polling for ACK == 0. Reviewed-by: Tom Rix Signed-off-by: Russ Weight --- v4: - Added a dev_warn() call for the -EINVAL case of afu_port_err_clear() - Modified dev_err

[PATCH v5 1/1] fpga: dfl: afu: harden port enable logic

2021-02-05 Thread Russ Weight
Port enable is not complete until ACK = 0. Change __afu_port_enable() to guarantee that the enable process is complete by polling for ACK == 0. Reviewed-by: Tom Rix Reviewed-by: Matthew Gerlach Signed-off-by: Russ Weight --- v5: - Added Reviewed-by tag to commit message v4: - Added a

Re: [PATCH v5 1/1] fpga: dfl: afu: harden port enable logic

2021-02-08 Thread Russ Weight
On 2/6/21 12:46 PM, Moritz Fischer wrote: > Russ, > > On Fri, Feb 05, 2021 at 10:25:21AM -0800, Russ Weight wrote: >> Port enable is not complete until ACK = 0. Change >> __afu_port_enable() to guarantee that the enable process >> is complete by polling for ACK == 0.

Re: [PATCH v7 1/7] fpga: sec-mgr: fpga security manager class driver

2020-12-07 Thread Russ Weight
On 12/4/20 11:45 AM, Randy Dunlap wrote: > Hi-- > > On 12/3/20 1:09 PM, Russ Weight wrote: > >> --- >> diff --git a/Documentation/fpga/fpga-sec-mgr.rst >> b/Documentation/fpga/fpga-sec-mgr.rst >> new file mode 100644 >> index ..26dac599ea

Re: [PATCH v3 1/1] mfd: intel-m10-bmc: expose mac address and count

2021-01-14 Thread Russ Weight
On 1/14/21 5:23 AM, Lee Jones wrote: > On Tue, 05 Jan 2021, Russ Weight wrote: > >> Create two sysfs entries for exposing the MAC address >> and count from the MAX10 BMC register space. The MAC >> address is the first in a sequential block of MAC addresses >> reser

[PATCH v4 0/1] mfd: intel-m10-bmc: add sysfs files for mac_address

2021-01-14 Thread Russ Weight
n for the mac_address and mac_count sysfs nodes to clearify their usage. - Changed sysfs _show() functions to use sysfs_emit() instead of sprintf. Russ Weight (1): mfd: intel-m10-bmc: expose mac address and count .../ABI/testing/sysfs-driver-intel-m10-bmc| 21 + drivers/mfd/

[PATCH v4 1/1] mfd: intel-m10-bmc: expose mac address and count

2021-01-14 Thread Russ Weight
Create two sysfs entries for exposing the MAC address and count from the MAX10 BMC register space. The MAC address is the first in a sequential block of MAC addresses reserved for the FPGA card. The MAC count is the number of MAC addresses in the reserved block. Signed-off-by: Russ Weight Signed

Re: [PATCH v8 1/1] fpga: dfl: afu: harden port enable logic

2021-03-23 Thread Russ Weight
On 3/2/21 5:45 PM, Russ Weight wrote: > Port enable is not complete until ACK = 0. Change > __afu_port_enable() to guarantee that the enable process > is complete by polling for ACK == 0. > > Signed-off-by: Russ Weight > Reviewed-by: Tom Rix > Reviewed-by: Matthew Gerlac

[PATCH v9 1/1] fpga: dfl: afu: harden port enable logic

2021-03-23 Thread Russ Weight
Port enable is not complete until ACK = 0. Change __afu_port_enable() to guarantee that the enable process is complete by polling for ACK == 0. Signed-off-by: Russ Weight Reviewed-by: Tom Rix Reviewed-by: Matthew Gerlach Acked-by: Wu Hao --- v9: - Fix the sense of the if condition in

Re: [PATCHv5 0/7] Extend Intel service layer, FPGA manager and region

2021-03-31 Thread Russ Weight
Moritz, On 3/28/21 10:20 AM, Moritz Fischer wrote: > Tom, > > On Sun, Mar 28, 2021 at 08:40:24AM -0700, Tom Rix wrote: >> On 3/27/21 11:09 AM, Moritz Fischer wrote: >>> Hi Richard, Russ, >>> >>> On Thu, Feb 25, 2021 at 01:07:14PM +, Gong, Richard wrote: Hi Moritz, Sorry for aski

[PATCH v8 1/1] fpga: dfl: afu: harden port enable logic

2021-03-03 Thread Russ Weight
Port enable is not complete until ACK = 0. Change __afu_port_enable() to guarantee that the enable process is complete by polling for ACK == 0. Signed-off-by: Russ Weight Reviewed-by: Tom Rix Reviewed-by: Matthew Gerlach Acked-by: Wu Hao --- v8: - Rebased to 5.12-rc1 (there were no

[RESEND PATCH v10 1/7] fpga: sec-mgr: fpga security manager class driver

2021-03-22 Thread Russ Weight
file and is decoded by the HW/FW secure update engine. Signed-off-by: Russ Weight Signed-off-by: Xu Yilun Reviewed-by: Tom Rix --- v10: - Rebased to 5.12-rc2 next - Updated Date and KernelVersion in ABI documentation v9: - Updated Date and KernelVersion in ABI documentation v8: - Fixed

[RESEND PATCH v10 0/7] FPGA Security Manager Class Driver

2021-03-22 Thread Russ Weight
progress()) - Removed references to bmc_flash_count & smbus_flash_count (not supported) - Removed typedefs for imgr ops - Removed explicit value assignments in enums - Other minor code cleanup per review comments Russ Weight (7): fpga: sec-mgr: fpga security manager class driver fpg

[RESEND PATCH v10 2/7] fpga: sec-mgr: enable secure updates

2021-03-22 Thread Russ Weight
cause a secure update to occur. The write of the filename will return immediately, and the update will begin in the context of a kernel worker thread. This tool utilizes the request_firmware framework, which requires that the image file reside under /lib/firmware. Signed-off-by: Russ Weight

[RESEND PATCH v10 4/7] fpga: sec-mgr: expose sec-mgr update errors

2021-03-22 Thread Russ Weight
Extend the FPGA Security Manager class driver to include an update/error sysfs node that can be read for error information when a secure update fails. Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v10: - Rebased to 5.12-rc2 next - Updated Date and KernelVersion in ABI documentation v9

[RESEND PATCH v10 5/7] fpga: sec-mgr: expose sec-mgr update size

2021-03-22 Thread Russ Weight
be signaled by sysfs_notify() on each state change. +What: /sys/class/fpga_sec_mgr/fpga_secX/update/remaining_size +Date: April 2021 +KernelVersion: 5.13 +Contact: Russ Weight +Description: Read-only. Returns the size of data that remains to + be wr

[RESEND PATCH v10 7/7] fpga: sec-mgr: expose hardware error info

2021-03-22 Thread Russ Weight
feature. This data is treated as opaque by the class driver. It is left to user-space software or support personnel to interpret this data. Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v10: - Rebased to 5.12-rc2 next - Updated Date and KernelVersion in ABI documentation v9: - Updated

[RESEND PATCH v10 3/7] fpga: sec-mgr: expose sec-mgr update status

2021-03-22 Thread Russ Weight
Extend the FPGA Security Manager class driver to include an update/status sysfs node that can be polled and read to monitor the progress of an ongoing secure update. Sysfs_notify() is used to signal transitions between different phases of the update process. Signed-off-by: Russ Weight Reviewed

[RESEND PATCH v10 6/7] fpga: sec-mgr: enable cancel of secure update

2021-03-22 Thread Russ Weight
. Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v10: - Rebased to 5.12-rc2 next - Updated Date and KernelVersion in ABI documentation v9: - Updated Date and KernelVersion in ABI documentation v8: - No change v7: - Changed Date in documentation file to December 2020 v6: - No change

[PATCH v11 0/5] Intel MAX10 BMC Secure Update Driver

2021-03-15 Thread Russ Weight
m10bmc_raw_bulk_read(). - Added m10bmc_ prefix to functions in m10bmc_iops structure - Implemented HW_ERRINFO_POISON for m10bmc_sec_hw_errinfo() to ensure that corresponding bits are set to 1 if we are unable to read the doorbell or auth_result registers. - Added comments and addi

[PATCH v11 3/5] fpga: m10bmc-sec: expose max10 canceled keys in sysfs

2021-03-15 Thread Russ Weight
Extend the MAX10 BMC Secure Update driver to provide sysfs files to expose the canceled code signing key (CSK) bit vectors. These use the standard bitmap list format (e.g. 1,2-6,9). Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v11: - No change v10: - Changed the path expressions in

[PATCH v11 4/5] fpga: m10bmc-sec: add max10 secure update functions

2021-03-15 Thread Russ Weight
Extend the MAX10 BMC Secure Update driver to include the functions that enable secure updates of BMC images, FPGA images, etc. Signed-off-by: Russ Weight --- v11: - No change v10: - No change v9: - No change v8: - Previously patch 5/6, otherwise no change v7: - No change v6

[PATCH v11 1/5] fpga: m10bmc-sec: create max10 bmc secure update driver

2021-03-15 Thread Russ Weight
images. This patch creates the MAX10 BMC Secure Update driver and provides sysfs files for displaying the current root entry hashes for the FPGA static region, the FPGA PR region, and the MAX10 BMC. Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v11: - Added Reviewed-by tag v10

[PATCH v11 5/5] fpga: m10bmc-sec: add max10 get_hw_errinfo callback func

2021-03-15 Thread Russ Weight
Extend the MAX10 BMC Secure Update driver to include a function that returns 64 bits of additional HW specific data for errors that require additional information. This callback function enables the hw_errinfo sysfs node in the Intel Security Manager class driver. Signed-off-by: Russ Weight

[PATCH v11 2/5] fpga: m10bmc-sec: expose max10 flash update count

2021-03-15 Thread Russ Weight
Extend the MAX10 BMC Secure Update driver to provide a sysfs file to expose the flash update count for the FPGA user image. Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v11: - No change v10: - Changed the path expression in the sysfs documentation to replace the n3000 reference

[PATCH v9 1/1] mfd: intel-m10-bmc: support for MAX10 BMC Secure Updates

2021-04-12 Thread Russ Weight
Add macros and definitions required by the MAX10 BMC Secure Update driver. Signed-off-by: Russ Weight Acked-by: Lee Jones --- v9: - Rebased on next-20210412 v8: - Previously patch 1/6 in "Intel MAX10 BMC Secure Update Driver" - Rebased on next-20210121 v7: - No change v6: -

[PATCH v9 0/1] Intel MAX10 BMC Macros for Secure Update

2021-04-12 Thread Russ Weight
o the Intel MAX10 BMC driver. - Added DRBL_ prefix to some definitions - Some address definitions were moved here from the .c files that use them. Russ Weight (1): mfd: intel-m10-bmc: support for MAX10 BMC Secure Updates include/linux/mfd/intel-m10-bmc.h | 85 +++ 1 file changed, 85 insertions(+) -- 2.25.1

[PATCH v11 0/7] FPGA Security Manager Class Driver

2021-04-12 Thread Russ Weight
Removed typedefs for imgr ops - Removed explicit value assignments in enums - Other minor code cleanup per review comments Russ Weight (7): fpga: sec-mgr: fpga security manager class driver fpga: sec-mgr: enable secure updates fpga: sec-mgr: expose sec-mgr update status fpga: sec-mgr:

[PATCH v11 1/7] fpga: sec-mgr: fpga security manager class driver

2021-04-12 Thread Russ Weight
file and is decoded by the HW/FW secure update engine. Signed-off-by: Russ Weight Signed-off-by: Xu Yilun Reviewed-by: Tom Rix --- v11: - No change v10: - Rebased to 5.12-rc2 next - Updated Date and KernelVersion in ABI documentation v9: - Updated Date and KernelVersion in ABI documentation

[PATCH v11 2/7] fpga: sec-mgr: enable secure updates

2021-04-12 Thread Russ Weight
cause a secure update to occur. The write of the filename will return immediately, and the update will begin in the context of a kernel worker thread. This tool utilizes the request_firmware framework, which requires that the image file reside under /lib/firmware. Signed-off-by: Russ Weight

[PATCH v11 3/7] fpga: sec-mgr: expose sec-mgr update status

2021-04-12 Thread Russ Weight
Extend the FPGA Security Manager class driver to include an update/status sysfs node that can be polled and read to monitor the progress of an ongoing secure update. Sysfs_notify() is used to signal transitions between different phases of the update process. Signed-off-by: Russ Weight Reviewed

[PATCH v11 4/7] fpga: sec-mgr: expose sec-mgr update errors

2021-04-12 Thread Russ Weight
Extend the FPGA Security Manager class driver to include an update/error sysfs node that can be read for error information when a secure update fails. Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v11: - No change v10: - Rebased to 5.12-rc2 next - Updated Date and KernelVersion in

[PATCH v11 6/7] fpga: sec-mgr: enable cancel of secure update

2021-04-12 Thread Russ Weight
. Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v11: - No change v10: - Rebased to 5.12-rc2 next - Updated Date and KernelVersion in ABI documentation v9: - Updated Date and KernelVersion in ABI documentation v8: - No change v7: - Changed Date in documentation file to December 2020

[PATCH v11 7/7] fpga: sec-mgr: expose hardware error info

2021-04-12 Thread Russ Weight
feature. This data is treated as opaque by the class driver. It is left to user-space software or support personnel to interpret this data. Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v11: - No change v10: - Rebased to 5.12-rc2 next - Updated Date and KernelVersion in ABI documentation

[PATCH v11 5/7] fpga: sec-mgr: expose sec-mgr update size

2021-04-12 Thread Russ Weight
will be signaled by sysfs_notify() on each state change. +What: /sys/class/fpga_sec_mgr/fpga_secX/update/remaining_size +Date: April 2021 +KernelVersion: 5.13 +Contact: Russ Weight +Description: Read-only. Returns the size of data that remains to +

[PATCH v6 1/1] fpga: dfl: afu: harden port enable logic

2021-02-22 Thread Russ Weight
Port enable is not complete until ACK = 0. Change __afu_port_enable() to guarantee that the enable process is complete by polling for ACK == 0. Reviewed-by: Tom Rix Reviewed-by: Matthew Gerlach Signed-off-by: Russ Weight --- v6: - Fixed the dev_warn statement, which had "__func__"

Re: [PATCH v5 2/6] fpga: m10bmc-sec: create max10 bmc secure update driver

2020-11-17 Thread Russ Weight
On 11/15/20 5:44 AM, Tom Rix wrote: > On 11/13/20 4:55 PM, Russ Weight wrote: >> Create a platform driver that can be invoked as a sub >> driver for the Intel MAX10 BMC in order to support >> secure updates. This sub-driver will invoke an >> instance of the FPGA Se

Re: [PATCH v5 3/6] fpga: m10bmc-sec: expose max10 flash update count

2020-11-17 Thread Russ Weight
On 11/15/20 12:03 PM, Moritz Fischer wrote: > On Fri, Nov 13, 2020 at 04:55:56PM -0800, Russ Weight wrote: >> Extend the MAX10 BMC Secure Update driver to provide a >> sysfs file to expose the flash update count for the FPGA >> user image. >> >> Signed-off-by:

Re: [PATCH v5 5/6] fpga: m10bmc-sec: add max10 secure update functions

2020-11-17 Thread Russ Weight
On 11/15/20 6:17 AM, Tom Rix wrote: > On 11/13/20 4:55 PM, Russ Weight wrote: >> Extend the MAX10 BMC Secure Update driver to include >> the functions that enable secure updates of BMC images, >> FPGA images, etc. >> >> Signed-off-by: Russ Weight >> --- &

Re: [PATCH v5 6/6] fpga: m10bmc-sec: add max10 get_hw_errinfo callback func

2020-11-17 Thread Russ Weight
On 11/15/20 6:20 AM, Tom Rix wrote: > On 11/13/20 4:55 PM, Russ Weight wrote: >> Extend the MAX10 BMC Secure Update driver to include >> a function that returns 64 bits of additional HW specific >> data for errors that require additional information. >> This ca

[PATCH v6 1/6] mfd: intel-m10-bmc: support for MAX10 BMC Secure Updates

2020-11-18 Thread Russ Weight
Add macros and definitions required by the MAX10 BMC Secure Update driver. Signed-off-by: Russ Weight Acked-by: Lee Jones --- v6: - No change v5: - Renamed USER_FLASH_COUNT to STAGING_FLASH_COUNT v4: - No change v3: - Changed "MAX10 BMC Secure Engine driver" to "M

[PATCH v6 0/6] Intel MAX10 BMC Secure Update Driver

2020-11-18 Thread Russ Weight
read(). - Added m10bmc_ prefix to functions in m10bmc_iops structure - Implemented HW_ERRINFO_POISON for m10bmc_sec_hw_errinfo() to ensure that corresponding bits are set to 1 if we are unable to read the doorbell or auth_result registers. - Added comments and additional code cleanu

[PATCH v6 2/6] fpga: m10bmc-sec: create max10 bmc secure update driver

2020-11-18 Thread Russ Weight
images. This patch creates the MAX10 BMC Secure Update driver and provides sysfs files for displaying the current root entry hashes for the FPGA static region, the FPGA PR region, and the MAX10 BMC. Signed-off-by: Russ Weight --- v6: - Added WARN_ON() call for (sha_num_bytes / stride) to assert

[PATCH v6 3/6] fpga: m10bmc-sec: expose max10 flash update count

2020-11-18 Thread Russ Weight
Extend the MAX10 BMC Secure Update driver to provide a sysfs file to expose the flash update count for the FPGA user image. Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v6: - Changed flash_count_show() parameter list to achieve reverse-christmas tree format. - Added WARN_ON

[PATCH v6 6/6] fpga: m10bmc-sec: add max10 get_hw_errinfo callback func

2020-11-18 Thread Russ Weight
Extend the MAX10 BMC Secure Update driver to include a function that returns 64 bits of additional HW specific data for errors that require additional information. This callback function enables the hw_errinfo sysfs node in the Intel Security Manager class driver. Signed-off-by: Russ Weight

[PATCH v6 4/6] fpga: m10bmc-sec: expose max10 canceled keys in sysfs

2020-11-18 Thread Russ Weight
Extend the MAX10 BMC Secure Update driver to provide sysfs files to expose the canceled code signing key (CSK) bit vectors. These use the standard bitmap list format (e.g. 1,2-6,9). Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v6: - Added WARN_ON() call for (size / stride) to ensure

[PATCH v6 5/6] fpga: m10bmc-sec: add max10 secure update functions

2020-11-18 Thread Russ Weight
Extend the MAX10 BMC Secure Update driver to include the functions that enable secure updates of BMC images, FPGA images, etc. Signed-off-by: Russ Weight --- v6: - Changed (size / stride) calculation to ((size + stride - 1) / stride) to ensure that the proper count is passed to

[PATCH v8 7/7] fpga: sec-mgr: expose hardware error info

2020-12-09 Thread Russ Weight
feature. This data is treated as opaque by the class driver. It is left to user-space software or support personnel to interpret this data. Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v8: - No change v7: - Changed Date in documentation file to December 2020 v6: - No change v5: - No

[PATCH v8 0/7] FPGA Security Manager Class Driver

2020-12-09 Thread Russ Weight
ead_file" to "reading" - Added sec_error() function (similar to sec_progress()) - Removed references to bmc_flash_count & smbus_flash_count (not supported) - Removed typedefs for imgr ops - Removed explicit value assignments in enums - Other minor code cleanup per review commen

[PATCH v8 2/7] fpga: sec-mgr: enable secure updates

2020-12-09 Thread Russ Weight
cause a secure update to occur. The write of the filename will return immediately, and the update will begin in the context of a kernel worker thread. This tool utilizes the request_firmware framework, which requires that the image file reside under /lib/firmware. Signed-off-by: Russ Weight

[PATCH v8 5/7] fpga: sec-mgr: expose sec-mgr update size

2020-12-09 Thread Russ Weight
December 2020 +KernelVersion: 5.11 +Contact: Russ Weight +Description: Read-only. Returns the size of data that remains to + be written to the secure update engine. The size + value is initialized to the full size of the file + image and th

[PATCH v8 4/7] fpga: sec-mgr: expose sec-mgr update errors

2020-12-09 Thread Russ Weight
Extend the FPGA Security Manager class driver to include an update/error sysfs node that can be read for error information when a secure update fails. Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v8: - No change v7: - Changed Date in documentation file to December 2020 v6: - No

[PATCH v8 1/7] fpga: sec-mgr: fpga security manager class driver

2020-12-09 Thread Russ Weight
file and is decoded by the HW/FW secure update engine. Signed-off-by: Russ Weight Signed-off-by: Xu Yilun Reviewed-by: Tom Rix --- v8: - Fixed grammatical error in Documentation/fpga/fpga-sec-mgr.rst v7: - Changed Date in documentation file to December 2020 v6: - Removed sysfs support and

[PATCH v8 6/7] fpga: sec-mgr: enable cancel of secure update

2020-12-09 Thread Russ Weight
. Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v8: - No change v7: - Changed Date in documentation file to December 2020 v6: - No change v5: - No change v4: - Changed from "Intel FPGA Security Manager" to FPGA Security Manager" and removed unnecessary refer

[PATCH v8 3/7] fpga: sec-mgr: expose sec-mgr update status

2020-12-09 Thread Russ Weight
Extend the FPGA Security Manager class driver to include an update/status sysfs node that can be polled and read to monitor the progress of an ongoing secure update. Sysfs_notify() is used to signal transitions between different phases of the update process. Signed-off-by: Russ Weight Reviewed

Re: [PATCH v6 1/7] fpga: sec-mgr: fpga security manager class driver

2020-11-19 Thread Russ Weight
On 11/15/20 3:03 PM, Moritz Fischer wrote: > Hi Russ, > > On Thu, Nov 05, 2020 at 05:08:59PM -0800, Russ Weight wrote: >> Create the FPGA Security Manager class driver. The security >> manager provides interfaces to manage secure updates for the >> FPGA and BMC imag

Re: [PATCH v6 2/7] fpga: sec-mgr: enable secure updates

2020-11-30 Thread Russ Weight
Thanks Martin. I'll work on a fix for this. - Russ On 11/26/20 6:02 AM, Martin Hundebøll wrote: > Hi Russ, > > I found another thing while testing this... > > On 06/11/2020 02.09, Russ Weight wrote: > > > >> +static ssize_t filename_store(struct device *dev

[PATCH v2 1/1] mfd: intel-m10-bmc: expose mac address and count

2020-12-04 Thread Russ Weight
Create two sysfs entries for exposing the MAC address and count from the MAX10 BMC register space. The MAC address is the first in a sequential block of MAC addresses reserved for the FPGA card. The MAC count is the number of MAC addresses in the reserved block. Signed-off-by: Russ Weight Signed

[PATCH v2 0/1] mfd: intel-m10-bmc: add sysfs files for mac_address

2020-12-04 Thread Russ Weight
the documentation for the mac_address and mac_count sysfs nodes to clearify their usage. - Changed sysfs _show() functions to use sysfs_emit() instead of sprintf. Russ Weight (1): mfd: intel-m10-bmc: expose mac address and count .../ABI/testing/sysfs-driver-intel-m10-bmc|

[PATCH v1 1/1] mfd: intel-m10-bmc: expose mac address and count

2020-12-01 Thread Russ Weight
Create two sysfs entries for exposing the MAC address and count from the MAX10 BMC register space. Signed-off-by: Russ Weight Signed-off-by: Xu Yilun --- .../ABI/testing/sysfs-driver-intel-m10-bmc| 20 + drivers/mfd/intel-m10-bmc.c | 43

[PATCH v1 0/1] mfd: intel-m10-bmc: add sysfs files for mac_address

2020-12-01 Thread Russ Weight
Add two sysfs nodes to the Intel MAX10 BMC driver: mac_address and mac_count. The mac_address provides the first of a series of sequential MAC addresses assigned to the FPGA card. The mac_count indicates how many MAC addresses are assigned to the card. Russ Weight (1): mfd: intel-m10-bmc

Re: [PATCH v6 2/7] fpga: sec-mgr: enable secure updates

2020-12-01 Thread Russ Weight
On 12/1/20 12:47 AM, Martin Hundebøll wrote: > Hi Russ, > > On 01/12/2020 00.54, Russ Weight wrote: >> Thanks Martin. I'll work on a fix for this. > > Attached is my in-house fix. > > // Martin > >> On 11/26/20 6:02 AM, Martin Hundebøll wrote: >>

Re: [PATCH v1 1/1] mfd: intel-m10-bmc: expose mac address and count

2020-12-02 Thread Russ Weight
On 12/2/20 5:44 AM, Tom Rix wrote: > On 12/1/20 12:36 PM, Russ Weight wrote: >> Create two sysfs entries for exposing the MAC address >> and count from the MAX10 BMC register space. >> >> Signed-off-by: Russ Weight >> Signed-off-by: Xu Yilun >> --- >

[PATCH v7 0/7] FPGA Security Manager Class Driver

2020-12-03 Thread Russ Weight
- Removed references to bmc_flash_count & smbus_flash_count (not supported) - Removed typedefs for imgr ops - Removed explicit value assignments in enums - Other minor code cleanup per review comments Russ Weight (7): fpga: sec-mgr: fpga security manager class driver fpga: sec-mg

[PATCH v7 3/7] fpga: sec-mgr: expose sec-mgr update status

2020-12-03 Thread Russ Weight
Extend the FPGA Security Manager class driver to include an update/status sysfs node that can be polled and read to monitor the progress of an ongoing secure update. Sysfs_notify() is used to signal transitions between different phases of the update process. Signed-off-by: Russ Weight Reviewed

[PATCH v7 1/7] fpga: sec-mgr: fpga security manager class driver

2020-12-03 Thread Russ Weight
file and is decoded by the HW/FW secure update engine. Signed-off-by: Russ Weight Signed-off-by: Xu Yilun Reviewed-by: Tom Rix --- v7: - Changed Date in documentation file to December 2020 v6: - Removed sysfs support and documentation for the display of the flash count, root entry hashes

[PATCH v7 4/7] fpga: sec-mgr: expose sec-mgr update errors

2020-12-03 Thread Russ Weight
Extend the FPGA Security Manager class driver to include an update/error sysfs node that can be read for error information when a secure update fails. Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v7: - Changed Date in documentation file to December 2020 v6: - No change v5: - Use

[PATCH v7 6/7] fpga: sec-mgr: enable cancel of secure update

2020-12-03 Thread Russ Weight
. Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v7: - Changed Date in documentation file to December 2020 v6: - No change v5: - No change v4: - Changed from "Intel FPGA Security Manager" to FPGA Security Manager" and removed unnecessary references to "Intel

[PATCH v7 5/7] fpga: sec-mgr: expose sec-mgr update size

2020-12-03 Thread Russ Weight
Extend the FPGA Security Manager class driver to include an update/remaining_size sysfs node that can be read to determine how much data remains to be transferred to the secure update engine. This file can be used to monitor progress during the "writing" phase of an update. Signed-of

[PATCH v7 2/7] fpga: sec-mgr: enable secure updates

2020-12-03 Thread Russ Weight
cause a secure update to occur. The write of the filename will return immediately, and the update will begin in the context of a kernel worker thread. This tool utilizes the request_firmware framework, which requires that the image file reside under /lib/firmware. Signed-off-by: Russ Weight

[PATCH v7 7/7] fpga: sec-mgr: expose hardware error info

2020-12-03 Thread Russ Weight
feature. This data is treated as opaque by the class driver. It is left to user-space software or support personnel to interpret this data. Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v7: - Changed Date in documentation file to December 2020 v6: - No change v5: - No change v4

[PATCH v10 1/5] fpga: m10bmc-sec: create max10 bmc secure update driver

2021-03-12 Thread Russ Weight
images. This patch creates the MAX10 BMC Secure Update driver and provides sysfs files for displaying the current root entry hashes for the FPGA static region, the FPGA PR region, and the MAX10 BMC. Signed-off-by: Russ Weight --- v10: - Changed the path expressions in the sysfs documentation to

[PATCH v10 4/5] fpga: m10bmc-sec: add max10 secure update functions

2021-03-12 Thread Russ Weight
Extend the MAX10 BMC Secure Update driver to include the functions that enable secure updates of BMC images, FPGA images, etc. Signed-off-by: Russ Weight --- v10: - No change v9: - No change v8: - Previously patch 5/6, otherwise no change v7: - No change v6: - Changed (size / stride

[PATCH v10 2/5] fpga: m10bmc-sec: expose max10 flash update count

2021-03-12 Thread Russ Weight
Extend the MAX10 BMC Secure Update driver to provide a sysfs file to expose the flash update count for the FPGA user image. Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v10: - Changed the path expression in the sysfs documentation to replace the n3000 reference with something more

[PATCH v10 0/5] Intel MAX10 BMC Secure Update Driver

2021-03-12 Thread Russ Weight
n m10bmc_iops structure - Implemented HW_ERRINFO_POISON for m10bmc_sec_hw_errinfo() to ensure that corresponding bits are set to 1 if we are unable to read the doorbell or auth_result registers. - Added comments and additional code cleanup per V1 review. Russ Weight (5): fpga: m10b

[PATCH v10 5/5] fpga: m10bmc-sec: add max10 get_hw_errinfo callback func

2021-03-12 Thread Russ Weight
Extend the MAX10 BMC Secure Update driver to include a function that returns 64 bits of additional HW specific data for errors that require additional information. This callback function enables the hw_errinfo sysfs node in the Intel Security Manager class driver. Signed-off-by: Russ Weight

[PATCH v10 3/5] fpga: m10bmc-sec: expose max10 canceled keys in sysfs

2021-03-12 Thread Russ Weight
Extend the MAX10 BMC Secure Update driver to provide sysfs files to expose the canceled code signing key (CSK) bit vectors. These use the standard bitmap list format (e.g. 1,2-6,9). Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v10: - Changed the path expressions in the sysfs

[PATCH v10 1/7] fpga: sec-mgr: fpga security manager class driver

2021-03-08 Thread Russ Weight
file and is decoded by the HW/FW secure update engine. Signed-off-by: Russ Weight Signed-off-by: Xu Yilun Reviewed-by: Tom Rix --- v10: - Rebased to 5.12-rc2 next - Updated Date and KernelVersion in ABI documentation v9: - Updated Date and KernelVersion in ABI documentation v8: - Fixed

[PATCH v10 4/7] fpga: sec-mgr: expose sec-mgr update errors

2021-03-08 Thread Russ Weight
Extend the FPGA Security Manager class driver to include an update/error sysfs node that can be read for error information when a secure update fails. Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v10: - Rebased to 5.12-rc2 next - Updated Date and KernelVersion in ABI documentation v9

[PATCH v10 0/7] FPGA Security Manager Class Driver

2021-03-08 Thread Russ Weight
progress()) - Removed references to bmc_flash_count & smbus_flash_count (not supported) - Removed typedefs for imgr ops - Removed explicit value assignments in enums - Other minor code cleanup per review comments Russ Weight (7): fpga: sec-mgr: fpga security manager class driver fpg

[PATCH v10 7/7] fpga: sec-mgr: expose hardware error info

2021-03-08 Thread Russ Weight
feature. This data is treated as opaque by the class driver. It is left to user-space software or support personnel to interpret this data. Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v10: - Rebased to 5.12-rc2 next - Updated Date and KernelVersion in ABI documentation v9: - Updated

[PATCH v10 6/7] fpga: sec-mgr: enable cancel of secure update

2021-03-08 Thread Russ Weight
. Signed-off-by: Russ Weight Reviewed-by: Tom Rix --- v10: - Rebased to 5.12-rc2 next - Updated Date and KernelVersion in ABI documentation v9: - Updated Date and KernelVersion in ABI documentation v8: - No change v7: - Changed Date in documentation file to December 2020 v6: - No change

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