of 0x44008 is 0x0 while the value of
0xC4008 is not, then this patch should help:
https://patchwork.kernel.org/patch/2177841/
>
> That second '{' is the source of the compile error.
> -Chris
>
> --
> Chris Wilson, Intel Open Source Technology Centre
> ___
Hi
2013/2/28 Sedat Dilek :
> On Thu, Feb 28, 2013 at 6:12 PM, Sedat Dilek wrote:
>> On Thu, Feb 28, 2013 at 3:31 PM, Paulo Zanoni wrote:
>>> Hi
>>>
>>> 2013/2/28 Chris Wilson :
>>>> On Thu, Feb 28, 2013 at 12:06:28AM +0100, Sedat Dilek wrote:
>
915: remove crtc disabling special case
>> > drm/i915: move output commit and crtc disabling into set_mode
>> > drm/i915: extract adjusted mode computation
>> > drm/i915: use staged outuput config in tv->mode_fixup
>> > drm/i91
pu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index e0069f4..1c6a3d2 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9579,6 +9579,7 @@ static void intel_init_display(struct drm_device *dev)
>
> if (H
etter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch
> ___
> Intel-gfx mailing list
> intel-...@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Paulo Zanoni
--
T
2014-12-08 12:17 GMT-02:00 Daniel Vetter :
> On Mon, Dec 08, 2014 at 10:32:49AM -0200, Paulo Zanoni wrote:
>> 2014-12-08 6:42 GMT-02:00 Daniel Vetter :
>> > On Sun, Dec 07, 2014 at 07:29:17PM +0100, Rickard Strandqvist wrote:
>> >> Remove the function intel_output_na
093199
>
> --
> keith.pack...@intel.com
>
> ___
> Intel-gfx mailing list
> intel-...@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
--
Paulo Zanoni
--
To unsubscribe from this list: send the line "unsubs
d investigating this problem yesterday and reached the same
conclusion. The connector path can be easily reproduced on i915.ko:
get a machine that has an eDP panel, physically disconnect the panel,
boot the machine, "modprobe i915" and watch the segfault.
Reviewed-by: Paulo Zanoni
Te
99fbe1e5a5bfabb3a8c0505ffd2149
>
>
> 00:02.0 8086:0412 VGA compatible controller: Intel Corporation Xeon E3-1200
> v3/4th Gen Core Processor Integrated Graphics Controller (rev 06)
>
> _______
> Intel-gfx mailing list
> intel-...@lis
d.
Feel free to continue this discussion on the bugzilla report if you want.
Thanks,
Paulo
--
Paulo Zanoni
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordom
So don't forget to reserve its stolen memory bits.
Cc: Ingo Molnar
Cc: H. Peter Anvin
Cc: Ander Conselvan de Oliveira
Cc: x...@kernel.org
Reviewed-by: Ander Conselvan de Oliveira
Signed-off-by: Paulo Zanoni
---
arch/x86/kernel/early-quirks.c | 1 +
1 file changed, 1 insertion(+)
Fou
tions active on hardware into intel_crtc.
>
> Changes since v1:
> - Don't replace alloc->start = alloc->end = 0;
>
> Signed-off-by: Lyude
Reviewed-by: Paulo Zanoni
> Reviewed-by: Maarten Lankhorst
> Cc: Ville Syrjälä
> Cc: Paulo Zanoni
> ---
> driver
wn on all of the copy paste code in here.
>
> Changes since v1:
> - Style nitpicks
> - Fix accidental usage of i vs. PLANE_CURSOR
> - Split out skl_pipe_wm_active_state simplification into separate
> patch
>
> Signed-off-by: Lyude
Reviewed-by: Paulo Zanoni
> Revi
parameter to something more meaningful.
Reviewed-by: Paulo Zanoni
>
> (adding Maarten's reviewed-by since this is just a split-up version
> of one
> of the previous patches)
>
> Signed-off-by: Lyude
> Reviewed-by: Maarten Lankhorst
> Cc: Ville Syrjäl
nges since v1:
> > - Fixup skl_write_wm_level()
> > - Fixup skl_wm_level_from_reg_val()
> > - Don't forget to copy *active to intel_crtc->wm.active.skl
> >
> > Signed-off-by: Lyude
> > Reviewed-by: Maarten Lankhorst
> > Cc: Ville Syrjälä
>
Em Qui, 2016-10-13 às 17:04 -0300, Paulo Zanoni escreveu:
> Em Qui, 2016-10-13 às 15:39 +0200, Maarten Lankhorst escreveu:
> >
> > Op 08-10-16 om 02:11 schreef Lyude:
> > >
> > >
> > > Now that we've make skl_wm_levels make a little more sense, we
Cc: Ville Syrjälä
> Cc: Paulo Zanoni
> ---
> drivers/gpu/drm/i915/intel_pm.c | 57
> +
> 1 file changed, 57 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index 5cb537c..9e5
gt; need this function to be reusable for the next patch.
>
> Signed-off-by: Lyude
> Cc: Maarten Lankhorst
> Cc: Ville Syrjälä
> Cc: Paulo Zanoni
> ---
> drivers/gpu/drm/i915/intel_drv.h | 2 ++
> drivers/gpu/drm/i915/intel_pm.c | 27 +-
Em Sex, 2016-10-07 às 20:11 -0400, Lyude escreveu:
> Helper we're going to be using for implementing verification of the
> wm
> levels in skl_verify_wm_level().
>
> Signed-off-by: Lyude
Reviewed-by: Paulo Zanoni
> Cc: Maarten Lankhorst
> Cc: Ville S
Em Qua, 2016-10-05 às 11:33 -0400, Lyude escreveu:
> Now that we've make skl_wm_levels make a little more sense, we can
> remove all of the redundant wm information. Up until now we'd been
> storing two copies of all of the skl watermarks: one being the
> skl_pipe_wm structs, the other being the gl
Em Sex, 2016-10-07 às 20:11 -0400, Lyude escreveu:
> Thanks to Paulo Zanoni for indirectly pointing this out.
>
> Looks like we never actually added any code for checking whether or
> not
> we actually wrote watermark levels properly. Let's fix that.
Thanks for doing this!
Em Qui, 2016-10-13 às 18:15 -0300, Paulo Zanoni escreveu:
> Em Sex, 2016-10-07 às 20:11 -0400, Lyude escreveu:
> >
> > Thanks to Paulo Zanoni for indirectly pointing this out.
> >
> > Looks like we never actually added any code for checking whether or
> > no
Em Sex, 2016-10-07 às 20:11 -0400, Lyude escreveu:
Bikesheding: it would be nice to write a commit message explaining why,
even if the message just tells the user to read
Documentation/CodingStyle.
Reviewed-by: Paulo Zanoni
> Signed-off-by: Lyude
> Cc: Maarten Lankhorst
> Cc: Vill
gt; need this function to be reusable for the next patch.
>
> Changes since v1:
> - Fix accidental behavior change in the code that Paulo pointed out
Reviewed-by: Paulo Zanoni
I just submitted v4 of patch 5 solving the conflicts I created. With
that + this review, we can merge this serie
Em Qua, 2016-10-05 às 11:33 -0400, Lyude escreveu:
> This option allows us to manually control the SAGV at module load
> time.
> This can be useful in situations such as trying to debug watermark
> changes, since enabled SAGV + incorrect watermarks = total GPU
> annihilation.
I'm not a huge fan of
Em Qua, 2016-10-05 às 11:33 -0400, Lyude escreveu:
> First part of cleaning up all of the skl watermark code. This moves
> the
> structures for storing the ddb allocations of each pipe into
> intel_crtc_state, along with moving the structures for storing the
> current ddb allocations active on hard
Em Qua, 2016-10-05 às 11:33 -0400, Lyude escreveu:
> Next part of cleaning up the watermark code for skl. This is easy,
> since
> it seems that we never actually needed to keep track of the linetime
> in
> the skl_wm_values struct anyway.
Reviewed-by: Paulo Zanoni
>
>
Em Qua, 2016-10-05 às 11:33 -0400, Lyude escreveu:
> Having skl_wm_level contain all of the watermarks for each plane is
> annoying since it prevents us from having any sort of object to
> represent a single watermark level, something we take advantage of in
> the next commit to cut down on all of
28 matches
Mail list logo
