Hey Thomas,
On 24-03-15 22:23, Thomas Niederprüm wrote:
This patch adds ssd1307fb_blank() to make the framebuffer capable
of blanking.
Signed-off-by: Thomas Niederprüm
---
drivers/video/fbdev/ssd1307fb.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/video/fbdev/
;prechargep2))
+ par->prechargep2 = 0;
Why set the default to 0 here? The datasheet sets it to 0x2 by default
for example.
+
+ par->seg_remap = !of_property_read_bool(node,
"solomon,segment-no-remap");
+ par->com_seq = of_property_read_bool(node, "solomo
From: Olliver Schinagl
On my previous patch I was overly hasty and made the suffixes string
array
const char const *suffixes, instaed of const char * const suffixes. This
patch corrects that
Signed-off-by: Olliver Schinagl
---
drivers/gpio/gpiolib.c | 2 +-
1 file changed, 1 insertion(+), 1
s and if that fails, fall back to standard gpios for
the users of devm_get_gpiod_from_child.
Olliver Schinagl (4):
gpio: use sizeof() instead of hardcoded values
gpio: add parameter to allow the use named gpios
leds: Let the binding document example for leds-gpio follow the gpio
bin
From: Olliver Schinagl
gpiolib uses a fixed string for the suffixes and defines it at 32 bytes.
Later in the code snprintf is used with this fixed value of 32. Using
sizeof() is safer in case the size for the suffixes is ever changed.
Signed-off-by: Olliver Schinagl
---
drivers/gpio/gpiolib.c
From: Olliver Schinagl
The gpio binding document says that new code should always use named
gpios. Patch 40b73183 added support to parse a list of gpios from child
nodes, but does not make it possible to use named gpios. This patch adds
the con_id property and implements it is done in gpiolib.c
From: Olliver Schinagl
In the gpio bindings documents it is requested to use the marco's in
include/dt-bindings/gpio/gpio.h whenever possible. The gpios in the led
drivers don't seem to form an exception, so update the example in the
document bindings.
Signed-off-by: Olliver Schinagl
From: Olliver Schinagl
The gpio document says we should not use unnamed bindings for gpios.
This patch uses the 'led-' prefix to the gpios and updates code and
documents. Because the devm_get_gpiod_from_child() falls back to using
old-style unnamed gpios, we can update the code first,
Hey Alexandre,
On 01/19/2015 05:04 AM, Alexandre Courbot wrote:
On Wed, Jan 7, 2015 at 6:08 PM, Olliver Schinagl
wrote:
From: Olliver Schinagl
The gpio binding document says that new code should always use named
gpios. Patch 40b73183 added support to parse a list of gpios from child
nodes
From: Olliver Schinagl
When using a hrtimer for repeating periodic ticks, hrtimer_forward_now()
is often used. Quite possibly the timer loop is thus probably fully
controlled by hrtimer_forward_now() and we don't really care when the
timer is started. With hrtimer_start() we need to d
Hey Rojhalat,
On 22-01-15 10:32, Rojhalat Ibrahim wrote:
On Wednesday 21 January 2015 22:33:48 Olliver Schinagl wrote:
From: Olliver Schinagl
The gpio document says we should not use unnamed bindings for gpios.
This patch uses the 'led-' prefix to the gpios and updates code and
Hey Thomas,
On 22-01-15 12:01, Thomas Gleixner wrote:
On Thu, 22 Jan 2015, Olliver Schinagl wrote:
From: Olliver Schinagl
When using a hrtimer for repeating periodic ticks, hrtimer_forward_now()
is often used. Quite possibly the timer loop is thus probably fully
controlled by
Hey Ricardo,
On 19-04-16 15:42, Ricardo Ribalda Delgado wrote:
Hi again
On Tue, Apr 19, 2016 at 3:27 PM, Olliver Schinagl wrote:
Hey Ricardo,
Without actually looking at the code right now, but the driver does a
read/modify/write on the register, and a register is shared among several
leds
Hey Ricardo,
On 20-04-16 10:01, Ricardo Ribalda Delgado wrote:
Hi Ollivier
On Wed, Apr 20, 2016 at 9:21 AM, Olliver Schinagl wrote:
What I am propossing is at probe():
replace:
if (pdata) {
/* Configure output: open-drain or totem pole (push-pull) */
if (pdata->out
On 20-04-16 10:56, Ricardo Ribalda Delgado wrote:
Hi
On Wed, Apr 20, 2016 at 10:51 AM, Olliver Schinagl wrote:
As I said before, the reason for this proposal is that the code NEVER
clears PCA963X_MODE2_DMBLNK, only sets it.
Unfortunately I do not have the HW to test this change.
The code
Hey,
On 20-04-16 11:17, Ricardo Ribalda Delgado wrote:
Hello again
On Wed, Apr 20, 2016 at 11:06 AM, Olliver Schinagl wrote:
The devil is in the details :)
:)
Saving mode2 sounds like a good compromise then.
But I still believe that we should limit the lock to ledout. No matter
what we
Hi Ricardo,
On 20-04-16 11:17, Ricardo Ribalda Delgado wrote:
Hello again
On Wed, Apr 20, 2016 at 11:06 AM, Olliver Schinagl wrote:
The devil is in the details :)
:)
Saving mode2 sounds like a good compromise then.
But I still believe that we should limit the lock to ledout. No matter
Hey Rob,
On 21-04-16 17:07, Rob Herring wrote:
On Tue, Apr 19, 2016 at 09:40:49AM +0200, Olliver Schinagl wrote:
When leds are connected in a totem-pole configuration, they can be
connected either in a active-high, or active-low manor. The driver
currently always assumes active-high. This
On April 22, 2016 3:09:35 PM CEST, Rob Herring wrote:
>On Fri, Apr 22, 2016 at 7:38 AM, Olliver Schinagl
>wrote:
>> Hey Rob,
>>
>> On 21-04-16 17:07, Rob Herring wrote:
>>>
>>> On Tue, Apr 19, 2016 at 09:40:49AM +0200, Olliver Schinagl wrote:
>>
those should in theory be
removed from the boards in question in a separate patch when in agreement, as
technically, the eMMC module supports HPI just fine and thus the we are lying
about what really is broken.
This was tested on an OLinuXino Lime2 with 4GB industrial grade Micron eMMC
flash.
Ol
n-hpi, which allows us to
mark a broken hpi implementation on the host level.
Signed-off-by: Olliver Schinagl
---
drivers/mmc/core/host.c | 2 ++
drivers/mmc/core/mmc.c | 2 +-
include/linux/mmc/host.h | 1 +
3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/core/hos
So far it seems all sunxi MMC controllers have a broken HPI. Until
proved otherwise, mark all sunxi mmc controllers as having a broken HPI.
Signed-off-by: Olliver Schinagl
---
drivers/mmc/host/sunxi-mmc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host
Re-order headers so they are in alphabetical order.
Signed-off-by: Olliver Schinagl
---
drivers/leds/leds-pca963x.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/leds/leds-pca963x.c b/drivers/leds/leds-pca963x.c
index 407eba1..8dabf7a 100644
--- a
does some cleanups to please checkpatch, and
removes a few magic values.
Olliver Schinagl (6):
leds: pca963x: Alphabetize headers
leds: pca963x: Lock i2c r/w access
leds: pca963x: Add defines and remove some magic values
leds: pca963x: Reduce magic values
leds: pca963x: Inform the output
This patch adds some more defines so that the driver can receive
a little more future work. These new defines are then used throughout the
existing code the remove some magic values.
This patch does not produce any binary changes.
Signed-off-by: Olliver Schinagl
---
drivers/leds/leds-pca963x.c
A pca963x device can have multiple leds with a single i2c channel to
access them. Some of the registers are shared between each other. To
ensure all i2c operations are atomic within an instance, we move some
mutex locks slightly around to guard these access.
Signed-off-by: Olliver Schinagl
or rather, that the behavior is inverted to what
is normally expected.
Signed-off-by: Olliver Schinagl
---
Documentation/devicetree/bindings/leds/pca963x.txt | 1 +
drivers/leds/leds-pca963x.c| 20 +---
include/linux/platform_data/leds-pca963x.h | 1
introduce any binary changes.
Signed-off-by: Olliver Schinagl
---
drivers/leds/leds-pca963x.c | 53 -
1 file changed, 28 insertions(+), 25 deletions(-)
diff --git a/drivers/leds/leds-pca963x.c b/drivers/leds/leds-pca963x.c
index 85dd506..5c4bf77 100644
--- a
This patch uses the newly introduced defines to further reduce magic
values and magic shifts. These changes have a slightly bigger impact as
they do introduce binary changes. There should be no logical changes
however.
Signed-off-by: Olliver Schinagl
---
drivers/leds/leds-pca963x.c | 32
whole set.
Olliver
On 04/19/2016 09:40 AM, Olliver Schinagl wrote:
Using the pca963x for a while, I noticed something that may look like
some
i2c accessing issues where sometimes data was incorrectly written to
the bus,
possibly because we where not properly locking the i2c reads. Thoug
Hi Ulf,
On 19-04-16 11:29, Ulf Hansson wrote:
On 19 April 2016 at 09:12, Olliver Schinagl wrote:
In patch 81f8a7be66 Hans de Goede added a patch to allow marking an mmc
device as to having an broken HPI implementation. After talking some
with Hans, we now think it is actually the mmc
Hey Jaehoon,
On 19-04-16 11:49, Jaehoon Chung wrote:
Hi
On 04/19/2016 06:42 PM, Olliver Schinagl wrote:
Hi Ulf,
On 19-04-16 11:29, Ulf Hansson wrote:
On 19 April 2016 at 09:12, Olliver Schinagl wrote:
In patch 81f8a7be66 Hans de Goede added a patch to allow marking an mmc
device as to
Hey Sergei,
On 19-04-16 12:52, Sergei Shtylyov wrote:
Hello.
On 4/19/2016 10:12 AM, Olliver Schinagl wrote:
In patch 81f8a7be66 Hans de Goede added a patch to allow marking an mmc
scripts/checkpatch.pl now enforces certain commit citing style, the
commit summary should be specified too
Hey Hans,
On 19-04-16 13:22, Hans de Goede wrote:
Hi,
On 19-04-16 11:42, Olliver Schinagl wrote:
Hi Ulf,
On 19-04-16 11:29, Ulf Hansson wrote:
On 19 April 2016 at 09:12, Olliver Schinagl wrote:
In patch 81f8a7be66 Hans de Goede added a patch to allow marking an
mmc
device as to having an
lusive/easy to use.
But I can remove unused defines if desired.
For PCA963X_LEDOUT_LDR. Do not forget the parenthesis around led_num.
Also replace %4 with &3 to be consisten.t
Yeah, i'll check and fix that.
Regards!
On Tue, Apr 19, 2016 at 11:39 AM, Olliver Schinagl wrote
red or not.
Olliver
On 06-11-15 15:46, Thierry Reding wrote:
On Mon, Oct 26, 2015 at 10:32:35PM +0100, Olliver Schinagl wrote:
From: Olliver Schinagl
The pwm header defines bits manually while there is a nice bitops.h with
a BIT() macro. Use the BIT() macro to set bits in pwm.h
Signed-off-by: Ollive
Hey Thierry,
On 06-11-15 16:18, Thierry Reding wrote:
On Mon, Oct 26, 2015 at 10:32:39PM +0100, Olliver Schinagl wrote:
From: Olliver Schinagl
Some hardware PWM's have the possibility to only send out one (or more)
pulses. This can be quite a useful feature in case one wants or needs
o
Hey Thierry,
On 06-11-15 17:05, Thierry Reding wrote:
On Fri, Nov 06, 2015 at 04:46:54PM +0100, Olliver Schinagl wrote:
Hey Thierry,
On 06-11-15 16:18, Thierry Reding wrote:
On Mon, Oct 26, 2015 at 10:32:39PM +0100, Olliver Schinagl wrote:
From: Olliver Schinagl
Some hardware PWM's
Hey Axel,
On February 20, 2019 5:50:13 PM GMT+01:00, Axel Lin wrote:
>The AXP20X_xxx_START/END/STEPS defines make the code hard to read and
>very hard to check the linear range settings because it needs to check
>the defines one-by-one.
>The original code without the defines is very good in reada
On 21-02-2019 10:42, Mark Brown wrote:
> On Thu, Feb 21, 2019 at 08:22:53AM +0800, Axel Lin wrote:
>> Olliver Schinagl 於 2019年2月21日 週四 上午6:57寫道：
>>> On February 20, 2019 5:50:13 PM GMT+01:00, Axel Lin
>>> wrote:
>>>> The AXP20X_xxx_START/END/STEPS
On 23-02-2019 13:54, Axel Lin wrote:
>> I will not disagree that it may be extra work to look up the define
>> (especially if there is no tool tip or split view in the editor) but
>> reading the whole lot of code, with only the magic values, you still
>> have to look up the meaning of each magic va
On 15-07-16 10:39, stefan.mavrod...@gmail.com wrote:
Hi Olliver,
Why are you using nRST signal?
What I mean is this pin is inactive on this eMMC chip. To use the signal
byte 162 of ECSD registers should be written.
Then that sounds like a bug in the mmc layer I would say (or a missing
attribute
Hey Maxime,
Happy new year! I'm sorry that I missed your previous mail! I completely
looked over it. Sorry!
On 12-12-16 13:24, Maxime Ripard wrote:
On Thu, Dec 08, 2016 at 02:23:39PM +0100, Olliver Schinagl wrote:
Hey Maxime,
first off, also sorry for the slow delay :) (pun not int
Hey Alexandre,
I've sent several patches regarding pwm a while ago, sadly you never
responded [0]. So I guess this is a follow up from that?
I couldn't quickly find the resubmitted version however.
Anyway, see below for my comments.
On 03-01-17 15:57, Alexandre Belloni wrote:
Most of the ca
tleast function properly
according to its parameters?
Olliver
On 01-03-17 14:58, Olliver Schinagl wrote:
Hey all,
We found a bug in the design of a board that we use. This board (Olimex
OLinuXino Lime2) features a PMIC (AXP209) and has an LDO, LDO3, that
needs special treatment.
The bug is
Hey all,
We found a bug in the design of a board that we use. This board (Olimex
OLinuXino Lime2) features a PMIC (AXP209) and has an LDO, LDO3, that
needs special treatment.
The bug is, that there is too much capacitance on the output of LDO3,
which causes the PMIC to shutdown when enabelin
Hey Alexandre,
Sorry for the very slow reply. We just bought a house so have been
offline for 6+ weeks!
On 03-01-17 17:44, Alexandre Belloni wrote:
On 03/01/2017 at 16:56:16 +0100, Olliver Schinagl wrote :
Hey Alexandre,
I've sent several patches regarding pwm a while ago, sadly you
Hey Mika,
Thanks for your reply.
On 24-09-15 10:43, Mika Westerberg wrote:
On Thu, Sep 24, 2015 at 09:25:06AM +0200, Olliver Schinagl wrote:
Hey list, Mika,
With commit 0d9a693cc86 the following snippet of code was added:
+ /* Try first from _DSD */
+ for (i = 0; i < ARRAY_S
Hey Thierry, list
I'm going over the pwm core and notice that in the pwm header, duty_ns
and period_ns is internally stored as an unsigned int.
struct pwm_device {
const char *label;
unsigned long flags;
unsigned int hwpwm;
unsigned int pwm;
struct pwm_chip *chip;
void
From: Olliver Schinagl
Just a very small cosmetical indentation fix, no code changes
Signed-off-by: Olliver Schinagl
---
drivers/gpio/gpiolib.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 980c1f8..5ef9ac2 100644
--- a/drivers
Hey list, Mika,
With commit 0d9a693cc86 the following snippet of code was added:
+ /* Try first from _DSD */
+ for (i = 0; i < ARRAY_SIZE(suffixes); i++) {
+ if (con_id && strcmp(con_id, "gpios")) {
+ snprintf(propname, sizeof(propname), "%s-%s",
+
Appologies! I should not do this early in the morning. It is indeed a
copy/paste fail (and not noticing the missing minus) from the section
above i was working on.
I'm sorry for the noise!
Olliver
On 24-09-15 09:17, Alexandre Courbot wrote:
On Thu, Sep 24, 2015 at 4:14 PM, Olliver Sch
iver
On 12-08-15 13:40, Olliver Schinagl wrote:
Hey all,
I'm noticing the exact same thing using hans's sunxi-wip from a few
days ago.
I did see a patch from you about this very issue I belive
mmc: sunxi: fix timeout in sunxi_mmc_oclk_onoff
but can't find it in any of the rep
enabling/disabling the clock took so more data can be collected
from other systems.
Signed-off-by: Michal Suchanek
Signed-off-by: Olliver Schinagl
---
drivers/mmc/host/sunxi-mmc.c | 24 +---
1 file changed, 21 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/sun
While I can't speak for Michal obviously,
I left the debugging bit (in my v2 that i sent 2 minutes ago) as both
you and Hans where content with it back then and both acked it.
Michal, feel free to send the v3 without the debug info, unless you want
me to do it ;)
Olliver
On 12-08-15 14:32,
Hey,
On 12-08-15 14:35, Hans de Goede wrote:
Hi,
On 12-08-15 14:23, Michal Suchanek wrote:
When core does not set the MMC_QUIRK_BROKEN_CLK_GATING flag enable
automatic hardware controlled clock gating on the mmc interface.
Signed-off-by: Michal Suchanek
In general this looks good, but I wo
:19, Olliver Schinagl wrote:
Hey,
On 12-08-15 14:35, Hans de Goede wrote:
Hi,
On 12-08-15 14:23, Michal Suchanek wrote:
When core does not set the MMC_QUIRK_BROKEN_CLK_GATING flag enable
automatic hardware controlled clock gating on the mmc interface.
Signed-off-by: Michal Suchanek
In general t
Hey Douglas,
On 07-02-17 00:30, Douglas Anderson wrote:
On a Rockchip rk3399-based board during suspend/resume testing, we
found that we could get the console UART into a state where it would
print this to the console a lot:
serial8250: too much work for irq42
Followed eventually by:
NMI wa
Hey Andy,
On 29-03-17 11:11, Andy Shevchenko wrote:
On Wed, Mar 29, 2017 at 10:58 AM, Olliver Schinagl wrote:
On 07-02-17 00:30, Douglas Anderson wrote:
First of all I didn't get why people from Cc list are suddenly
disappeared. Check your mail client settings.
Returning back some of
ic value/mask.
Some very minor code cleanups, such as including the bitops header for
DW_UART_MCR_SIRE, use the BIT() macro as suggested by checkpatc and
removed a whitespace to match other invocations.
Signed-off-by: Olliver Schinagl
---
drivers/tty/serial/8250/8250_dw.c | 25 +
Hey Doug,
On 29-03-17 17:50, Doug Anderson wrote:
Hi,
On Wed, Mar 29, 2017 at 3:04 AM, Olliver Schinagl wrote:
Commit 424d79183af0 ("serial: 8250_dw: Avoid "too much work" from bogus rx timeout
interrupt")
added a bit check with quite a wide mask. To be concise with the
Hey Doug,
On 29-03-17 19:10, Olliver Schinagl wrote:
Hey Doug,
On 29-03-17 17:50, Doug Anderson wrote:
Hi,
On Wed, Mar 29, 2017 at 3:04 AM, Olliver Schinagl
wrote:
Commit 424d79183af0 ("serial: 8250_dw: Avoid "too much work" from
bogus rx timeout interrupt")
added a bi
Some very minor code cleanups, such as including the bitops header for
DW_UART_MCR_SIRE, use the BIT() macro as suggested by checkpatch and
removed a white space to match other invocations.
Signed-off-by: Olliver Schinagl
---
Changes since v1:
Split up these non-code changing changes into a
IR_EXT_MASK for these two bits.
This patch then goes over all UART_IIR_* users and changes the code from
bitfield checking, to ID checking instead.
Signed-off-by: Olliver Schinagl
---
Note, that I do not have all this hardware and used the fact that UART_IIR_*
yields ID's rather then bitfiel
The tegra serial IP seems to be following the common layout and the
interrupt ID's match up nicely. Replace the magic values to match the
common serial_reg defines, with the addition of the Tegra unique End of
Data interrupt.
Signed-off-by: Olliver Schinagl
---
Note I do not own any
On March 30, 2017 8:15:29 AM CEST, Vignesh R wrote:
>Hi,
>
>On Thursday 30 March 2017 12:14 AM, Olliver Schinagl wrote:
>> diff --git a/include/uapi/linux/serial_reg.h
>b/include/uapi/linux/serial_reg.h
>> index 5db76880b4ad..489522389a10 100644
>> --- a/include/ua
Hey Jon,
On March 30, 2017 3:42:19 PM CEST, Jon Hunter wrote:
>
>On 29/03/17 19:48, Olliver Schinagl wrote:
>> The tegra serial IP seems to be following the common layout and the
>> interrupt ID's match up nicely. Replace the magic values to match the
>> common
Hey Vignesh,
On March 30, 2017 9:57:19 AM CEST, Vignesh R wrote:
>
>
>On Thursday 30 March 2017 12:13 PM, Olliver Schinagl wrote:
>>
>>
>> On March 30, 2017 8:15:29 AM CEST, Vignesh R wrote:
>>> Hi,
>>>
>>> On Thursday 30 March 2017 12:14
Hey Ted,
On 30-03-17 16:11, Theodore Ts'o wrote:
While you're fixing this, there's a bug in samples/vfio-mdev/mtty.c:
u8 ier = mdev_state->s[index].uart_reg[UART_IER];
*buf = 0;
mutex_lock(&mdev_state->rxtx_lock);
/* Interrupt pri
7;ll turn it into a set.
Again, sorry for the inconvenience,
Olliver
-Original Message-
From: Laxman Dewangan
Sent: Thursday, March 30, 2017 3:48 PM
To: Olliver Schinagl ; Greg Kroah-Hartman
; Jiri Slaby ; Stephen
Warren ; Thierry Reding
; Alexandre Courbot
Cc: linux-ser...@vger.
Hey Andy,
On 30-03-17 11:56, Andy Shevchenko wrote:
On Wed, 2017-03-29 at 20:44 +0200, Olliver Schinagl wrote:
It seems that at some point, someone made the assumption that the UART
Interrupt ID Register was a bitfield and started to check if certain
bits where set.
Actually however the
Hey Priit,
On 07/13/17 21:23, Priit Laes wrote:
> On Mon, Jul 10, 2017 at 11:45:32AM +0200, Olliver Schinagl wrote:
>> Hi Pleas,
>>
>> again, but this time with content :)
>>
>> On 04-07-17 22:04, Priit Laes wrote:
>>> Introduce a clock controller dri
Hey Plaes,
On 04-07-17 22:04, Priit Laes wrote:
SATA clock on sun4i/sun7i is of type (parent) / M / 6 where
6 is fixed post-divider.
Signed-off-by: Priit Laes
---
drivers/clk/sunxi-ng/ccu_div.c | 18 --
drivers/clk/sunxi-ng/ccu_div.h | 3 ++-
2 files changed, 18 insertions(+)
Hi Pleas,
again, but this time with content :)
On 04-07-17 22:04, Priit Laes wrote:
Introduce a clock controller driver for sun4i A10 and sun7i A20
series SoCs.
Signed-off-by: Priit Laes
---
drivers/clk/sunxi-ng/Kconfig | 14 +-
drivers/clk/sunxi-ng/Makefile |1
Hi Pleas,
On 04-07-17 22:05, Priit Laes wrote:
Convert sun7i-a20.dtsi to new CCU driver.
Tested on Cubietruck.
Signed-off-by: Priit Laes
---
arch/arm/boot/dts/sun7i-a20.dtsi | 719 +++-
1 file changed, 84 insertions(+), 635 deletions(-)
diff --git a/arch/arm/boot
Hi Pritt,
On 04-07-17 22:05, Priit Laes wrote:
Convert sun4i-a10.dtsi to new CCU driver.
Tested on Gemei G9 tablet.
Signed-off-by: Priit Laes
---
arch/arm/boot/dts/sun4i-a10.dtsi | 646 +++-
1 file changed, 73 insertions(+), 573 deletions(-)
diff --git a/arch/arm
Hi Maxime,
On 10-07-17 13:55, Maxime Ripard wrote:
On Mon, Jul 10, 2017 at 01:23:51PM +0200, Olliver Schinagl wrote:
Hi Pleas,
On 04-07-17 22:05, Priit Laes wrote:
Convert sun7i-a20.dtsi to new CCU driver.
Tested on Cubietruck.
Signed-off-by: Priit Laes
---
arch/arm/boot/dts/sun7i-a20
Hey Jonathan,
since I reported this to you on IRC, it's only fair that you can have my:
Tested-by: Olliver Schinagl
For those interessted, I've tested it on an Olimex OLinuXino Lime2 with
their 4.3 LCD.
Olliver
On 10-07-17 08:55, Jonathan Liu wrote:
The drm_driver lastclose c
Hey Tim,
On 04-05-17 05:51, Tim Kryger wrote:
On Wed, May 3, 2017 at 8:40 AM, Olliver Schinagl wrote:
Hey Tim,
Ok, so as far as I understand (from the datasheet) the intended way to do
this would be to check for the BUSY IRQ & USR[0] IRQ and if it is busy,
(re-write) the LCR. We no lo
Hey Jamie,
Several years ago you wrote the glue-code [0] for the DW 8250 IP. Over
the years various 'fixes' have been applied to resolve certain 'weird'
problems that Tim tried to fix with [1].
After going over the datasheets and code with a comb several times now,
I think I may have found o
Hey Chen-Yu
On 03-05-17 12:40, Chen-Yu Tsai wrote:
On Wed, May 3, 2017 at 6:17 PM, Olliver Schinagl wrote:
Hey Jamie,
Several years ago you wrote the glue-code [0] for the DW 8250 IP. Over the
years various 'fixes' have been applied to resolve certain 'weird' problems
t
Hey Tim,
On 03-05-17 16:22, Tim Kryger wrote:
On Wed, May 3, 2017 at 4:26 AM, Olliver Schinagl wrote:
Hey Chen-Yu
On 03-05-17 12:40, Chen-Yu Tsai wrote:
On Wed, May 3, 2017 at 6:17 PM, Olliver Schinagl
wrote:
Hey Jamie,
Several years ago you wrote the glue-code [0] for the DW 8250 IP
Hey Marcus,
On 29-07-17 16:17, codekip...@gmail.com wrote:
From: Marcus Cooper
Hi All,
please find attached a series of patches to bring i2s support to the
Allwinner H3 SoC. This has been tested with the following setups:
A20 Olimex EVB connected to a pcm5102
But that's not an H3 is it? :)
Hi Maxime!,
On za, 2016-08-27 at 00:19 +0200, Maxime Ripard wrote:
> On Thu, Aug 25, 2016 at 07:50:10PM +0200, Olliver Schinagl wrote:
> >
> > When we inform the PWM block to stop toggeling the output, we may
> > end up
> > in a state where the output is not wha
Hi Anders,
On ma, 2016-09-05 at 13:02 +0200, Anders Darander wrote:
> Hi,
>
> * Olliver Schinagl [160504 10:10]:
> >
> > On 04-05-16 09:55, Anders Darander wrote:
> > >
> > > * Jacek Anaszewski [160504 09:28]:
> > > >
> > >
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