On Thu, 1 Mar 2018 08:09:55 +0100
Christophe LEROY wrote:
> Le 28/02/2018 à 07:53, Nicholas Piggin a écrit :
> > On Tue, 27 Feb 2018 18:11:07 +0530
> > "Aneesh Kumar K.V" wrote:
> >
> >> Nicholas Piggin writes:
> >>
> >>> On Tu
Hi,
I'm seeing some pretty big latencies on a ~idle system when a CPU wakes
out of a nohz idle. Looks like it's due to the taking a lot of remote
locks and cache lines. irqoff trace:
latency: 407 us, #608/608, CPU#3 | (M:server VP:0, KP:0, SP:0 HP:0 #P:176)
-0 3d...0us : decrementer_
Hi Paul,
Just looking at latencies, and RCU showed up as one of the maximums.
This is a 2 socket system with (176 CPU threads). Just doing a
`make -j 352` kernel build. Got a max latency of 3ms. I don't think
that's anything to worry about really, but I wanted to check the
cause.
# tracer: irqsof
On Wed, 4 Apr 2018 17:13:58 -0700
"Paul E. McKenney" wrote:
> On Thu, Apr 05, 2018 at 09:34:14AM +1000, Nicholas Piggin wrote:
> > Hi Paul,
> >
> > Just looking at latencies, and RCU showed up as one of the maximums.
> > This is a 2 socket system with (176
On Thu, 05 Apr 2018 08:46:57 +0200
Mike Galbraith wrote:
> On Thu, 2018-04-05 at 09:11 +1000, Nicholas Piggin wrote:
> > Hi,
> >
> > I'm seeing some pretty big latencies on a ~idle system when a CPU wakes
> > out of a nohz idle. Looks like it's due to the
On Thu, 05 Apr 2018 10:40:20 +0200
Mike Galbraith wrote:
> On Thu, 2018-04-05 at 10:27 +0200, Peter Zijlstra wrote:
> > On Thu, Apr 05, 2018 at 09:11:38AM +1000, Nicholas Piggin wrote:
> > > Hi,
> > >
> > > I'm seeing some pretty big latencies on a ~id
On Thu, 5 Apr 2018 20:08:59 +1000
Nicholas Piggin wrote:
> On Thu, 05 Apr 2018 10:40:20 +0200
> Mike Galbraith wrote:
>
> > On Thu, 2018-04-05 at 10:27 +0200, Peter Zijlstra wrote:
> > > On Thu, Apr 05, 2018 at 09:11:38AM +1000, Nicholas Piggin wrote:
> >
desc should be protected with irq_lock_sparse().
Cc: Thomas Gleixner
Signed-off-by: Nicholas Piggin
---
kernel/irq/proc.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/kernel/irq/proc.c b/kernel/irq/proc.c
index e8f374971e37..bbc4004b74bc 100644
--- a/kernel/irq/p
ments that can be made to the hvc console and powerpc
opal driver.
I'm not sure how this series should be merged yet, but we can cross
that if/when it comes. Possibly all can go via the tty tree with
acks from powerpc maintainers.
Comments appreciated.
Thanks,
Nick
--
Nicholas Piggin
tten bytes.
This code may not be exercised any more if partial writes will not be
hit, but this is a small bugfix before a larger change.
Reviewed-by: Benjamin Herrenschmidt
Signed-off-by: Nicholas Piggin
---
arch/powerpc/platforms/powernv/opal.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
OPAL_CONSOLE_FLUSH is documented as being able to return OPAL_BUSY,
so implement the standard OPAL_BUSY handling for it.
Reviewed-by: Russell Currey
Signed-off-by: Nicholas Piggin
---
arch/powerpc/platforms/powernv/opal-kmsg.c | 24 ++
1 file changed, 16 insertions(+), 8
is invoked to
prepare for moving the console flush into a common function.
Reviewed-by: Russell Currey
Signed-off-by: Nicholas Piggin
---
arch/powerpc/platforms/powernv/opal-kmsg.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/platforms/powernv
: Benjamin Herrenschmidt
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/opal.h | 1 +
arch/powerpc/platforms/powernv/opal.c | 37 +++
drivers/tty/hvc/hvc_opal.c| 18 +
3 files changed, 41 insertions(+), 15 deletions(-)
diff --git a
This delay was in the very first OPAL console commit 6.5 years ago,
and came from the vio hvc driver. The firmware console has hardened
sufficiently to remove it.
Reviewed-by: Benjamin Herrenschmidt
Signed-off-by: Nicholas Piggin
---
drivers/tty/hvc/hvc_opal.c | 8 +---
1 file changed, 1
in case there is a pathological
condition.
Signed-off-by: Nicholas Piggin
---
drivers/tty/hvc/hvc_console.c | 88 ++-
1 file changed, 45 insertions(+), 43 deletions(-)
diff --git a/drivers/tty/hvc/hvc_console.c b/drivers/tty/hvc/hvc_console.c
index fddb63322c67
Rework the hvc_write loop to drop and re-take the spinlock on each
iteration, add a cond_resched. Don't bother with an initial hvc_push
initially, which makes the logic simpler -- just do a hvc_push on
each time around the loop.
Signed-off-by: Nicholas Piggin
---
drivers/tty/hvc/hvc_cons
Provide the flush hv_op for the opal hvc driver. This will flush the
firmware console buffers without spinning with interrupts disabled.
Cc: Benjamin Herrenschmidt
Cc: linuxppc-...@lists.ozlabs.org
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/opal.h | 1 +
arch/powerpc
Use .flush to wait for drivers to flush their console outside of
the spinlock, to reduce lock/irq latencies.
Flush the hvc console driver after each write, which can help
messages make it out to the console after a crash.
Signed-off-by: Nicholas Piggin
---
drivers/tty/hvc/hvc_console.c | 35
Introduce points where hvc_poll drops the lock, enables interrupts,
and reschedules.
Signed-off-by: Nicholas Piggin
---
drivers/tty/hvc/hvc_console.c | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/hvc/hvc_console.c b/drivers/tty/hvc
This allows hvc operations to sleep under the lock.
Signed-off-by: Nicholas Piggin
---
drivers/tty/hvc/hvc_console.c | 23 +++
1 file changed, 11 insertions(+), 12 deletions(-)
diff --git a/drivers/tty/hvc/hvc_console.c b/drivers/tty/hvc/hvc_console.c
index 7709fcc707f4
flushing is moved to
udbg_opal_putc.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/platforms/powernv/opal.c | 12 +++-
drivers/tty/hvc/hvc_opal.c| 5 +
2 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/opal.c
b/arch/powerpc
(especially if it was being spammed by firmware),
which is dangerous because the lock is taken by xmon to debug the
system. Flushing outside the lock improves the situation a bit.
Cc: Benjamin Herrenschmidt
Signed-off-by: Nicholas Piggin
---
arch/powerpc/platforms/powernv/opal.c | 86
situations where interrupts are off
and it needs to flush the console synchronously. These still use a
polling loop.
So move the opal-kmsg flush code to opal_flush_console, and use the
new function in opal-kmsg and opal_put_chars.
Cc: Benjamin Herrenschmidt
Reviewed-by: Russell Currey
Signed-off-by
ently.
Cc: Benjamin Herrenschmidt
Signed-off-by: Nicholas Piggin
---
arch/powerpc/platforms/powernv/opal.c | 38 ---
1 file changed, 23 insertions(+), 15 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/opal.c
b/arch/powerpc/platforms/powernv/opal.c
index e695b83
On Tue, 01 May 2018 19:48:58 +1000
Benjamin Herrenschmidt wrote:
> On Tue, 2018-05-01 at 00:55 +1000, Nicholas Piggin wrote:
> > The RAW console does not need writes to be atomic, so relax
> > opal_put_chars to be able to do partial writes, and implement an
> > _atomic v
On Tue, 1 May 2018 14:15:14 -0700
Joel Fernandes wrote:
> On Tue, May 1, 2018 at 1:00 PM, Steven Rostedt wrote:
> > On Tue, 1 May 2018 21:48:38 +0200
> > Peter Zijlstra wrote:
> >
> >> On Tue, May 01, 2018 at 03:38:40PM -0400, Steven Rostedt wrote:
> >> > On Tue, 1 May 2018 21:19:51 +0200
>
On Mon, 14 May 2018 09:09:07 -0700
"Paul E. McKenney" wrote:
> On Mon, May 14, 2018 at 04:42:33PM +1000, Nicholas Piggin wrote:
> > On Sun, 22 Apr 2018 20:02:58 -0700
> > "Paul E. McKenney" wrote:
> >
> > > Hello!
> > >
>
ed to a
> cpu outside the policy then re-queue it back on the policy->cpus. This way
> we can get rid of the smp-call which was being used to set the pstate
> on the policy->cpus.
>
> Fixes: 7bc54b652f13 (timers, cpufreq/powernv: Initialize the gpstate timer as
> pinned)
Will Deacon's on March 2, 2019 12:03 am:
> In preparation for removing all explicit mmiowb() calls from driver
> code, implement a tracking system in asm-generic based loosely on the
> PowerPC implementation. This allows architectures with a non-empty
> mmiowb() definition to have the barrier autom
Will Deacon's on March 2, 2019 12:03 am:
> @@ -177,6 +178,7 @@ do {
> \
> static inline void do_raw_spin_lock(raw_spinlock_t *lock) __acquires(lock)
> {
> __acquire(lock);
> + mmiowb_spin_lock();
> arch_spin_lock(&lock-
Linus Torvalds's on March 3, 2019 12:18 pm:
> On Sat, Mar 2, 2019 at 5:43 PM Nicholas Piggin wrote:
>>
>> Is there a reason to call this "mmiowb"? We already have wmb that
>> orders cacheable stores vs mmio stores don't we?
>
> Sadly no it doesn&#x
Linus Torvalds's on March 3, 2019 2:29 pm:
> On Sat, Mar 2, 2019, 19:34 Nicholas Piggin wrote:
>
>>
>> It doesn't have to be done all at once with this series, obviously this
>> is a big improvement on its own. But why perpetuate the nomenclature
>
Michael Ellerman's on March 3, 2019 7:26 pm:
> Nicholas Piggin writes:
>> Will Deacon's on March 2, 2019 12:03 am:
>>> In preparation for removing all explicit mmiowb() calls from driver
>>> code, implement a tracking system in asm-generic based loosely on
Peter Zijlstra's on April 25, 2019 9:56 pm:
> On Fri, Apr 12, 2019 at 02:26:13PM +1000, Nicholas Piggin wrote:
>> The nohz idle balancer runs on the lowest idle CPU. This can
>> interfere with isolated CPUs, so confine it to HK_FLAG_MISC
>> housekeeping CPUs.
>>
Linus Torvalds's on April 6, 2019 1:50 am:
> On Fri, Apr 5, 2019 at 4:01 AM Will Deacon wrote:
>>
>> mmiowb() is now implied by spin_unlock() on architectures that require
>> it, so there is no reason to call it from driver code. This patch was
>> generated using coccinelle:
>>
>> @mmiowb@
Thomas Gleixner's on April 6, 2019 3:54 am:
> On Fri, 5 Apr 2019, Nicholas Piggin wrote:
>> Thomas Gleixner's on April 5, 2019 12:36 am:
>> > On Thu, 4 Apr 2019, Nicholas Piggin wrote:
>> >
>> >> I've been looking at ways to fix suspend breaka
Acked-by: Peter Zijlstra (Intel)
Reviewed-by: Frederic Weisbecker
Signed-off-by: Nicholas Piggin
---
kernel/irq_work.c | 78 ++-
1 file changed, 43 insertions(+), 35 deletions(-)
diff --git a/kernel/irq_work.c b/kernel/irq_work.c
index 6b7cdf17ccf8
Will Deacon's on April 9, 2019 11:46 pm:
> Hi Nick,
>
> On Tue, Apr 09, 2019 at 07:00:52PM +1000, Nicholas Piggin wrote:
>> Linus Torvalds's on April 6, 2019 1:50 am:
>> > On Fri, Apr 5, 2019 at 4:01 AM Will Deacon wrote:
>> >>
>> >> mmio
because it is not set anywhere
at the moment. This could be folded into HK_FLAG_SCHED once that
option is fixed.
The problem was observed with increased jitter on an application
running on CPU0, caused by nohz idle load balancing being run on
CPU1 (an SMT sibling).
Signed-off-by: Nicholas Piggin
Will Deacon's on February 23, 2019 4:50 am:
> The mmiowb() macro is horribly difficult to use and drivers will continue
> to work most of the time if they omit a call when it is required.
>
> Rather than rely on driver authors getting this right, push mmiowb() into
> arch_spin_unlock() for ia64. I
Excerpts from Segher Boessenkool's message of February 11, 2021 9:50 pm:
> On Thu, Feb 11, 2021 at 08:04:55PM +1000, Nicholas Piggin wrote:
>> It would be nice if we could have a __builtin_trap_if that gcc would use
>> conditional traps with, (and which never assum
Excerpts from Christophe Leroy's message of February 10, 2021 2:13 am:
>
>
> Le 09/02/2021 à 02:55, Nicholas Piggin a écrit :
>> Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am:
>>> When r3 is not modified, reload it from regs->orig_r3
Excerpts from Christophe Leroy's message of February 10, 2021 12:31 am:
>
>
> Le 09/02/2021 à 03:02, Nicholas Piggin a écrit :
>> Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am:
>>> For book3s/64, FULL_REGS() is 'true' at all
Excerpts from Christophe Leroy's message of February 10, 2021 3:03 am:
>
>
> Le 09/02/2021 à 15:31, David Laight a écrit :
>> From: Segher Boessenkool
>>> Sent: 09 February 2021 13:51
>>>
>>> On Tue, Feb 09, 2021 at 12:36:20PM +1000, N
Excerpts from Stephen Rothwell's message of February 9, 2021 8:19 pm:
> Hi all,
>
> After merging the powerpc tree, today's linux-next build (powerpc
> allyesconfig) failed like this:
>
> arch/powerpc/kernel/head_64.o:(__ftr_alt_97+0x0): relocation truncated to
> fit: R_PPC64_REL24 (OPD) against
Excerpts from Christophe Leroy's message of February 11, 2021 5:41 pm:
> powerpc BUG_ON() is based on using twnei or tdnei instruction,
> which obliges gcc to format the condition into a 0 or 1 value
> in a register.
>
> By using a generic implementation, gcc will generate a branch
> to the uncond
Excerpts from Ding Tianhong's message of February 19, 2021 1:45 pm:
> Hi Nicholas:
>
> I met some problem for this patch, like this:
>
> kva = vmalloc(3*1024k);
>
> remap_vmalloc_range(xxx, kva, xxx)
>
> It failed because that the check for page_count(page) is null so return, it
> break the so
Excerpts from Russell King - ARM Linux admin's message of February 2, 2021 9:13
pm:
> On Tue, Feb 02, 2021 at 09:05:02PM +1000, Nicholas Piggin wrote:
>> diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
>> index c02f24400369..d63a5bb6bd0c 1006
Excerpts from Nadav Amit's message of January 31, 2021 10:11 am:
> From: Nadav Amit
>
> There are currently (at least?) 5 different TLB batching schemes in the
> kernel:
>
> 1. Using mmu_gather (e.g., zap_page_range()).
>
> 2. Using {inc|dec}_tlb_flush_pending() to inform other threads on the
>
Excerpts from Christophe Leroy's message of February 2, 2021 4:15 pm:
>
>
> Le 28/01/2021 à 00:50, Nicholas Piggin a écrit :
>> Excerpts from David Laight's message of January 26, 2021 8:28 pm:
>>> From: Nicholas Piggin
>>>> Sent: 26 January 2021 10
Excerpts from Peter Zijlstra's message of February 1, 2021 10:09 pm:
> On Sat, Jan 30, 2021 at 04:11:23PM -0800, Nadav Amit wrote:
>
>> diff --git a/include/asm-generic/tlb.h b/include/asm-generic/tlb.h
>> index 427bfcc6cdec..b97136b7010b 100644
>> --- a/include/asm-generic/tlb.h
>> +++ b/include/
Excerpts from Peter Zijlstra's message of February 1, 2021 10:44 pm:
> On Sun, Jan 31, 2021 at 07:57:01AM +, Nadav Amit wrote:
>> > On Jan 30, 2021, at 7:30 PM, Nicholas Piggin wrote:
>
>> > I'll go through the patches a bit more closely when they all come
Excerpts from Ding Tianhong's message of January 28, 2021 1:13 pm:
> On 2021/1/26 12:44, Nicholas Piggin wrote:
>> vmalloc_to_page returns NULL for addresses mapped by larger pages[*].
>> Whether or not a vmap is huge depends on the architecture details,
>> alignments,
ug in v4
- Several minor cleanups.
- Added page order to /proc/vmallocinfo
- Added hugepage to alloc_large_system_hage output.
- Made an architecture config option, powerpc only for now.
Since v3:
- Fixed an off-by-one bug in a loop
- Fix !CONFIG_HAVE_ARCH_HUGE_VMAP build fail
Nicholas Piggin (1
ARM uses its own PMD folding scheme which is missing pud_page which
should just pass through to pmd_page. Move this from the 3-level
page table to common header.
Cc: Russell King
Cc: Ding Tianhong
Cc: linux-arm-ker...@lists.infradead.org
Signed-off-by: Nicholas Piggin
---
arch/arm/include/asm
pings")
Reviewed-by: Miaohe Lin
Reviewed-by: Christoph Hellwig
Signed-off-by: Nicholas Piggin
---
mm/vmalloc.c | 41 ++---
1 file changed, 26 insertions(+), 15 deletions(-)
diff --git a/mm/vmalloc.c b/mm/vmalloc.c
index e6f352bf0498..62372f9e0167 10064
apply_to_pte_range might mistake a large pte for bad, or treat it as a
page table, resulting in a crash or corruption. Add a test to warn and
return error if large entries are found.
Reviewed-by: Miaohe Lin
Reviewed-by: Christoph Hellwig
Signed-off-by: Nicholas Piggin
---
mm/memory.c | 66
This will be used as a generic kernel virtual mapping function, so
re-name it in preparation.
Reviewed-by: Miaohe Lin
Reviewed-by: Christoph Hellwig
Signed-off-by: Nicholas Piggin
---
mm/ioremap.c | 64 +++-
1 file changed, 33 insertions(+), 31
d.org
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: Borislav Petkov
Cc: x...@kernel.org
Cc: "H. Peter Anvin"
Reviewed-by: Ding Tianhong
Acked-by: Catalin Marinas [arm64]
Signed-off-by: Nicholas Piggin
---
arch/arm64/include/asm/vmalloc.h | 8 ++
arch/arm64/mm/mmu.c
This allows unsupported levels to be constant folded away, and so
p4d_free_pud_page can be removed because it's no longer linked to.
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: Borislav Petkov
Cc: x...@kernel.org
Cc: "H. Peter Anvin"
Signed-off-by: Nicholas Piggin
---
arch/
This allows unsupported levels to be constant folded away, and so
p4d_free_pud_page can be removed because it's no longer linked to.
Cc: linuxppc-...@lists.ozlabs.org
Acked-by: Michael Ellerman
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/vmalloc.h
The vmalloc mapper operates on a struct page * array rather than a
linear physical address, re-name it to make this distinction clear.
Reviewed-by: Miaohe Lin
Reviewed-by: Christoph Hellwig
Signed-off-by: Nicholas Piggin
---
mm/vmalloc.c | 16
1 file changed, 8 insertions
This allows unsupported levels to be constant folded away, and so
p4d_free_pud_page can be removed because it's no longer linked to.
Cc: Catalin Marinas
Cc: Will Deacon
Cc: linux-arm-ker...@lists.infradead.org
Acked-by: Catalin Marinas
Signed-off-by: Nicholas Piggin
---
arch/arm64/in
If an architecture doesn't support a particular page table level as
a huge vmap page size then allow it to skip defining the support
query function.
Suggested-by: Christoph Hellwig
Signed-off-by: Nicholas Piggin
---
arch/arm64/include/asm/vmalloc.h | 7 +++
arch/powerpc/includ
As a side-effect, the order of flush_cache_vmap() and
arch_sync_kernel_mappings() calls are switched, but that now matches
the other callers in this file.
Reviewed-by: Christoph Hellwig
Signed-off-by: Nicholas Piggin
---
mm/vmalloc.c | 16 +---
1 file changed, 13 insertions(+), 3
This is a generic kernel virtual memory mapper, not specific to ioremap.
Code is unchanged other than making vmap_range non-static.
Reviewed-by: Christoph Hellwig
Signed-off-by: Nicholas Piggin
---
include/linux/vmalloc.h | 3 +
mm/ioremap.c| 203
This reduces TLB misses by nearly 30x on a `git diff` workload on a
2-node POWER9 (59,800 -> 2,100) and reduces CPU cycles by 0.54%, due
to vfs hashes being allocated with 2MB pages.
Cc: linuxppc-...@lists.ozlabs.org
Acked-by: Michael Ellerman
Signed-off-by: Nicholas Piggin
---
.../admin-gu
allocation, an option nohugevmalloc is added to disable at boot.
Signed-off-by: Nicholas Piggin
---
arch/Kconfig| 11 ++
include/linux/vmalloc.h | 21
mm/page_alloc.c | 5 +-
mm/vmalloc.c| 215 +++-
4 files changed, 205
Excerpts from Andrew Morton's message of February 4, 2021 10:46 am:
> On Wed, 3 Feb 2021 10:19:44 + (UTC) Christophe Leroy
> wrote:
>
>> Commit 83d116c53058 ("mm: fix double page fault on arm64 if PTE_AF
>> is cleared") introduced arch_faults_on_old_pte() helper to identify
>> platforms tha
ntroversial bits.
>
> Thanks,
> Nick
>
> Nicholas Piggin (5):
> lazy tlb: introduce lazy mm refcount helper functions
> lazy tlb: allow lazy tlb mm switching to be configurable
> lazy tlb: shoot lazies, a non-refcounting lazy tlb option
> powerpc: use lazy mm refcount
Excerpts from Leonardo Bras's message of February 5, 2021 4:06 pm:
> Before guest entry, TBU40 register is changed to reflect guest timebase.
> After exitting guest, the register is reverted to it's original value.
>
> If one tries to get the timestamp from host between those changes, it
> will pr
Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am:
> This series implements C syscall entry/exit for PPC32. It reuses
> the work already done for PPC64.
>
> This series is based on today's merge-test
> (b6f72fc05389e3fc694bf5a5fa1bbd33f61879e0)
>
> In terms on performance we h
Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am:
> regs->softe doesn't exist on PPC32.
>
> Add irq_soft_mask_regs_set_state() helper to set regs->softe.
> This helper will void on PPC32.
>
> Signed-off-by: Christophe Leroy
> ---
> arch/powerpc/include/asm/hw_irq.h | 11
__hard_irq_disable()
> __hard_EE_RI_disable()
> __hard_RI_enable()
>
> Then use them in PPC32 version of arch_local_irq_disable()
> and arch_local_irq_enable() to avoid code duplication.
>
Reviewed-by: Nicholas Piggin
> Signed-off-by: Christophe Leroy
> -
ut there might be a way to improve it. For example make a
debug_syscall_entry(regs) function that ppc64 could put the soft mask
checks into.
No big deal, if you don't make any changes now I might see about doing
something like that after your series goes in.
Reviewed-by: Nicholas Piggin
Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am:
> syscall_64.c will be reused almost as is for PPC32.
>
> As this file also contains functions to handle other types
> of interrupts rename it interrupt.c
>
> Signed-off-by: Christophe Leroy
Revie
ppc32 not using this */
> /*
>* We do this at the end so that we do context switch with KERNEL AMR
>*/
> @@ -318,7 +323,7 @@ notrace unsigned long syscall_exit_prepare(unsigned long
> r3,
> return ret;
> }
>
> -#ifdef CONFIG_PPC_BOOK3S /* BOOK3E
Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am:
> Save r3 in regs->orig_r3 in system_call_exception()
>
> Signed-off-by: Christophe Leroy
Reviewed-by: Nicholas Piggin
> ---
> v5: Removed the assembly one on SCV type system call
> ---
> a
Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am:
> Instead of hard comparing task flags with _TIF_32BIT, use
> is_compat_task(). The advantage is that it returns 0 on PPC32
> allthough _TIF_32BIT is always set.
>
> Signed-off-by: Christophe Leroy
R
Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am:
> In system_call_exception(), MSR_RI also needs to be checked on 8xx.
> Only booke and 40x doesn't have MSR_RI.
Reviewed-by: Nicholas Piggin
...
>
> Signed-off-by: Christophe Leroy
> ---
> v5: Al
l C code after this.
Maybe just keep it PPC32 specific for the moment, will have to do more
tuning for 64 and we have other stuff to do there first.
If you are happy to make it 32-bit only then
Reviewed-by: Nicholas Piggin
>
> Before the patch:
>
> c000b4d4 :
> c000b4d4: 7c
Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am:
> Only PPC64 has scv. No need to check the 0x7ff0 trap on PPC32.
> For that, add a helper trap_is_unsupported_scv() similar to
> trap_is_scv().
>
> And ignore the scv parameter in syscall_exit_prepare (Save 14 cycles
> 346 => 33
Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am:
> For book3s/64, FULL_REGS() is 'true' at all time, so the test voids.
> For others, non volatile registers are saved inconditionally.
>
> So the verification is pointless.
>
> Should one fail to do it, it would anyway be caugh
Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am:
> Combine all tests of regs->msr into a single logical one.
Okay by me unless we choose to do the config option and put these all
under it. I think I would prefer that because sometimes the registers
are in a state you can't ea
Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am:
> By saving the pointer pointing to thread_info.flags, gcc copies r2
> in a non-volatile register.
>
> We know 'current' doesn't change, so avoid that intermediaite pointer.
>
> Reduces null_syscall benchmark by 2 cycles (322 =
Excerpts from Christophe Leroy's message of February 9, 2021 3:57 pm:
>
>
> Le 09/02/2021 à 02:11, Nicholas Piggin a écrit :
>> Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am:
>>> regs->softe doesn't exist on PPC32.
>>>
&
Excerpts from Christophe Leroy's message of February 9, 2021 4:18 pm:
>
>
> Le 09/02/2021 à 02:11, Nicholas Piggin a écrit :
>> Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am:
>>> regs->softe doesn't exist on PPC32.
>>>
&
Excerpts from Christophe Leroy's message of February 9, 2021 4:02 pm:
>
>
> Le 09/02/2021 à 02:27, Nicholas Piggin a écrit :
>> Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am:
>>> To allow building interrupt.c on PPC32, ifdef out specific P
Excerpts from Christophe Leroy's message of February 9, 2021 4:13 pm:
>
>
> Le 09/02/2021 à 03:00, Nicholas Piggin a écrit :
>> Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am:
>>> Only PPC64 has scv. No need to check the 0x7ff0 trap on
gcc not seeing that __prep_irq_for_enabled_exit()
> always returns true on ppc32 because it doesn't inline it for
> some reason.
>
> Force inlining of __prep_irq_for_enabled_exit() to fix the build.
>
> Reported-by: kernel test robot
> Signed-off-by: Christophe Leroy
Ack
Excerpts from Zefan Li's message of August 12, 2020 11:07 am:
> On 2020/8/12 0:32, Jonathan Cameron wrote:
>> On Mon, 10 Aug 2020 12:27:24 +1000
>> Nicholas Piggin wrote:
>>
>>> Not tested on x86 or arm64, would appreciate a quick test there so I can
>>&g
Excerpts from pet...@infradead.org's message of August 7, 2020 9:11 pm:
>
> What's wrong with something like this?
>
> AFAICT there's no reason to actually try and add IRQ tracing here, it's
> just a hand full of instructions at the most.
Because we may want to use that in other places as well,
Signed-off-by: Nicholas Piggin
---
mm/memory.c | 60 +++--
1 file changed, 44 insertions(+), 16 deletions(-)
diff --git a/mm/memory.c b/mm/memory.c
index f95edbb77326..19986af291e0 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -2261,13 +2261,20
is added to disable at boot.
Signed-off-by: Nicholas Piggin
---
.../admin-guide/kernel-parameters.txt | 2 +
arch/Kconfig | 4 +
arch/powerpc/Kconfig | 1 +
include/linux/vmalloc.h | 1 +
mm/page_allo
also adds a prot argument to the arch query. This is unused
currently but could help with some architectures (e.g., some powerpc
processors can't map uncacheable memory with large pages).
Signed-off-by: Nicholas Piggin
---
arch/arm64/mm/mmu.c | 12 +--
arch/powerpc/mm/boo
- Keep the page array and accounting in small page units because
struct vm_struct is an interface (this should fix x86 vmap stack debug
assert). [Thanks Zefan]
Nicholas Piggin (8):
mm/vmalloc: fix vmalloc_to_page for huge vmap mappings
mm: apply_to_pte_range warn and fail if a large pte is
This will be moved to mm/ and used as a generic kernel virtual mapping
function, so re-name it in preparation.
Signed-off-by: Nicholas Piggin
---
mm/ioremap.c | 55 ++--
1 file changed, 23 insertions(+), 32 deletions(-)
diff --git a/mm/ioremap.c
is added to disable at boot.
Signed-off-by: Nicholas Piggin
---
.../admin-guide/kernel-parameters.txt | 2 +
include/linux/vmalloc.h | 1 +
mm/vmalloc.c | 174 +-
3 files changed, 135 insertions(+), 42 deleti
The vmalloc mapper operates on a struct page * array rather than a
linear physical address, re-name it to make this distinction clear.
Signed-off-by: Nicholas Piggin
---
mm/vmalloc.c | 28
1 file changed, 12 insertions(+), 16 deletions(-)
diff --git a/mm/vmalloc.c
Signed-off-by: Nicholas Piggin
---
mm/memory.c | 60 +++--
1 file changed, 44 insertions(+), 16 deletions(-)
diff --git a/mm/memory.c b/mm/memory.c
index c39a13b09602..1d5f3093c249 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -2260,13 +2260,20
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