This adds OF support for davinci_wdt driver.
Signed-off-by: Murali Karicheri
---
.../devicetree/bindings/watchdog/davinci-wdt.txt | 12
drivers/watchdog/davinci_wdt.c |7 +++
2 files changed, 19 insertions(+)
create mode 100644 Documentation
On 11/27/2012 12:29 PM, Mike Turquette wrote:
Quoting Sekhar Nori (2012-11-27 07:05:21)
Hi Mike,
On 11/10/2012 7:52 AM, Mike Turquette wrote:
Quoting Murali Karicheri (2012-11-05 07:10:52)
On 11/03/2012 08:07 AM, Sekhar Nori wrote:
On 10/25/2012 9:41 PM, Murali Karicheri wrote:
This is the
Currently migrate only DM644x as this is being reviewed. Once all
platforms are migrated, the Makefile will be cleaned up to remove
obsoleted files clock.o and psc.o
Signed-off-by: Murali Karicheri
---
arch/arm/Kconfig |1 +
arch/arm/mach-davinci/Kconfig |2 ++
arch/arm
the divider fixed meaning they can not be
configured through a register. HAS_PREDIV and HAS_POSTDIV flags are used
to tell the driver if a hardware has these dividers present or not.
Driver is configured through the struct clk_pll_data that has the
SoC specific clock data.
Signed-off-by: Murali
Domain and Clock domain for different IPs
present in the SoC. The driver is configured through the clock data
passed to the driver through struct clk_psc_data.
Signed-off-by: Murali Karicheri
---
drivers/clk/davinci/clk-psc.c | 207 +
drivers/clk/davinci/clk
() function of the clk-divider if enabled.
Signed-off-by: Murali Karicheri
---
drivers/clk/davinci/clk-div.c | 124 +
drivers/clk/davinci/clk-div.h | 42 ++
2 files changed, 166 insertions(+)
create mode 100644 drivers/clk/davinci/clk-div.c
create
. However
this shows how the migration will happen.
Signed-off-by: Murali Karicheri
---
arch/arm/mach-davinci/Makefile | 22 -
arch/arm/mach-davinci/clock.c | 669 ---
arch/arm/mach-davinci/clock.h | 135 --
arch/arm/mach
clk/davinci folder so
that various soc specific clock initialization code can share these
definitions.
Signed-off-by: Murali Karicheri
---
drivers/clk/davinci/dm644x-clock.c | 304
drivers/clk/davinci/pll.h | 83 ++
drivers/clk/davinci/psc.h
ssues in boot up,
HELP NEEDED!!:
--
I am doing this work as a background activity and hence the progress will be
slow. Please volunteer to help me in this effort by offering to test or
migrating
other devices to this framework.
Murali Karicheri (11):
clk: davinci - add main PLL clock d
initialization code in a specific
platform/SoC.
Signed-off-by: Murali Karicheri
---
drivers/clk/davinci/clock.c | 112 +++
drivers/clk/davinci/clock.h | 80 +++
2 files changed, 192 insertions(+)
create mode 100644 drivers/clk/davinci
As part of the migration, the clock data is now moved to the driver/clk/
davinci/dm644x-clock.c. Currently the clock data is placed under ifndef
CONFIG_COMMON_CLK directive and will be removed in a subsequent patch.
Signed-off-by: Murali Karicheri
---
arch/arm/mach-davinci/davinci.h |3
early to call this function.
Signed-off-by: Murali Karicheri
---
arch/arm/mach-davinci/common.c |6 ++
arch/arm/mach-davinci/include/mach/common.h |4
arch/arm/mach-davinci/time.c|7 +++
3 files changed, 17 insertions(+)
diff --git a/arch/arm
is moved to time.h as clock.h is
being obsoleted. sleep.S and pm.c is modified to include the new header
file replacements.
Signed-off-by: Murali Karicheri
---
arch/arm/mach-davinci/devices.c |2 ++
arch/arm/mach-davinci/include/mach/pll.h | 46 +
arch
This updates clk Makefile and Kconfig to integrate the DaVinci specific
clock drivers. Also add new Kconfig and Makefile for these drivers.
Signed-off-by: Murali Karicheri
---
drivers/clk/Kconfig |2 ++
drivers/clk/Makefile |1 +
drivers/clk/davinci/Kconfig | 44
On 10/28/2012 03:26 PM, Linus Walleij wrote:
On Thu, Oct 25, 2012 at 6:11 PM, Murali Karicheri wrote:
pll dividers are present in the pll controller of DaVinci and Other
SoCs that re-uses the same hardware IP. This has a enable bit for
bypass the divider or enable the driver. This is a sub
On 10/28/2012 03:25 PM, Linus Walleij wrote:
On Thu, Oct 25, 2012 at 6:11 PM, Murali Karicheri wrote:
This is the common clk driver initialization functions for DaVinci
SoCs and other SoCs that uses similar hardware architecture.
clock.h also defines struct types for clock definitions in a
On 10/28/2012 03:24 PM, Linus Walleij wrote:
On Thu, Oct 25, 2012 at 6:11 PM, Murali Karicheri wrote:
This is the driver for the Power Sleep Controller (PSC) hardware
found on DM SoCs as well Keystone SoCs (c6x). This driver borrowed
code from arch/arm/mach-davinci/psc.c and implemented the
On 10/28/2012 03:18 PM, Linus Walleij wrote:
On Thu, Oct 25, 2012 at 6:11 PM, Murali Karicheri wrote:
This is the driver for the main PLL clock hardware found on DM SoCs.
This driver borrowed code from arch/arm/mach-davinci/clock.c and
implemented the driver as per common clock provider API
On 10/31/2012 08:29 AM, Sekhar Nori wrote:
Hi Murali,
On 10/25/2012 9:41 PM, Murali Karicheri wrote:
This is the driver for the main PLL clock hardware found on DM SoCs.
This driver borrowed code from arch/arm/mach-davinci/clock.c and
implemented the driver as per common clock provider API
On 11/01/2012 08:41 AM, Sekhar Nori wrote:
On 10/25/2012 9:41 PM, Murali Karicheri wrote:
This is the common clk driver initialization functions for DaVinci
SoCs and other SoCs that uses similar hardware architecture.
clock.h also defines struct types for clock definitions in a SoC
and clock
On 11/02/2012 07:33 AM, Sekhar Nori wrote:
On 10/25/2012 9:41 PM, Murali Karicheri wrote:
pll dividers are present in the pll controller of DaVinci and Other
SoCs that re-uses the same hardware IP. This has a enable bit for
bypass the divider or enable the driver. This is a sub class of the
Enhance the driver to support partition subnodes inside the nand
device bindings to describe partions on the nand device.
Signed-off-by: Murali Karicheri
---
.../devicetree/bindings/arm/davinci/nand.txt |8
drivers/mtd/nand/davinci_nand.c| 13
Enhance the driver to support partition subnodes inside the nand
device bindings to describe partions on the nand device.
Signed-off-by: Murali Karicheri
---
.../devicetree/bindings/arm/davinci/nand.txt |8
drivers/mtd/nand/davinci_nand.c| 13
usage.
Signed-off-by: Murali Karicheri
---
.../devicetree/bindings/arm/davinci/aemif.txt | 62 +++
drivers/memory/Kconfig | 10 +
drivers/memory/Makefile|1 +
drivers/memory/davinci-aemif.c | 397
the driver to use the new AEMIF platform driver API.
Signed-off-by: Murali Karicheri
---
drivers/mtd/nand/Kconfig |6 +-
drivers/mtd/nand/davinci_nand.c| 40 ++---
include/linux/platform_data/davinci-nand.h | 87
3 files
.
Some of these code has been borrowed from intial patch from Heiko Schocher
. So I have added his name in the Copyright for davinci-aemif.c
This is an RFC to get the intial response so that all the platforms can
be migrated to use this driver.
Murali Karicheri (2):
memory: davinci - add aemif
On 11/03/2012 08:03 AM, Sekhar Nori wrote:
On 11/2/2012 7:23 PM, Murali Karicheri wrote:
On 11/02/2012 07:33 AM, Sekhar Nori wrote:
On 10/25/2012 9:41 PM, Murali Karicheri wrote:
pll dividers are present in the pll controller of DaVinci and Other
SoCs that re-uses the same hardware IP. This
On 11/03/2012 08:07 AM, Sekhar Nori wrote:
On 10/25/2012 9:41 PM, Murali Karicheri wrote:
This is the driver for the Power Sleep Controller (PSC) hardware
found on DM SoCs as well Keystone SoCs (c6x). This driver borrowed
code from arch/arm/mach-davinci/psc.c and implemented the driver
as per
On 11/03/2012 08:35 AM, Sekhar Nori wrote:
On 10/25/2012 9:41 PM, Murali Karicheri wrote:
This is the common clk driver initialization functions for DaVinci
SoCs and other SoCs that uses similar hardware architecture.
clock.h also defines struct types for clock definitions in a SoC
and clock
On 11/03/2012 09:30 AM, Sekhar Nori wrote:
On 10/25/2012 9:41 PM, Murali Karicheri wrote:
This patch adds dm644x clock initialization code that consists of
clocks data for various clocks and clock register callouts to
various clock drivers. It uses following clk drivers for this
1. clk-fixed
On 11/04/2012 08:06 AM, Sekhar Nori wrote:
On 10/25/2012 9:41 PM, Murali Karicheri wrote:
Currently migrate only DM644x as this is being reviewed. Once all
platforms are migrated, the Makefile will be cleaned up to remove
obsoleted files clock.o and psc.o
Signed-off-by: Murali Karicheri
On 11/04/2012 08:34 AM, Sekhar Nori wrote:
On 10/25/2012 9:41 PM, Murali Karicheri wrote:
This updates clk Makefile and Kconfig to integrate the DaVinci specific
clock drivers. Also add new Kconfig and Makefile for these drivers.
Signed-off-by: Murali Karicheri
As mentioned before, this
On 11/04/2012 09:05 AM, Sekhar Nori wrote:
On 10/25/2012 9:41 PM, Murali Karicheri wrote:
pll.h is added to migrate some of the PLL controller defines for sleep.S.
psc.h is modified to keep only PSC modules definitions needed by sleep.S
after migrating to common clock. The definitions under
On 11/04/2012 08:52 AM, Rob Herring wrote:
OMAP GPMC
Could you send me a link please?
Murali
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Please
On 11/04/2012 09:05 AM, Sekhar Nori wrote:
On 10/25/2012 9:41 PM, Murali Karicheri wrote:
pll.h is added to migrate some of the PLL controller defines for sleep.S.
psc.h is modified to keep only PSC modules definitions needed by sleep.S
after migrating to common clock. The definitions under
On 10/25/2012 09:12 AM, Prabhakar Lad wrote:
Hi Murali,
Thanks for the patch. I'll queue this patch for 3.8.
On Mon, Oct 22, 2012 at 9:06 PM, Murali Karicheri wrote:
As a first step towards migrating davinci platforms to use common clock
framework, replace all instances of clk_e
these patches, I would suggest you queue this
against 3.7 rcx.
Murali
On Mon, Oct 22, 2012 at 9:06 PM, Murali Karicheri wrote:
As a first step towards migrating davinci platforms to use common clock
framework, replace all instances of clk_enable() with clk_prepare_enable()
and clk_disable()
On 11/15/2012 11:20 AM, Grant Likely wrote:
On Mon, 12 Nov 2012 16:28:22 -0500, Murali Karicheri
wrote:
This adds OF support to DaVinci SPI controller to configure platform
data through device bindings.
Signed-off-by: Murali Karicheri
Hi Murali,
Comments below...
---
.../devicetree
itself.
spi_davinci_get_pdata() now populates the pdata in the above structure
with parsed values from DT bindings.
- rebased to v3.7 rc7 of linux-next
- replaces clk_* APIs with their prepare/unprepare versions
Murali Karicheri (1):
spi: davinci: add OF support for the spi controller
This adds OF support to DaVinci SPI controller to configure platform
data through device bindings. Also replaces clk_enable() with
of clk_prepare_enable() as well as clk_disable() with
clk_disable_unprepare().
Signed-off-by: Murali Karicheri
Reviewed-by : Grant Likely
---
.../devicetree
On 10/20/2012 02:39 AM, Prabhakar Lad wrote:
Hi Murali,
On Friday 19 October 2012 11:42 PM, Murali Karicheri wrote:
As a first step towards migrating davinci platforms to use common clock
framework, replace all instances of clk_enable() with clk_prepare_enable()
and clk_disable() with
As a first step towards migrating davinci platforms to use common clock
framework, replace all instances of clk_enable() with clk_prepare_enable()
and clk_disable() with clk_disable_unprepare().
Also fixes some issues related to clk clean up in the driver
Signed-off-by: Murali Karicheri
As a first step towards migrating davinci platforms to use common clock
framework, replace all instances of clk_enable() with clk_prepare_enable()
and clk_disable() with clk_disable_unprepare().
Also fixes some issues related to clk clean up in the driver
Signed-off-by: Murali Karicheri
Signed-off-by: Murali Karicheri
diff --git a/Documentation/devicetree/bindings/tty/serial/of-serial.txt
b/Documentation/devicetree/bindings/tty/serial/of-serial.txt
index 0847fde..423b7ff 100644
--- a/Documentation/devicetree/bindings/tty/serial/of-serial.txt
+++ b/Documentation/devicetree
rate.
Signed-off-by: Murali Karicheri
diff --git a/drivers/tty/serial/of_serial.c b/drivers/tty/serial/of_serial.c
index 34e7187..6f64f02 100644
--- a/drivers/tty/serial/of_serial.c
+++ b/drivers/tty/serial/of_serial.c
@@ -21,8 +21,10 @@
#include
#include
#include
+#include
struct
This adds OF support to DaVinci SPI controller to configure platform
data through device bindings. Also replaces clk_enable() with
of clk_prepare_enable() as well as clk_disable() with
clk_disable_unprepare().
Signed-off-by: Murali Karicheri
Reviewed-by : Grant Likely
---
- Change log
- v2
This adds OF support to DaVinci SPI controller to configure platform
data through device bindings.
Signed-off-by: Murali Karicheri
---
.../devicetree/bindings/spi/spi-davinci.txt| 50
drivers/spi/spi-davinci.c | 80 +++-
2 files
On 11/03/2012 09:30 AM, Sekhar Nori wrote:
On 10/25/2012 9:41 PM, Murali Karicheri wrote:
This patch adds dm644x clock initialization code that consists of
clocks data for various clocks and clock register callouts to
various clock drivers. It uses following clk drivers for this
1. clk-fixed
On 11/06/2012 04:31 AM, Sekhar Nori wrote:
On 11/5/2012 8:50 PM, Murali Karicheri wrote:
On 11/03/2012 08:35 AM, Sekhar Nori wrote:
On 10/25/2012 9:41 PM, Murali Karicheri wrote:
This is the common clk driver initialization functions for DaVinci
SoCs and other SoCs that uses similar hardware
On 11/06/2012 02:44 AM, Sekhar Nori wrote:
On 11/6/2012 2:38 AM, Murali Karicheri wrote:
On 11/04/2012 08:52 AM, Rob Herring wrote:
OMAP GPMC
Could you send me a link please?
https://www.google.com/search?q=RFC+OMAP+GPMC+DT+bindings
The patches series is sent by Daniel Mack. v3 was the last
On 11/04/2012 08:52 AM, Rob Herring wrote:
On 11/02/2012 11:21 AM, Murali Karicheri wrote:
This is a platform driver for asynchronous external memory interface
available on TI SoCs. This driver was previously located inside the
mach-davinci folder. As this DaVinci IP is re-used across multiple
On 11/02/2012 03:05 PM, Stephen Warren wrote:
On 11/02/2012 10:21 AM, Murali Karicheri wrote:
This is a platform driver for asynchronous external memory interface
available on TI SoCs. This driver was previously located inside the
mach-davinci folder. As this DaVinci IP is re-used across
Enhance the driver to support partition subnodes inside the nand
device bindings to describe partitions on the nand device.
Signed-off-by: Murali Karicheri
---
.../devicetree/bindings/arm/davinci/nand.txt |8
drivers/mtd/nand/davinci_nand.c| 13
borrowed from intial patch from Heiko Schocher
. So I have added his name in the Copyright for davinci-aemif.c
This is an RFC to get the intial response so that all the platforms can
be migrated to use this driver.
Murali Karicheri (2):
memory: davinci - add aemif controller platform driver
driver usage.
This supports configuration of the bus either through platform_data or
through DT bindings.
Signed-off-by: Murali Karicheri
---
.../devicetree/bindings/memory/davinci-aemif.txt | 103 +
drivers/memory/Kconfig | 10 +
drivers/memory/Makefile
davinci_aemif_of_match,
+},
+};
+
+static int __init davinci_aemif_init(void)
+{
+return platform_driver_register(&davinci_aemif_driver);
+}
+subsys_initcall(davinci_aemif_init);
+
+static void __exit davinci_aemif_exit(void)
+{
+clk_disable_unprepare(aemif->clk);
+clk_put
Stephen,
Thanks for reviewing this. See my responses below
On 11/07/2012 03:05 PM, Stephen Warren wrote:
On 11/06/2012 02:47 PM, Murali Karicheri wrote:
This is a platform driver for asynchronous external memory interface
available on TI SoCs. This driver was previously located inside the
mach
On 11/07/2012 03:08 PM, Stephen Warren wrote:
On 11/06/2012 02:47 PM, Murali Karicheri wrote:
DaVinci NAND driver is a controller driver based on the AEMIF hardware
IP found on TI SoCs. It is also used on SoCs that are not DaVinci based. This
patch removes the driver dependency on DaVinci
On 12/22/2012 05:08 AM, Grant Likely wrote:
On Fri, 21 Dec 2012 15:13:26 -0500, Murali Karicheri
wrote:
With RT pre-empt patch applied to Linux kernel, the irq handler will be
force converted to an irq thread. spi driver can get back to back messages
from the slave device. In such cases, IRQ
On 12/19/2012 08:18 AM, Grant Likely wrote:
On Sat, 15 Dec 2012 00:27:58 +, Grant Likely
wrote:
On Tue, 11 Dec 2012 16:20:39 -0500, Murali Karicheri
wrote:
This adds OF support to DaVinci SPI controller to configure platform
data through device bindings. Also replaces clk_enable() with
On 11/15/2012 11:20 AM, Grant Likely wrote:
On Mon, 12 Nov 2012 16:28:22 -0500, Murali Karicheri
wrote:
This adds OF support to DaVinci SPI controller to configure platform
data through device bindings.
Signed-off-by: Murali Karicheri
Hi Murali,
Comments below...
---
.../devicetree
On 10/16/2012 11:24 AM, Murali Karicheri wrote:
Currently this driver expects the clock-frequency attribute. This
patch allows getting clock-frequency through clk driver API
clk_get_rate() if clock-frequency attribute is not defined.
So in the device bindings for serial device, one can add
On 10/16/2012 11:24 AM, Murali Karicheri wrote:
Signed-off-by: Murali Karicheri
diff --git a/Documentation/devicetree/bindings/tty/serial/of-serial.txt
b/Documentation/devicetree/bindings/tty/serial/of-serial.txt
index 0847fde..423b7ff 100644
--- a/Documentation/devicetree/bindings/tty/serial
On 12/13/2012 12:38 AM, Kumar, Anil wrote:
On Thu, Dec 13, 2012 at 07:07:55, Stephen Rothwell wrote:
Hi Artem,
Today's linux-next merge of the l2-mtd tree got a conflict in
Documentation/devicetree/bindings/arm/davinci/nand.txt between commit
fed16bba8726 ("mtd: nand: davinci: fix the binding d
This fix coding style issues detected by running checkpatch.pl -f
option on files under net/hsr.
Signed-off-by: Murali Karicheri
---
- applies to net-next/master
- Test logs at http://pastebin.ubuntu.com/24917637/
net/hsr/hsr_device.c | 49 +
net/hsr/hsr_forward.c
On 08/27/2015 06:58 PM, santosh shilimkar wrote:
On 8/27/2015 2:44 PM, Murali Karicheri wrote:
When using accumulator queue for rx side for network driver, following
warning is seen when doing a reboot command from Linux console. This
is because, affinity value is not reset before calling
firmware in the file system will not cause other queue types not available
due to driver probe failure.
Murali Karicheri (4):
Documentation: dt: soc: move driver description to a separate document
soc: ti: add firmware file name as part of the driver
ARM: dts: keystone: enable accumulator
Currently the DT bindings have details about the driver as well. This
patch moves this to a separate document for knav qmss driver so that
driver detail update can be done as needed without polluting the DT
bindings description.
Signed-off-by: Murali Karicheri
---
Documentation/arm/keystone
system and boot up kernel.
Signed-off-by: Murali Karicheri
---
- v2 : new patch added
Documentation/arm/keystone/knav-qmss.txt | 6 ++
drivers/soc/ti/knav_qmss.h | 2 ++
drivers/soc/ti/knav_qmss_acc.c | 10 --
drivers/soc/ti/knav_qmss_queue.c | 20
it is assumed that driver needs to change to
accommodate the new firmware and new firmware file name will get added to
the array.
Also update the DT document to remove the firmware attribute and add
description about firmware in the driver documentation.
Signed-off-by: Murali Karicheri
---
- v2
Add low priority accumulator channel that can monitor multiple QMSS
queues. User for example could use the accumular queue for Netcp
Rx completion. While at it, also add an extra line end of each top
level node in DTS to make it more readable.
Signed-off-by: Murali Karicheri
---
- firmware name
On 10/12/2015 03:46 PM, Murali Karicheri wrote:
This patch series enable accumulator queue support for K2 SoCs. Accumulator
queues are a type of qmss queue that is monitored by the PDSP firmware and
accumulated. Host is interrupted by PDSP firmware when packets become
available in a ring buffer
Currently the DT bindings have details about the driver as well. This
patch moves this to a separate document for knav qmss driver so that
driver detail update can be done as needed without polluting the DT
bindings description.
Signed-off-by: Murali Karicheri
---
Documentation/arm/keystone
system and boot up kernel.
Signed-off-by: Murali Karicheri
---
- v2 : new patch added
Documentation/arm/keystone/knav-qmss.txt | 6 ++
drivers/soc/ti/knav_qmss.h | 2 ++
drivers/soc/ti/knav_qmss_acc.c | 10 --
drivers/soc/ti/knav_qmss_queue.c | 20
On 10/12/2015 03:46 PM, Murali Karicheri wrote:
This patch series enable accumulator queue support for K2 SoCs. Accumulator
queues are a type of qmss queue that is monitored by the PDSP firmware and
accumulated. Host is interrupted by PDSP firmware when packets become
available in a ring buffer
On 10/13/2015 10:42 AM, Rob Herring wrote:
On Mon, Oct 12, 2015 at 2:46 PM, Murali Karicheri wrote:
Currently the DT bindings have details about the driver as well. This
patch moves this to a separate document for knav qmss driver so that
driver detail update can be done as needed without
Santosh,
On 10/13/2015 12:01 PM, santosh shilimkar wrote:
On 10/13/2015 6:56 AM, Murali Karicheri wrote:
On 10/12/2015 03:46 PM, Murali Karicheri wrote:
This patch series enable accumulator queue support for K2 SoCs.
Santosh, Arnd,
Could you please review and let me know if there is any
On 10/13/2015 12:21 PM, santosh shilimkar wrote:
On 10/13/2015 9:14 AM, Murali Karicheri wrote:
Santosh,
On 10/13/2015 12:01 PM, santosh shilimkar wrote:
On 10/13/2015 6:56 AM, Murali Karicheri wrote:
On 10/12/2015 03:46 PM, Murali Karicheri wrote:
This patch series enable accumulator queue
On 10/13/2015 10:42 AM, Rob Herring wrote:
On Mon, Oct 12, 2015 at 2:46 PM, Murali Karicheri wrote:
Currently the DT bindings have details about the driver as well. This
patch moves this to a separate document for knav qmss driver so that
driver detail update can be done as needed without
On 10/13/2015 02:01 PM, Rob Herring wrote:
On Tue, Oct 13, 2015 at 12:28 PM, Murali Karicheri wrote:
On 10/13/2015 10:42 AM, Rob Herring wrote:
On Mon, Oct 12, 2015 at 2:46 PM, Murali Karicheri
wrote:
Currently the DT bindings have details about the driver as well. This
patch moves this
t;;
+ status = "disabled";
+ };
+ };
+
};
};
};
Wingman,
This should be a separate patch and remove the sane from Driver patch.
i.e. send 1/3 ane 2/3 in one series and 3/3
system and boot up kernel.
Signed-off-by: Murali Karicheri
---
v3: no change from v2
v2: new patch
Documentation/arm/keystone/knav-qmss.txt | 6 ++
drivers/soc/ti/knav_qmss.h | 2 ++
drivers/soc/ti/knav_qmss_acc.c | 10 --
drivers/soc/ti/knav_qmss_queue.c
n the file system will not cause other queue types not available
due to driver probe failure.
Murali Karicheri (3):
Documentation: dt: soc: Add description for knav qmss driver
soc: ti: add firmware file name as part of the driver
soc: ti: qmss: make acc queue support optional in the driver
Doc
Add documentation for knav qmss driver.
Signed-off-by: Murali Karicheri
---
v3: not removed description from DT document
Documentation/arm/keystone/knav-qmss.txt | 24
1 file changed, 24 insertions(+)
create mode 100644 Documentation/arm/keystone/knav-qmss.txt
diff
it is assumed that driver needs to change to
accommodate the new firmware and new firmware file name will get added to
the array.
Also update the DT document to remove the firmware attribute and add
description about firmware in the driver documentation.
Signed-off-by: Murali Karicheri
Acked-by
Add low priority accumulator channel that can monitor multiple QMSS
queues. User for example could use the accumular queue for Netcp
Rx completion. While at it, also add an extra line end of each top
level node in DTS to make it more readable.
Signed-off-by: Murali Karicheri
---
- dependent on
Add a documentation for knav qmss driver.
Signed-off-by: Murali Karicheri
---
v4: added Arnd's Acked-by
Documentation/arm/keystone/knav-qmss.txt | 24
1 file changed, 24 insertions(+)
create mode 100644 Documentation/arm/keystone/knav-qmss.txt
diff --
system and boot up kernel.
Signed-off-by: Murali Karicheri
---
v4: no change from v3
Documentation/arm/keystone/knav-qmss.txt | 6 ++
drivers/soc/ti/knav_qmss.h | 2 ++
drivers/soc/ti/knav_qmss_acc.c | 10 --
drivers/soc/ti/knav_qmss_queue.c | 20
it is assumed that driver needs to change to
accommodate the new firmware and new firmware file name will get added to
the array.
Also update the DT document to remove the firmware attribute and add
description about firmware in the driver documentation.
Signed-off-by: Murali Karicheri
Acked-by
linux-firmware.git.
- Additionally added accumulator queue support optional so that lack
of firmware in the file system will not cause other queue types not
available due to driver probe failure.
Murali Karicheri (3):
Documentation: dt: soc: Add description for knav q
On 09/04/2015 11:53 PM, santosh.shilim...@oracle.com wrote:
On 9/4/15 5:46 PM, Murali Karicheri wrote:
To help the user, print the PDSP file name as part of
knav_queue_load_pdsp(). This will be useful for users to know what
version of the firmware is loaded to PDSP. Also update the
document for
On 09/09/2015 01:12 PM, santosh.shilim...@oracle.com wrote:
On 9/9/15 9:38 AM, Murali Karicheri wrote:
On 09/04/2015 11:53 PM, santosh.shilim...@oracle.com wrote:
On 9/4/15 5:46 PM, Murali Karicheri wrote:
To help the user, print the PDSP file name as part of
knav_queue_load_pdsp(). This will
te on this? I did a grep on the string "Redistributions
in binary form must reproduce the above copyright" and I could find
several instance of this. So I am not sure what you mean by "The current
code does not do this when compiled".
Thanks
--
Murali Karicheri
Lin
On 10/14/2015 11:41 AM, santosh shilimkar wrote:
10/14/2015 7:17 AM, Murali Karicheri wrote:
This patch series enable accumulator queue support for K2 SoCs.
Accumulator
queues are a type of qmss queue that is monitored by the PDSP firmware
and
accumulated. Host is interrupted by PDSP firmware
On 10/15/2015 12:21 PM, santosh shilimkar wrote:
On 10/15/2015 9:02 AM, Murali Karicheri wrote:
On 10/14/2015 11:41 AM, santosh shilimkar wrote:
10/14/2015 7:17 AM, Murali Karicheri wrote:
This patch series enable accumulator queue support for K2 SoCs.
Accumulator
queues are a type of qmss
-by: Murali Karicheri
---
drivers/soc/ti/knav_qmss_queue.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/soc/ti/knav_qmss_queue.c b/drivers/soc/ti/knav_qmss_queue.c
index f3a0b6a..89789e2 100644
--- a/drivers/soc/ti/knav_qmss_queue.c
+++ b/drivers/soc/ti
On 10/15/2015 02:59 PM, Murali Karicheri wrote:
When firmware image for PDSP firmware is absent in the file system
the kernel boot with ramfs/nfs is stuck for 60 seconds being the
the default timeout. request_firmware_direct() is to take care of
such optional firmware loading and hence replace
s continue to differentiate on PHY
register design. :)
So what? Network drivers differ radically in register design, yet we
still have a standardised interface to network drivers.
--
Murali Karicheri
Linux Kernel, Keystone
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early to add the defconfig update and should be
deferred to when the DTS update is made. What if the newer keystone 2
SoC never end up in the tree?
Murali
Regards,
Santosh
--
Murali Karicheri
Linux Kernel, Keystone
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that series, not now.
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Murali Karicheri
Linux Kernel, Keystone
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