From: Magnus Damm
Add r8a7779 specific support for IRLM bit configuration
in the INTC-IRQPIN driver. Without this code we need
special workaround code in arch/arm/mach-shmobile.
The IRLM bit for the INTC hardware exists on various
older SH-based SoCs and is used to select between two
modes for
eeds to be applied before
patch 2. I suggest merging patch 1 through the IRQCHIP tree and
adding patch 1 to mach-shmobile when the first patch hits -rc1.
Signed-off-by: Magnus Damm
---
Built on top of renesas-devel-20141202-v3.18-rc7 and
"[PATCH] ARM: shmobile: r8a7779 CCF DTS update&q
Hi Simon,
On Thu, Dec 4, 2014 at 4:18 PM, Simon Horman wrote:
> Hi Magnus,
>
> I see you have been busy with the marzen board.
Yes! =)
> On Wed, Dec 03, 2014 at 09:18:03PM +0900, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Add r8a7779 specific support for IR
Hi Simon,
On Thu, Dec 4, 2014 at 4:21 PM, Simon Horman wrote:
> Hi Magnus,
>
> On Wed, Dec 03, 2014 at 09:18:13PM +0900, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Adjust the r8a7779 SoC DTS and the Marzen Reference
>> C board code to use DTS only for INTC-IR
Hi Geert,
On Thu, Dec 4, 2014 at 6:19 PM, Geert Uytterhoeven wrote:
> Hi Magnus,
>
> On Thu, Dec 4, 2014 at 8:33 AM, Magnus Damm wrote:
>>>> --- 0002/arch/arm/boot/dts/r8a7779.dtsi
>>>> +++ work/arch/arm/boot/dts/r8a7779.dtsi 2014-12-03
>>>> 2
Hi Geert,
On Thu, Dec 4, 2014 at 6:31 PM, Geert Uytterhoeven wrote:
> Hi Magnus,
>
> On Thu, Dec 4, 2014 at 10:24 AM, Magnus Damm wrote:
>> On Thu, Dec 4, 2014 at 6:19 PM, Geert Uytterhoeven
>> wrote:
>>> On Thu, Dec 4, 2014 at 8:33 AM, Magnus Damm wrote:
>
Hi Laurent,
On Wed, Dec 17, 2014 at 11:08 AM, Laurent Pinchart
wrote:
> Magnus, you have told me that you've performed tests on Marzen with
> CONFIG_PREEMPT_NONE and with both TWD enabled and disabled. If you could
> perform the same tests with CONFIG_PREEMPT instead without noticing any
> regres
Hi Stephen,
On Fri, Feb 13, 2015 at 8:23 PM, Stephen Boyd wrote:
> On 02/13/15 12:20, Simon Horman wrote:
>> Hi Stephen,
>>
>> On Fri, Feb 13, 2015 at 10:06:39AM -0800, Stephen Boyd wrote:
>>> diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c
>>> b/arch/arm/mach-shmobile/smp-r8a7779.c
>>> index
Hi Stephen,
On Fri, Feb 13, 2015 at 8:59 PM, Stephen Boyd wrote:
> On 02/13/15 12:54, Magnus Damm wrote:
>> Hi Stephen,
>>
>> On Fri, Feb 13, 2015 at 8:23 PM, Stephen Boyd wrote:
>>> On 02/13/15 12:20, Simon Horman wrote:
>>>> Hi Stephen,
>>
can be hotplugged, so it's redundant to
> override the default behavior.
>
> Signed-off-by: Stephen Boyd
> ---
> arch/arm/mach-shmobile/smp-r8a7779.c | 7 ---
> 1 file changed, 7 deletions(-)
Thanks for breaking out this change. It looks good to me!
Acked-by: Magnus Da
Hi Russell,
On Fri, Feb 13, 2015 at 11:01 PM, Russell King - ARM Linux
wrote:
> On Fri, Feb 13, 2015 at 09:44:50PM +0000, Magnus Damm wrote:
>> Also, based on the comment in mcpm_cpu_can_disable() it looks like the
>> PSCI hook may be executed once only with your change in plac
From: Magnus Damm
Update the TMU driver to use cpu_possible_mask as cpumask to make
r8a7779 SMP work as expected with or without the ARM TWD timer.
Signed-off-by: Magnus Damm
---
drivers/clocksource/sh_tmu.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- 0001/drivers
Hi Laurent,
On Tue, Dec 16, 2014 at 8:20 PM, Laurent Pinchart
wrote:
> Hi Daniel,
>
> On Tuesday 16 December 2014 12:14:40 Daniel Lezcano wrote:
>> On 12/16/2014 10:48 AM, Magnus Damm wrote:
>> > From: Magnus Damm
>> >
>> > Update the TMU driver t
Hi Geert,
On Tue, Dec 16, 2014 at 9:40 PM, Geert Uytterhoeven
wrote:
> Hi Magnus,
>
> On Tue, Dec 16, 2014 at 12:46 PM, Magnus Damm wrote:
>>> Could you please confirm that you've tested both CONFIG_PREEMPT_NONE and
>>> CONFIG_PREEMPT with and without the ARM T
Hi Laurent,
On Wed, Dec 17, 2014 at 11:08 AM, Laurent Pinchart
wrote:
> Hi Magnus and Geert,
>
> On Wednesday 17 December 2014 10:30:33 Magnus Damm wrote:
>> On Tue, Dec 16, 2014 at 9:40 PM, Geert Uytterhoeven wrote:
>> > On Tue, Dec 16, 2014 at 12:46 PM, Magnus Damm
Hi Laurent,
On Thu, Dec 18, 2014 at 6:41 AM, Laurent Pinchart
wrote:
> Hi Magnus,
>
> Thank you for the patch.
>
> On Monday 15 December 2014 14:09:20 Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Add r8a7779 specific support for IRLM bit configuration
>>
Hi Laurent,
On Thu, Dec 18, 2014 at 11:39 AM, Laurent Pinchart
wrote:
> Hi Magnus,
>
> On Thursday 18 December 2014 10:26:27 Magnus Damm wrote:
>> On Thu, Dec 18, 2014 at 6:41 AM, Laurent Pinchart wrote:
>> > On Monday 15 December 2014 14:09:20 Magnus Damm wrote:
From: Magnus Damm
Fix warnings related to size_t when building for 64-bit architectures:
drivers/gpu/drm/drm_gem_cma_helper.c: In function âdrm_gem_cma_createâ:
drivers/gpu/drm/drm_gem_cma_helper.c:114:4: warning: format â%dâ expects
argument of type âintâ, but argument 3 has type
From: Magnus Damm
Make sure the following files are removed as expected during "make clean":
+ arch/x86/vdso/vdso-image-32-int80.c
+ arch/x86/vdso/vdso-image-32-syscall.c
+ arch/x86/vdso/vdso-image-32-sysenter.c
+ arch/x86/vdso/vdso-image-64.c
Signed-off-by: Magnus Damm
---
arc
From: Magnus Damm
Add r8a7779 specific support for IRLM bit configuration
in the INTC-IRQPIN driver. Without this code we need
special workaround code in arch/arm/mach-shmobile.
The IRLM bit for the INTC hardware exists on various
older SH-based SoCs and is used to select between two
modes for
From: Magnus Damm
Introduce a bitmap for context handing and convert the
interrupt routine to go handle all registered contexts.
At this point the number of contexts are still limited.
Also remove the use of the ARM specific mapping variable
from ipmmu_irq() to allow compile on ARM64.
Signed
from initial series
- Updated bitmap code locking and also used lighter bitop functions
- Updated the Kconfig bits to apply on top of ARCH_RENESAS
Signed-off-by: Magnus Damm
---
Built on top of next-20160314
drivers/iommu/Kconfig |1
drivers/iommu/ipmmu-vmsa.c | 146
From: Magnus Damm
The IPMMU driver is using DT these days, and platform data is no longer
used by the driver. Remove unused code.
Signed-off-by: Magnus Damm
Reviewed-by: Laurent Pinchart
---
Changes since V1:
- Added Reviewed-by from Laurent
drivers/iommu/ipmmu-vmsa.c |5 -
1
From: Magnus Damm
Make the driver compile on more than just 32-bit ARM
by breaking out and wrapping ARM specific functions
in #ifdefs. Not pretty, but needed to be able to use
the driver on other architectures like ARM64.
Signed-off-by: Magnus Damm
---
Changes since V1:
- Rebased to work
From: Magnus Damm
Neither the ARM page table code enabled by IOMMU_IO_PGTABLE_LPAE
nor the IPMMU_VMSA driver actually depends on ARM_LPAE, so get
rid of the dependency.
Tested with ipmmu-vmsa on r8a7794 ALT and a kernel config using:
# CONFIG_ARM_LPAE is not set
Signed-off-by: Magnus Damm
Hi Marek,
On Fri, Feb 19, 2016 at 5:22 PM, Marek Szyprowski
wrote:
> This patch replaces ARM-specific IOMMU-based DMA-mapping implementation
> with generic IOMMU DMA-mapping code shared with ARM64 architecture. The
> side-effect of this change is a switch from bitmap-based IO address space
> mana
From: Magnus Damm
Instead of assuming that CONFIG_ARM=y also means CONFIG_IOMMU_DMA=n,
convert the #ifdefs to take CONFIG_IOMMU_DMA into consideration
so 32-bit ARM can make use of CONFIG_IOMMU_DMA=y as well once those
bits are in place.
Signed-off-by: Magnus Damm
---
drivers/iommu/ipmmu
series based on code earlier included in
the series below but has been reworked to also fit on 32-bit ARM:
[PATCH/RFC 00/10] iommu/ipmmu-vmsa: Experimental r8a7795 support
Signed-off-by: Magnus Damm
---
Built on top of next-20160315
Depends on [PATCH v2 00/04] iommu/ipmmu-vmsa: IPMMU multi
From: Magnus Damm
Break out the utlb parsing code and dev_data allocation into a
separate function. This is preparation for future code sharing.
Signed-off-by: Magnus Damm
---
drivers/iommu/ipmmu-vmsa.c | 125
1 file changed, 70 insertions(+), 55
From: Magnus Damm
Break out the domain allocation code into a separate function.
This is preparation for future code sharing.
Signed-off-by: Magnus Damm
---
drivers/iommu/ipmmu-vmsa.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
--- 0014/drivers/iommu/ipmmu-vmsa.c
From: Magnus Damm
Introduce a new set of iommu_ops suitable for 64-bit ARM
as well as 32-bit ARM when CONFIG_IOMMU_DMA=y. The ->of_xlate()
callback is needed by the code exported by of_iommu.h and
it is wrapped in #ifdefs to also compile of x86_64.
Signed-off-by: Magnus Damm
---
driv
From: Magnus Damm
Add root device handling to the IPMMU driver by
allowing certain DT compat strings to enable
has_cache_leaf_nodes that in turn will support
both root devices with interrupts and leaf devices
that face the actual IPMMU consumer devices.
Signed-off-by: Magnus Damm
---
drivers
ional DT integration
changes.
Signed-off-by: Magnus Damm
---
Developed on top of next-20160315 and:
[PATCH v2 00/04] iommu/ipmmu-vmsa: IPMMU multi-arch update V2
[PATCH 00/04] iommu/ipmmu-vmsa: IPMMU CONFIG_IOMMU_DMA update
drivers/iommu/ipmmu-vmsa.c | 231
From: Magnus Damm
Write IMCTR both in the root device and the leaf node.
Signed-off-by: Magnus Damm
---
drivers/iommu/ipmmu-vmsa.c | 17 ++---
1 file changed, 14 insertions(+), 3 deletions(-)
--- 0021/drivers/iommu/ipmmu-vmsa.c
+++ work/drivers/iommu/ipmmu-vmsa.c 2016-03
From: Magnus Damm
The r8a7795 IPMMU supports 64-bit bus mastering and
coherency for page tables.
Signed-off-by: Magnus Damm
---
drivers/iommu/ipmmu-vmsa.c |1 +
1 file changed, 1 insertion(+)
--- 0020/drivers/iommu/ipmmu-vmsa.c
+++ work/drivers/iommu/ipmmu-vmsa.c 2016-03-18 00:22
From: Magnus Damm
Add support for up to 4 contexts. Each context is mapped
to one domain. One domain is associated with each device,
however one or more uTLBs for a single device are kept
in the same domain.
Signed-off-by: Magnus Damm
---
drivers/iommu/ipmmu-vmsa.c | 11 +--
1 file
From: Magnus Damm
Introduce struct ipmmu_features to track various hardware
and software implementation changes inside the driver for
different kinds of IPMMU hardware. Add use_ns_alias_offset
as a first example of a feature to control if the secure
register bank offset should be used or not
From: Magnus Damm
Right now the ->xlate() call gets invoked even though
the iommu device has status = "disabled" in DT, so
make sure we skip over disabled devices.
In my mind it would make sense to have this at some
shared level, but I guess some users may want to
configure the iom
From: Magnus Damm
Introduce support for two bit SL0 bitfield in IMTTBCR
by using a separate feature flag.
Signed-off-by: Magnus Damm
---
drivers/iommu/ipmmu-vmsa.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
--- 0025/drivers/iommu/ipmmu-vmsa.c
+++ work/drivers
From: Magnus Damm
Tie in r8a7795 features and update the IOMMU_OF_DECLARE
compat string to hook up the updated compat string.
TODO:
- Go over init order once more
- Consider counting number of IPMMU devices from ->xlate()
- Experiment with delaying call to bus_set_iommu()
- Poke around w
From: Magnus Damm
Allow certain DT compat strings to opt-out of setting up
IMBUSCR. The default case is unchanged.
Signed-off-by: Magnus Damm
---
drivers/iommu/ipmmu-vmsa.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
--- 0023/drivers/iommu/ipmmu-vmsa.c
+++ work
Hi Joerg, everyone,
On Mon, Nov 2, 2015 at 12:14 AM, Joerg Roedel wrote:
> Hi Stephen,
>
> On Sun, Nov 01, 2015 at 10:42:52PM +1100, Stephen Rothwell wrote:
>> After merging the iommu tree, today's linux-next build (x86_64
>> allmodconfig) failed like this:
>>
>> drivers/iommu/ipmmu-vmsa.c:24:27:
r8a7794, so treating the BSP bindings as experimental and
migrate away seems reasonable.
Signed-off-by: Magnus Damm
---
Written against v4.4-rc1
drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 282 ++
1 file changed, 252 insertions(+), 30 deletions(-)
--
To unsubscribe
From: Magnus Damm
Separate DU CDE and DISP signals to let the r8a7794 ALT
board that lacks CDE handle the DISP signal by itself.
The groups "du0_cde_disp" and "du1_cde_disp" are replaced
by "du0_cde", "du1_cde", "du0_disp" and "du1_disp&
From: Magnus Damm
Break out the r8a7794 DU ODDF (EXDISP/EXODDF/EXDE) signal
from the sync group into a separate unit. This makes the
sync group fit with the r8a7794 ALT board that only uses
HSYNC and VSYNC signals.
This makes the r8a7794 PFC similar to the existing r8a7791
PFC DU implementation
From: Magnus Damm
Add missing r8a7794 DU dot clock output signals and in
particular the DU1_DOTCLKOUT0 signal on GP4_25 which is
needed by DU1 on the r8a7794 ALT board.
The groups "du0_clk_out" and "du1_clk_out" are replaced by
"du0_dotclkout0", "du
From: Koji Matsuoka
r8a7794 PFC DU support from the R-Car Gen2 v1.9.4 BSP
Signed-off-by: Koji Matsuoka
Signed-off-by: Magnus Damm
---
drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 170 +++
1 file changed, 170 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc
viewed-by from Simon - thanks!
Please see each individual patch for more detailed information.
Signed-off-by: Magnus Damm
Reviewed-by: Geert Uytterhoeven [Patch 3-5]
Reviewed-by: Rob Herring [Patch 1-5]
Reviewed-by: Simon Horman
---
Developed on top of "renesas-drivers-2019-08-13-v5.
From: Magnus Damm
Document the on-chip CMT devices included in r8a7740 and sh73a0.
Included in this patch is DT binding documentation for 32-bit CMTs
CMT0, CMT2, CMT3 and CMT4. They all contain a single channel and are
quite similar however some minor differences still exist:
- "Counter
From: Magnus Damm
This patch adds DT binding documentation for the CMT devices on
the R-Car Gen2 V2H (r8a7792) SoC.
Signed-off-by: Magnus Damm
Reviewed-by: Geert Uytterhoeven
Reviewed-by: Rob Herring
Reviewed-by: Simon Horman
---
Documentation/devicetree/bindings/timer/renesas,cmt.txt
From: Magnus Damm
This patch adds DT binding documentation for the CMT devices on
the R-Car Gen3 D3 (r8a77995) SoC.
Signed-off-by: Magnus Damm
Reviewed-by: Geert Uytterhoeven
Reviewed-by: Rob Herring
Reviewed-by: Simon Horman
---
Documentation/devicetree/bindings/timer/renesas,cmt.txt
From: Magnus Damm
The R-Car Gen3 SoCs so far come with a total for 4 on-chip CMT devices:
- CMT0
- CMT1
- CMT2
- CMT3
CMT0 includes two rather basic 32-bit timer channels. The rest of the on-chip
CMT devices support 48-bit counters and have 8 channels each.
Based on the data sheet
From: Magnus Damm
This patch reworks the DT binding documentation for the 6-channel
48-bit CMTs known as CMT1 on r8a7740 and sh73a0.
After the update the same style of DT binding as the rest of the upstream
SoCs will now also be used by r8a7740 and sh73a0. The DT binding "cmt-48"
From: Magnus Damm
Add SoC-specific matching for CMT1 on r8a7740 and sh73a0.
This allows us to move away from the old DT bindings such as
- "renesas,cmt-48-sh73a0"
- "renesas,cmt-48-r8a7740"
- "renesas,cmt-48"
in favour for the now commonly used format "ren
Hi Simon,
On Wed, Jul 24, 2019 at 8:12 PM Simon Horman wrote:
>
> On Thu, Jul 18, 2019 at 08:45:24PM +0900, Magnus Damm wrote:
> > From: Magnus Damm
> >
> > Add SoC-specific matching for CMT1 on r8a7740 and sh73a0.
> >
> > This allows us to move a
From: Magnus Damm
Update the CMT driver to mark "renesas,cmt-48" as deprecated.
Instead of documenting a theoretical hardware device based on current software
support level, define DT bindings top-down based on available data sheet
information and make use of part numbers in the
(r8a77995).
- Update the R-Car Gen3 DT documentation to reflect current usage.
- Introduce SoC-specific matching in the driver for CMT1 on sh73a0 and sh73a0.
- Document old "cmt-48" binding as deprecated in the driver.
Please see each individual patch for more detailed information.
Signed
From: Magnus Damm
This patch adds DT binding documentation for the CMT devices on
the R-Car Gen2 V2H (r8a7792) SoC.
Signed-off-by: Magnus Damm
Reviewed-by: Geert Uytterhoeven
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/timer/renesas,cmt.txt |2 ++
1 file changed, 2
From: Magnus Damm
Document the on-chip CMT devices included in r8a7740 and sh73a0.
Included in this patch is DT binding documentation for 32-bit CMTs
CMT0, CMT2, CMT3 and CMT4. They all contain a single channel and are
quite similar however some minor differences still exist:
- "Counter
From: Magnus Damm
This patch reworks the DT binding documentation for the 6-channel
48-bit CMTs known as CMT1 on r8a7740 and sh73a0.
After the update the same style of DT binding as the rest of the upstream
SoCs will now also be used by r8a7740 and sh73a0. The DT binding "cmt-48"
From: Magnus Damm
This patch adds DT binding documentation for the CMT devices on
the R-Car Gen3 D3 (r8a77995) SoC.
Signed-off-by: Magnus Damm
Reviewed-by: Geert Uytterhoeven
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/timer/renesas,cmt.txt |2 ++
1 file changed, 2
From: Magnus Damm
The R-Car Gen3 SoCs so far come with a total for 4 on-chip CMT devices:
- CMT0
- CMT1
- CMT2
- CMT3
CMT0 includes two rather basic 32-bit timer channels. The rest of the on-chip
CMT devices support 48-bit counters and have 8 channels each.
Based on the data sheet
From: Magnus Damm
Add SoC-specific matching for CMT1 on r8a7740 and sh73a0.
This allows us to move away from the old DT bindings such as
- "renesas,cmt-48-sh73a0"
- "renesas,cmt-48-r8a7740"
- "renesas,cmt-48"
in favour for the now commonly used format "ren
From: Magnus Damm
Update the CMT driver to mark "renesas,cmt-48" as deprecated.
Instead of documenting a theoretical hardware device based on current software
support level, define DT bindings top-down based on available data sheet
information and make use of part numbers in the
From: Magnus Damm
Update the IPMMU DT binding documentation to include the r8a7796 compat
string for R-Car M3-W.
Signed-off-by: Magnus Damm
Acked-by: Laurent Pinchart
Acked-by: Rob Herring
Acked-by: Simon Horman
---
This particular patch seems ready to merge IMO. How to proceed?
Changes
Hi Joerg,
On Fri, Jan 27, 2017 at 8:47 PM, Joerg Roedel wrote:
> On Mon, Jan 23, 2017 at 08:40:29PM +0900, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Bump up the maximum numbers of micro-TLBS to 48.
>>
>> Each IPMMU device instance get micro-TLB assignment v
Hi Geert,
On Sat, Jan 28, 2017 at 1:03 AM, Geert Uytterhoeven
wrote:
> Some IOMMUs (e.g. Renesas IPMMU/VMSA) support only page sizes of 4 KiB,
> 2 MiB, and 1 GiB.
>
> With the default setting of CONFIG_CMA_ALIGNMENT = 8, allocations larger
> than 1 MiB are aligned to a 1 MiB boundary only. Hence
Hi Geert,
On Thu, Jan 26, 2017 at 6:53 PM, Geert Uytterhoeven
wrote:
> Currently, the IPMMU/VMSA driver supports 32-bit I/O Virtual Addresses
> only, and thus sets io_pgtable_cfg.ias = 32. However, it doesn't force
> a 32-bit IOVA space through the IOMMU Domain Geometry.
>
> Hence if a device (e
I would like to fast-track merge of patch #1 to fix DT interface.
Signed-off-by: Magnus Damm
---
Developed on top of renesas-drivers-2017-01-10-v4.10-rc3 with locally reverted
"[PATCH 0/3] iommu/ipmmu-vmsa: Initial r8a7796 support"
More detailed patch stack dependency is v4.10-r
From: Magnus Damm
Support the r8a7796 IPMMU by sharing feature flags between
r8a7795 and r8a7796. Also update IOMMU_OF_DECLARE to hook
up the updated compat string.
Signed-off-by: Magnus Damm
---
Changes since V1:
- None
drivers/iommu/ipmmu-vmsa.c |9 +++--
1 file changed, 7
From: Magnus Damm
Bump up the maximum numbers of micro-TLBS to 48.
Each IPMMU device instance get micro-TLB assignment via
the "iommus" property in DT. Older SoCs tend to use a
maximum number of 32 micro-TLBs per IPMMU instance however
newer SoCs such as r8a7796 make use of up to 48
From: Magnus Damm
Update the IPMMU DT binding documentation to include the r8a7796 compat
string for R-Car M3-W.
Signed-off-by: Magnus Damm
Acked-by: Laurent Pinchart
Acked-by: Rob Herring
Acked-by: Simon Horman
Acked-by: Geert Uytterhoeven
---
Previously posted separately as
[PATCH v3
From: Magnus Damm
Break out the utlb parsing code and dev_data allocation into a
separate function. This is preparation for future code sharing.
Signed-off-by: Magnus Damm
---
Changes since V2:
- Included this new patch from the following series:
[PATCH 00/04] iommu/ipmmu-vmsa: IPMMU
From: Magnus Damm
Introduce an alternative set of iommu_ops suitable for 64-bit ARM
as well as 32-bit ARM when CONFIG_IOMMU_DMA=y.
Signed-off-by: Magnus Damm
---
Changes since V2:
- Included this new patch from the following series:
[PATCH 00/04] iommu/ipmmu-vmsa: IPMMU CONFIG_IOMMU_DMA
From: Magnus Damm
The IPMMU driver is using DT these days, and platform data is no longer
used by the driver. Remove unused code.
Signed-off-by: Magnus Damm
Reviewed-by: Laurent Pinchart
---
Changes since V2:
- None
Changes since V1:
- Added Reviewed-by from Laurent
drivers/iommu
From: Magnus Damm
Introduce a bitmap for context handing and convert the
interrupt routine to handle all registered contexts.
At this point the number of contexts are still limited.
Also remove the use of the ARM specific mapping variable
from ipmmu_irq() to allow compile on ARM64.
Signed-off
the Kconfig bits to apply on top of ARCH_RENESAS
Signed-off-by: Magnus Damm
---
Built on top of next-20160602
drivers/iommu/Kconfig |1
drivers/iommu/ipmmu-vmsa.c | 263
2 files changed, 216 insertions(+), 48 deletions(-)
From: Magnus Damm
Neither the ARM page table code enabled by IOMMU_IO_PGTABLE_LPAE
nor the IPMMU_VMSA driver actually depends on ARM_LPAE, so get
rid of the dependency.
Tested with ipmmu-vmsa on r8a7794 ALT and a kernel config using:
# CONFIG_ARM_LPAE is not set
Signed-off-by: Magnus Damm
From: Magnus Damm
Break out the domain allocation code into a separate function.
This is preparation for future code sharing.
Signed-off-by: Magnus Damm
---
Changes since V2:
- Included this new patch as-is from the following series:
[PATCH 00/04] iommu/ipmmu-vmsa: IPMMU CONFIG_IOMMU_DMA
Hi Simon,
On Thu, Oct 27, 2016 at 4:15 PM, Simon Horman wrote:
> On Thu, Oct 27, 2016 at 09:08:01AM +0200, Simon Horman wrote:
>> On Wed, Oct 26, 2016 at 02:24:22PM +0900, Magnus Damm wrote:
>> > From: Magnus Damm
>> >
>> > Extend the ARM64 defconfig t
From: Magnus Damm
Update the IPMMU DT binding documentation to include the r8a7796 compat
string for R-Car M3-W.
Signed-off-by: Magnus Damm
Acked-by: Laurent Pinchart
---
Changes since V1:
- Added Acked-by from Laurent - thanks!
Now broken out, however earlier V1 posted as part of
From: Magnus Damm
For the DU to operate on R-Car Gen3 hardware a combination of DU
and VSP devices are required. Since the DU driver also supports
earlier generations hardware the VSP portion is enabled via Kconfig.
The arm64 defconfig is as of v4.9-rc1 having the DU driver enabled
as a module
From: Magnus Damm
Extend the ARM64 defconfig to enable the DU DRM device as module
together with required dependencies of V4L2 FCP and VSP modules.
This enables VGA output on the r8a7795 Salvator-X board.
Signed-off-by: Magnus Damm
---
Written against next-20161026
arch/arm64/configs
Hi Geert,
On Wed, Oct 26, 2016 at 4:31 PM, Geert Uytterhoeven
wrote:
> On Wed, Oct 26, 2016 at 5:31 AM, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> For the DU to operate on R-Car Gen3 hardware a combination of DU
>> and VSP devices are required. Since the DU driv
multi-arch update V7
Changes since V2:
- Patch 2/9 has been updated with a bug fix and to supply __ipmmu_find_root()
- Patch 4/9 now makes use of iommu_device_* functions
- Patch 5/9 sets the mask to 40 bits instead of 64 bits
- Patch 9/9 implements white list handling via ->xlate() and fixes
From: Magnus Damm
Introduce struct ipmmu_features to track various hardware
and software implementation changes inside the driver for
different kinds of IPMMU hardware. Add use_ns_alias_offset
as a first example of a feature to control if the secure
register bank offset should be used or not
From: Magnus Damm
Add root device handling to the IPMMU driver by allowing certain
DT compat strings to enable has_cache_leaf_nodes that in turn will
support both root devices with interrupts and leaf devices that
face the actual IPMMU consumer devices.
Signed-off-by: Magnus Damm
---
Changes
From: Magnus Damm
Tie in r8a7795 features and update the IOMMU_OF_DECLARE
compat string to include the updated compat string.
TODO:
- Consider making use of iommu_fwspec_add_ids() for uTLB handling
Needed to coexist with non-OF R-Car Gen2 somehow...
- Break out stuff useful for R-Car
From: Magnus Damm
Introduce a feature to allow opt-out of setting up
IMBUSCR. The default case is unchanged.
Signed-off-by: Magnus Damm
---
Changes since V2:
- None
Changes since V1:
- Updated the commit message
- Reworked patch to coexist with the multi context feature
drivers/iommu
From: Magnus Damm
Add support for up to 8 contexts. Each context is mapped to one
domain. One domain is assigned one or more slave devices. Contexts
are allocated dynamically and slave devices are grouped together
based on which IPMMU device they are connected to. This makes slave
devices tied
From: Magnus Damm
Introduce support for two bit SL0 bitfield in IMTTBCR
by using a separate feature flag.
Signed-off-by: Magnus Damm
---
Changes since V2:
- None
Changes since V1:
- None
drivers/iommu/ipmmu-vmsa.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion
From: Magnus Damm
Write IMCTR both in the root device and the leaf node.
Signed-off-by: Magnus Damm
---
Changes since V2:
- None
Changes since V1:
- None
drivers/iommu/ipmmu-vmsa.c | 17 ++---
1 file changed, 14 insertions(+), 3 deletions(-)
--- 0018/drivers/iommu/ipmmu
From: Magnus Damm
Hook up IOMMU_OF_DECLARE() support in case CONFIG_IOMMU_DMA
is enabled. The only current supported case for 32-bit ARM
is disabled, however for 64-bit ARM usage of OF is required.
Signed-off-by: Magnus Damm
---
Changes since V2:
- Reworked registration code to make use of
From: Magnus Damm
The r8a7795 IPMMU supports 40-bit bus mastering. Both
the coherent DMA mask and the streaming DMA mask are
set to unlock the 40-bit address space for coherent
allocations and streaming operations.
Signed-off-by: Magnus Damm
---
Changes since V2:
- Updated the code and
Hi Robin,
On Wed, Mar 8, 2017 at 9:48 PM, Robin Murphy wrote:
> On 07/03/17 03:17, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Not all architectures have an iommu member in their archdata, so
>> use #ifdefs support build with COMPILE_TEST on any architecture.
>
Hi Geert,
On Wed, Mar 8, 2017 at 10:52 PM, Geert Uytterhoeven
wrote:
> Hi Magnus,
>
> On Wed, Mar 8, 2017 at 12:02 PM, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Hook up IOMMU_OF_DECLARE() support in case CONFIG_IOMMU_DMA
>> is enabled. The only current su
Hi Robin,
On Wed, Mar 8, 2017 at 9:34 PM, Robin Murphy wrote:
> On 08/03/17 11:02, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Write IMCTR both in the root device and the leaf node.
>>
>> Signed-off-by: Magnus Damm
>> ---
>>
>> C
Hi Robin,
Thanks for your feedback!
On Wed, Mar 8, 2017 at 9:21 PM, Robin Murphy wrote:
> On 08/03/17 11:01, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Add support for up to 8 contexts. Each context is mapped to one
>> domain. One domain is assigned one or m
Hi Geert,
On Wed, Mar 8, 2017 at 10:58 PM, Geert Uytterhoeven
wrote:
> Hi Magnus,
>
> On Wed, Mar 8, 2017 at 12:02 PM, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Tie in r8a7795 features and update the IOMMU_OF_DECLARE
>> compat string to include the
Hi Robin,
On Wed, Mar 8, 2017 at 8:53 PM, Robin Murphy wrote:
> Hi Magnus,
>
> On 08/03/17 11:01, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Introduce struct ipmmu_features to track various hardware
>> and software implementation changes inside the drive
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