Hi Laurent,
On Thu, Mar 14, 2013 at 10:13 PM, Laurent Pinchart
wrote:
> Hi Magnus,
>
> On Thursday 14 March 2013 13:23:46 Magnus Damm wrote:
>> On Wed, Mar 13, 2013 at 9:58 PM, Laurent Pinchart wrote:
>> > On Wednesday 13 March 2013 20:32:03 Magnus Damm wrote:
>&g
se changes as incremental ones instead
of redoing a single "v2" patch for the driver. The reason
behind this is that there are on-going back porting efforts
that are better dealt with using incremental patches.
Signed-off-by: Magnus Damm
---
Depends on:
[PATCH] irqchip: Renesas I
From: Magnus Damm
Remove whitespace damage and add newline
between variables and code.
Signed-off-by: Magnus Damm
---
Thanks to Simon Horman and Thomas Gleixner for feedback.
drivers/irqchip/irq-renesas-intc-irqpin.c |8 +---
1 file changed, 5 insertions(+), 3 deletions
From: Magnus Damm
Cache IRQ in domain_irq variable instead of
making use of irq_find_mapping(). While at it
rename the irq variable to requested_irq.
Signed-off-by: Magnus Damm
---
Thanks to Thomas Gleixner for this suggestion.
drivers/irqchip/irq-renesas-intc-irqpin.c | 30
From: Magnus Damm
Add comments to describe the special case for
"force" versions of enable and disable functions.
Signed-off-by: Magnus Damm
---
Thanks to Thomas Gleixner for this suggestion.
drivers/irqchip/irq-renesas-intc-irqpin.c |9 +
1 file changed, 9
From: Magnus Damm
Use devm_kzalloc(), devm_ioremap_nocache()
and devm_request_irq() to simplify error
handling.
Signed-off-by: Magnus Damm
---
Thanks to Kuninori Morimoto for this suggestion.
drivers/irqchip/irq-renesas-intc-irqpin.c | 41 +
1 file changed, 13
From: Magnus Damm
Add GPL header to platform data include file.
Signed-off-by: Magnus Damm
---
Thanks to Kuninori Morimoto for this suggestion.
include/linux/platform_data/irq-renesas-intc-irqpin.h | 19 +
1 file changed, 19 insertions(+)
--- 0002/include/linux
From: Magnus Damm
Update the Emma Mobile GPIO driver to add DT support.
The patch simply adds a two-cell xlate function and
updates the probe code to allow configuration via DT
using the "ngpios" property plus OF id in the same
style as gpio-mvebu.c. The code is also adjus
From: Magnus Damm
This patch adds a driver for external IRQ pins connected
to the IRQC hardware block on recent SoCs from Renesas.
The IRQC hardware block is used together with more
recent ARM based SoCs using the GIC. As usual the GIC
requires external IRQ trigger setup somewhere else
which in
On Wed, Feb 27, 2013 at 5:23 PM, Paul Mundt wrote:
> On Mon, Feb 18, 2013 at 11:28:34PM +0900, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> This patch adds a driver for external IRQ pins connected
>> to the INTC block on recent SoCs from Renesas.
>>
> So how
On Wed, Feb 27, 2013 at 5:52 PM, Paul Mundt wrote:
> On Wed, Feb 27, 2013 at 05:35:51PM +0900, Magnus Damm wrote:
>> On Wed, Feb 27, 2013 at 5:23 PM, Paul Mundt wrote:
>> > So how exactly does this interact with the existing sh_intc code? Or is
>> > there some reason w
Hi Dmitry,
Thanks for your feedback!
On Wed, Feb 27, 2013 at 7:41 AM, Dmitry Torokhov
wrote:
> Hi Magnus,
>
> On Tue, Feb 26, 2013 at 10:26:23PM +0900, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Update the Emma Mobile GPIO driver to add DT support.
>>
On Tue, Feb 19, 2013 at 10:03 AM, Simon Horman wrote:
> On Mon, Feb 18, 2013 at 11:28:34PM +0900, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> This patch adds a driver for external IRQ pins connected
>> to the INTC block on recent SoCs from Renesas.
>>
&
Hi Morimoto-san,
On Tue, Feb 19, 2013 at 10:04 AM, Kuninori Morimoto
wrote:
>
> Hi Magnus
>
> Thank you for this patch.
> Small comment from me :)
Sure, thanks!
>> +struct intc_irqpin_priv {
>> + struct intc_irqpin_iomem iomem[INTC_IRQPIN_REG_NR];
>> + struct intc_irqpin_irq irq[INTC_IR
Hi Thomas,
Thanks for your help with the review!
On Tue, Feb 19, 2013 at 7:11 PM, Thomas Gleixner wrote:
> Magnus,
>
> On Mon, 18 Feb 2013, Magnus Damm wrote:
>
>> +static inline unsigned long intc_irqpin_read(struct intc_irqpin_priv *p,
>> +
From: Magnus Damm
Update the Emma Mobile GPIO driver to make use of devm
functions. This simplifies the error handling and makes
the code more compact.
Signed-off-by: Magnus Damm
---
Written on top of:
[PATCH] gpio: em: Add Device Tree support
drivers/gpio/gpio-em.c | 53
.
Signed-off-by: Magnus Damm
---
drivers/gpio/Kconfig|6
drivers/gpio/Makefile |1
drivers/gpio/gpio-rcar.c| 417 +--
include/linux/platform_data/gpio-rcar.h | 25 +
4 files changed, 427 insertions(+), 22
From: Magnus Damm
This patch is V2 of a GPIO driver for the R-Car series of
SoCs from Renesas. This driver is designed to be reusable
between multiple SoCs that share the same basic building block,
but so far it has only been used on R-Car H1 (r8a7779).
Each driver instance handles 32 GPIOs
From: Magnus Damm
Set the flag IRQCHIP_SET_TYPE_MASKED in gpio-rcar.c to
force mask of the interrupt while configuring trigger
settings.
Signed-off-by: Magnus Damm
---
drivers/gpio/gpio-rcar.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- 0004/drivers/gpio/gpio-rcar.c
From: Magnus Damm
Update the gpio-rcar.c driver to make use of devm
functions. This simplifies the error handling and
makes the code more compact.
Signed-off-by: Magnus Damm
---
drivers/gpio/gpio-rcar.c | 32 +++-
1 file changed, 11 insertions(+), 21 deletions
Hi Linus,
On Thu, Mar 14, 2013 at 2:20 AM, Linus Walleij wrote:
> On Tue, Mar 5, 2013 at 1:32 AM, Magnus Damm wrote:
>
>> +static int gpio_rcar_irq_set_type(struct irq_data *d, unsigned int type)
>> +{
>> + struct gpio_rcar_priv *p = irq_data_get_irq_chip_data(d);
On Wed, Mar 13, 2013 at 10:14 PM, Laurent Pinchart
wrote:
> Hi Magnus,
>
> Thanks for the patch.
>
> I've reviewed the result of squashing the 3 patches together, I just have one
> comment.
>
> On Wednesday 13 March 2013 20:32:13 Magnus Damm wrote:
>> From: Mag
Hi Laurent, Simon,
On Wed, Mar 13, 2013 at 9:58 PM, Laurent Pinchart
wrote:
> Hi Magnus,
>
> Thanks for the patches.
Thanks for your review!
> On Wednesday 13 March 2013 20:32:03 Magnus Damm wrote:
>> gpio: Renesas R-Car GPIO driver update
>>
>> [PATCH 01/03] gpio
never disagree with bug fixes =)
Acked-by: Magnus Damm
Thanks a lot to both Axel and you!
/ magnus
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Hi Viresh,
On Fri, Aug 30, 2013 at 4:33 PM, Viresh Kumar wrote:
> On 30 August 2013 12:18, Magnus Damm wrote:
>> Hi Viresh,
>>
>> On Thu, Aug 29, 2013 at 7:15 PM, Viresh Kumar
>> wrote:
>>> Hi,
>>>
>>> I have been doing some CPUFreq clea
9d_add_standard_devices(void)
> {
> - if (!IS_ENABLED(CONFIG_COMMON_CLK))
> - emev2_clock_init();
> -
> + of_clk_init(NULL);
Hi Yoshii-san,
Thanks, this looks very good. It is the correct way now when
renesas-devel-20131008 includes the following series:
[PATCH 00/05] ARM: shmobile: KZM9
t/dts/emev2.dtsi | 84
>
> 1 file changed, 84 insertions(+)
Looking good, thanks Yoshii-san!
Acked-by: Magnus Damm
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ssible for us to use CCF and multiplatform as expected on the
EMEV2 SoC.
Acked-by: Magnus Damm
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Please read the FAQ at http://www.tux.org/lkml/
Hi Simon,
On Wed, Oct 9, 2013 at 12:40 PM, Simon Horman wrote:
> On Tue, Oct 08, 2013 at 02:34:03PM +0900, takas...@ops.dti.ne.jp wrote:
>> Use common clock framework version of clock
>> drivers/clk/shmobile/clk-emev2.c
>> instead of sh-clkfwk version
>> arch/arm/mach-shmobile/clock-emev2.c
>>
Hi Simon,
On Wed, Oct 9, 2013 at 3:54 PM, Simon Horman wrote:
> On Wed, Oct 09, 2013 at 01:59:46PM +0900, Magnus Damm wrote:
>> Hi Simon,
>>
>> On Wed, Oct 9, 2013 at 12:40 PM, Simon Horman wrote:
>> > On Tue, Oct 08, 2013 at 02:34:03PM +0900, takas...@ops.dti
Hi Viresh,
On Thu, Aug 29, 2013 at 7:15 PM, Viresh Kumar wrote:
> Hi,
>
> I have been doing some CPUFreq cleanup work and
> wanted to know if the below mentioned machines have separate
> clock domains for their CPUs or all share the same domain?
>
> So, that we can use some generic routines for t
From: Magnus Damm
Based on request from Olof Johansson, move ARM mach-shmobile
clocksource entries to drivers/clocksource/Kconfig, and at
the same time make the SH architecture use these entries.
Kconfig entries for CMT, MTU2, TMU and STI are with this patch
now kept in one place. The SH
Hi Guennadi,
On Thu, Sep 26, 2013 at 7:10 AM, Guennadi Liakhovetski
wrote:
> Hi Laurent
>
> On Wed, 25 Sep 2013, Laurent Pinchart wrote:
>
>> Hi Guennadi,
>>
>> Thank you for the patch.
>>
>> On Monday 09 September 2013 18:03:54 Guennadi Liakhovetski wrote:
>> > This patch adds clocks and clock l
Hi Guennadi,
On Thu, Sep 26, 2013 at 12:07 AM, Guennadi Liakhovetski
wrote:
> Hi Magnus
>
> On Thu, 26 Sep 2013, Magnus Damm wrote:
>
>> Hi Guennadi,
>>
>> On Thu, Sep 26, 2013 at 7:10 AM, Guennadi Liakhovetski
>> wrote:
>> > Hi Laurent
>>
+--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Looking good, thanks!
Acked-by: Magnus Damm
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icts]
> Signed-off-by: Takashi Yoshii
> ---
> drivers/tty/serial/8250/8250_em.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
This looks fine to me, thanks!
Acked-by: Magnus Damm
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On Tue, Sep 24, 2013 at 1:15 PM, wrote:
> Common clock framework version of emev2 clock support.
> smu_clkdiv and smu_gclk are handled.
> So far, reparent is not implemented, and is fixed to index #0.
> SMU and small numbers of clocks are described in emev2.dtsi.
>
> That function and numbers of
On Tue, Sep 24, 2013 at 1:17 PM, wrote:
> Use common clock framework version of clock
> drivers/clk/shmobile/clk-emev2.c
> instead of sh-clkfwk version
> arch/arm/mach-shmobile/clock-emev2.c
>
> kzm9d(without -reference) still uses sh-clkfwk version.
>
> Because two of that framework can not li
On Tue, Sep 24, 2013 at 1:12 PM, wrote:
> Make sh clock framework core depend on HAVE_MACH_CLKDEV, and
> set it
> - y on sh for backward compatibility
> - !CONFIG_COMMON_CLK on sh-mobile
> This is a preparation for migration to common clock framework
> from sh clock framework on sh-mobile.
>
> Si
From: Magnus Damm
Modify the ARM architected timer driver to not set C3STOP
in case CPU_IDLE is disabled. This is a short term fix that
allows use of high resolution timers even though no additional
clock event is registered.
Not-really-Signed-off-by: Magnus Damm
---
If someone cares about
Hi Simon,
On Mon, Jun 17, 2013 at 11:13 AM, Simon Horman wrote:
> On Mon, Jun 17, 2013 at 09:20:56AM +0900, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Modify the ARM architected timer driver to not set C3STOP
>> in case CPU_IDLE is disabled. This is a short ter
From: Magnus Damm
Add support for CMT hardware with 32-bit control and counter
registers, as found on r8a73a4 and r8a7790. To use the CMT
with 32-bit hardware a second I/O memory resource needs to
point out the CMSTR register and it needs to be 32 bit wide.
Signed-off-by: Magnus Damm
Hi Laurent,
On Tue, Jun 18, 2013 at 3:37 AM, Laurent Pinchart
wrote:
> Hi Magnus,
>
> Thanks for the patch.
>
> On Monday 17 June 2013 15:40:52 Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Add support for CMT hardware with 32-bit control and counter
>
From: Magnus Damm
Introduce the function tick_device_may_c3stop() that
ignores the C3STOP flag in case CPUIdle is disabled.
The C3STOP flag tells the system that a clock event
device may be stopped during deep sleep, but if this
will happen or not depends on things like if CPUIdle
is enabled
Hi Mark,
On Mon, Jun 17, 2013 at 11:53 PM, Mark Rutland wrote:
> On Mon, Jun 17, 2013 at 01:20:56AM +0100, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Modify the ARM architected timer driver to not set C3STOP
>> in case CPU_IDLE is disabled. This is a short term fix
On Tue, Jun 18, 2013 at 4:32 PM, Daniel Lezcano
wrote:
> On 06/18/2013 09:17 AM, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Introduce the function tick_device_may_c3stop() that
>> ignores the C3STOP flag in case CPUIdle is disabled.
>>
>> The C3STOP f
Hi Daniel,
On Tue, Jun 18, 2013 at 5:24 PM, Daniel Lezcano
wrote:
> On 06/18/2013 09:39 AM, Magnus Damm wrote:
>> On Tue, Jun 18, 2013 at 4:32 PM, Daniel Lezcano
>> wrote:
>>> On 06/18/2013 09:17 AM, Magnus Damm wrote:
>>>> From: Magnus Da
Hi Daniel,
On Tue, Jun 18, 2013 at 5:30 PM, Daniel Lezcano
wrote:
> On 06/18/2013 09:17 AM, Magnus Damm wrote:
>> From: Magnus Damm
>>
>> Introduce the function tick_device_may_c3stop() that
>> ignores the C3STOP flag in case CPUIdle is disabled.
>>
>>
Hi Laurent,
On Tue, Jun 18, 2013 at 7:35 PM, Laurent Pinchart
wrote:
> Hi Magnus,
>
> On Tuesday 18 June 2013 14:39:38 Magnus Damm wrote:
>> On Tue, Jun 18, 2013 at 3:37 AM, Laurent Pinchart wrote:
>> > On Monday 17 June 2013 15:40:52 Magnus Damm wrote:
>> >>
Hi Laurent,
On Tue, Jun 18, 2013 at 9:30 PM, Laurent Pinchart
wrote:
> Hi Magnus,
>
> On Tuesday 18 June 2013 20:54:47 Magnus Damm wrote:
>> On Tue, Jun 18, 2013 at 7:35 PM, Laurent Pinchart wrote:
>> > On Tuesday 18 June 2013 14:39:38 Magnus Damm wrote:
>> >
On Tue, Jun 18, 2013 at 9:36 PM, Laurent Pinchart
wrote:
> This simplifies the main error path by getting rid of it.
>
> Signed-off-by: Laurent Pinchart
Looking good, thanks!
Acked-by: Magnus Damm
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Hello Stepan,
On Fri, May 31, 2013 at 6:45 AM, Stepan Moskovchenko
wrote:
> Some LPAE-capable systems may use a Device Tree containing
> memory nodes that describe memory extending beyond the 4GB
> physical address boundary. Ignore or truncate these memory
> nodes on kernels that have not been bu
Hi Laurent,
[Added Simon to CC]
Thanks for your work on converting the TPU driver. I found one issue, see below:
On Tue, Jun 11, 2013 at 10:45 PM, Laurent Pinchart
wrote:
> Instead of using the LED-specific TPU PWM driver, switch to the generic
> TPU PWM driver with leds-pwm.
>
> Signed-off-by:
From: Magnus Damm
Register the GPIO pin range, and request and free GPIO pins using the
pinctrl API. The pctl_name platform data member should be used by
platform devices to point out which pinctrl device to use.
Follows same style as "dc3465a gpio-rcar: Add pinctrl support",
From: Magnus Damm
This patch is V3 of a GPIO driver for the R-Car series of
SoCs from Renesas. This driver is designed to be reusable
between multiple SoCs that share the same basic building block,
but so far it has only been used on R-Car H1 (r8a7779).
Each driver instance handles 32 GPIOs
Hi Laurent,
On Tue, Mar 26, 2013 at 10:03 PM, Laurent Pinchart
wrote:
> Hi Magnus,
>
> Thanks for the patch.
>
> On Tuesday 26 March 2013 09:23:01 Magnus Damm wrote:
>> From: Magnus Damm
>>
>> This patch is V3 of a GPIO driver for the R-Car series of
>
Hi Simon,
On Wed, Jul 31, 2013 at 4:05 PM, Simon Horman wrote:
> On Wed, Jul 31, 2013 at 03:39:04PM +0900, Simon Horman wrote:
>> On Wed, Jul 24, 2013 at 12:42:40PM +0900, Magnus Damm wrote:
>> > From: Magnus Damm
>> >
>> > Add PMU information to emev2.dt
Hi Guennadi,
Thanks for your efforts on this.
On Tue, Jul 23, 2013 at 7:49 PM, Guennadi Liakhovetski
wrote:
> This configuration data will be re-used, when DMAC DT support is added to
> r8a7740, DMAC platform data in setup-r8a7740.c will be removed.
>
> Signed-off-by: Guennadi Liakhovetski
> --
From: Magnus Damm
Add PMU information to emev2.dtsi. With this
included KZM9D DT reference may use the PMU.
Signed-off-by: Magnus Damm
---
arch/arm/boot/dts/emev2.dtsi |6 ++
1 file changed, 6 insertions(+)
--- 0009/arch/arm/boot/dts/emev2.dtsi
+++ work/arch/arm/boot/dts/emev2.dtsi
From: Magnus Damm
Add PMU information to sh73a0.dtsi. With this
included KZM9G DT reference may use the PMU.
Signed-off-by: Magnus Damm
---
arch/arm/boot/dts/sh73a0.dtsi |6 ++
1 file changed, 6 insertions(+)
--- 0001/arch/arm/boot/dts/sh73a0.dtsi
+++ work/arch/arm/boot/dts/sh73a0
From: Magnus Damm
No need to special case r8a73a4 ->init_machine(),
so get rid of undesired cpufreq platform device
from the generic long term r8a73a4 DT support code.
For short term support on APE6EVM the DT reference
implementation already adds a "cpufreq-cpu0" platform
device s
From: Magnus Damm
Add PMU information to r8a7740.dtsi. With this
included Armadillo800eva DT reference may use the PMU.
Signed-off-by: Magnus Damm
---
Dry coded based on data sheet, not runtime tested.
arch/arm/boot/dts/r8a7740.dtsi |5 +
1 file changed, 5 insertions(+)
--- 0001
Hi Guennadi,
On Wed, Jul 24, 2013 at 6:19 AM, Guennadi Liakhovetski
wrote:
> On Wed, 24 Jul 2013, Magnus Damm wrote:
>
>> Hi Guennadi,
>>
>> Thanks for your efforts on this.
>>
>> On Tue, Jul 23, 2013 at 7:49 PM, Guennadi Liakhovetski
>> wrote:
>>
Hi Guennadi,
On Wed, Jul 24, 2013 at 5:33 PM, Guennadi Liakhovetski
wrote:
> On Wed, 24 Jul 2013, Magnus Damm wrote:
>
>> Hi Guennadi,
>>
>> On Wed, Jul 24, 2013 at 6:19 AM, Guennadi Liakhovetski
>> wrote:
>> > On Wed, 24 Jul 2013, Magnus Damm wrote:
>
From: Magnus Damm
This patch implements a GPIO driver for the R-Car series
of SoCs from Renesas. This driver is designed to be reusable
between multiple SoCs that share the same basic building block,
but so far it has only been used on R-Car H1 (r8a7779).
Each driver instance handles 32 GPIOs
From: Magnus Damm
Add initial DT support to the INTC External IRQ Pin
driver. At this point only hardware with 4-bit wide
sense registers is supported via DT.
Signed-off-by: Magnus Damm
---
drivers/irqchip/irq-renesas-intc-irqpin.c |9 +
1 file changed, 9 insertions(+)
--- 0001
From: Magnus Damm
Add DT support to the IRQC External IRQ Pin driver.
Signed-off-by: Magnus Damm
---
drivers/irqchip/irq-renesas-irqc.c |9 +
1 file changed, 9 insertions(+)
--- 0001/drivers/irqchip/irq-renesas-irqc.c
+++ work/drivers/irqchip/irq-renesas-irqc.c 2013-03-06 15
On Wed, Feb 27, 2013 at 7:28 PM, Paul Mundt wrote:
> On Wed, Feb 27, 2013 at 06:52:51PM +0900, Magnus Damm wrote:
>> As you know, the INTC code that you are referring to is a full
>> interrupt controller designed to work directly with CPU cores like SH
>> and ARM. Newer ARM
eds-renesas-tpu driver by Magnus Damm
> and the TPU PWM driver shipped in the Armadillo EVA 800 kernel sources.
>
> Signed-off-by: Laurent Pinchart
> Tested-by: Simon Horman
> ---
> drivers/pwm/Kconfig| 7 +
> drivers/pwm/Makefile
From: Magnus Damm
Update the Emma Mobile GPIO driver to make use of devm
functions. This simplifies the error handling and makes
the code more compact.
Signed-off-by: Magnus Damm
---
Applies to linux-next tag next-20130327, written on top of:
[PATCH] gpio: em: Add Device Tree support
Hi Linus,
On Wed, Mar 27, 2013 at 5:28 PM, Linus Walleij wrote:
> On Wed, Mar 13, 2013 at 12:06 PM, Magnus Damm wrote:
>
>> From: Magnus Damm
>>
>> Update the Emma Mobile GPIO driver to make use of devm
>> functions. This simplifies the error handling and
On Wed, Mar 27, 2013 at 9:34 PM, Linus Walleij wrote:
> On Tue, Mar 19, 2013 at 4:36 AM, Magnus Damm wrote:
>> On Thu, Mar 14, 2013 at 10:13 PM, Laurent Pinchart
>> wrote:
>
>>> When submitting new drivers I usually try not to make the development
>>> histor
On Thu, Mar 28, 2013 at 12:01 AM, Linus Walleij
wrote:
> On Wed, Mar 27, 2013 at 7:11 AM, Magnus Damm wrote:
>
>> From: Magnus Damm
>>
>> Update the Emma Mobile GPIO driver to make use of devm
>> functions. This simplifies the error handling and makes
>> the
On Thu, Mar 28, 2013 at 12:16 AM, Linus Walleij
wrote:
> On Tue, Mar 26, 2013 at 1:23 AM, Magnus Damm wrote:
>
>> From: Magnus Damm
>>
>> This patch is V3 of a GPIO driver for the R-Car series of
>> SoCs from Renesas. This driver is designed to be reusable
>&
HI Laurent,
On Sun, Mar 10, 2013 at 3:16 AM, Laurent Pinchart
wrote:
> Hi Magnus,
>
> Thank you for the patch.
Thanks for your review!
> On Tuesday 05 March 2013 09:32:19 Magnus Damm wrote:
>> From: Magnus Damm
>>
>> This patch implements a GPIO driver for th
From: Magnus Damm
Fix "make distclean" to clean up generated dtc files.
Without this patch the following files are left around:
- dtc-lexer.lex.c
- dtc-parser.tab.c
- dtc-parser.tab.h
Signed-off-by: Magnus Damm
---
scripts/dtc/Makefile |2 ++
1 file changed, 2 insertions(+)
> > GMT 2008
> > [0.00] console [sercon0] enabled
> > [0.00] Booting machvec: Sega Dreamcast
>
>
> [EMAIL PROTECTED]:~/gdrom-dev$ git bisect good
> e036eaa681a17f71b64f6d9040fe60623919 is first bad commit
> commit e036eaa681a17f71b64f6d9040fe60555
This patch extends the sm501 mfd with 8250 uart support. We're currently
doing this in the board specific r2d-1 code already, but it would be nice to
do move things into the mfd since it's more chip specific than board specific.
Signed-off-by: Magnus Damm <[EMAIL PROTECTED]>
-
Hi Rafael,
Thanks for your patch. Please see below for my comment.
On Fri, Aug 17, 2012 at 5:10 AM, Rafael J. Wysocki wrote:
>
> Add a "C5" cpuidle state to the SH7372 SoC connected to the A4S power
> domain in such a way that A4S may be turned off by cpuidle if all
> I/O devices in that domain
Hi Guennadi,
[CC Paul]
On Thu, Jul 5, 2012 at 1:17 AM, Guennadi Liakhovetski
wrote:
> This patch extends the sh dmaengine driver to support the preferred channel
> selection and configuration method, instead of using the "private" field
> from struct dma_chan. We add a standard filter function t
From: Magnus Damm
This patch adds a driver for external IRQ pins connected
to the INTC block on recent SoCs from Renesas.
The INTC hardware block usually contains a rather wide
range of features ranging from external IRQ pin handling
to legacy interrupt controller support. On older SoCs
the
not yet included in this series due to lack of hardware.
Patches 1-3:
Signed-off-by: Shinya Kuribayashi
Signed-off-by: Magnus Damm
Patches 4-8:
Signed-off-by: Magnus Damm
---
drivers/clocksource/sh_cmt.c | 257 --
1 file changed, 152 insertions(+), 105
From: Magnus Damm
Make sure clk_put() is called in case of failure in sh_cmt_setup().
Signed-off-by: Shinya Kuribayashi
Signed-off-by: Magnus Damm
---
drivers/clocksource/sh_cmt.c |6 --
1 file changed, 4 insertions(+), 2 deletions(-)
--- 0001/drivers/clocksource/sh_cmt.c
+++ work
From: Magnus Damm
Move the setup of spinlock and max_match_value to sh_cmt_setup().
There's no need to defer those steps until sh_cmt_register().
Signed-off-by: Shinya Kuribayashi
Signed-off-by: Magnus Damm
---
drivers/clocksource/sh_cmt.c | 16
1 file chang
From: Magnus Damm
Cleanup the use of platform_set_drvdata() to reduce code size
Signed-off-by: Shinya Kuribayashi
Signed-off-by: Magnus Damm
---
drivers/clocksource/sh_cmt.c |5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
--- 0003/drivers/clocksource/sh_cmt.c
+++ work/drivers
From: Magnus Damm
Introduce sh_cmt_read_cmstr/cmcsr/cmcnt() and
sh_cmt_write_cmstr/cmcsr/cmcnt/cmcor() to in the
future allow us to split counter registers from
control registers and reduce code complexity by
removing sh_cmt_read() and sh_cmt_write().
Signed-off-by: Magnus Damm
---
drivers
From: Magnus Damm
Update hardware register access code for CMSTR and CMCSR
from using sh_cmt_read() and sh_cmt_write() to make use
of 16-bit register access functions such as sh_cmt_read16()
and sh_cmt_write16(). Also update sh_cmt_read() and
sh_cmt_write() now when the special cases are gone
From: Magnus Damm
Break out the CMCNT and CMCOR register access code
into separate 16-bit and 32-bit functions that are
hooked into callbacks at init time. This reduces
the amount of software calculations happening at
runtime.
Signed-off-by: Magnus Damm
---
drivers/clocksource/sh_cmt.c
From: Magnus Damm
This patch adds control register callbacks for the CMT
driver. At this point only 16-bit access is supported
but in the future this will be updated to allow 32-bit
access as well.
Signed-off-by: Magnus Damm
---
drivers/clocksource/sh_cmt.c | 16
1 file
From: Magnus Damm
Add a comment about different register layouts
supported by the CMT driver.
Signed-off-by: Magnus Damm
---
drivers/clocksource/sh_cmt.c | 15 +++
1 file changed, 15 insertions(+)
--- 0005/drivers/clocksource/sh_cmt.c
+++ work/drivers/clocksource/sh_cmt.c
Hi all,
I've experienced some disk corruption on my laptop.
Scenario:
I'm cross-compiling tons of sources and I felt the need
to insert a CompactFlash card (via PCMCIA) in my laptop.
So I did, no problem:
mounted, touched a file, umounted, cardctl-ejected.
Pretty soon my compilation stops:
bas
opl3sa2: Fix "irq"-parameter name typo for parameter description.
Signed-off-by: Magnus Damm <[EMAIL PROTECTED]>
--- linux-2.6.12-rc2/sound/oss/opl3sa2.c2005-04-05 16:57:30.0
+0200
+++ linux-2.6.12-rc2-autoparam/sound/oss/opl3sa2.c 2005-04-05
19:22:49
st release:
- Upgraded and tested with 2.6.12-rc2
- Added "force_"-prefix to cope with namespace pollution
Signed-off-by: Magnus Damm <[EMAIL PROTECTED]>
diff -urNp linux-2.6.12-rc2/include/linux/init.h
linux-2.6.12-rc2-disable_builtin/include/linux/init.h
--- linux-2.6.12-rc2/inclu
On Apr 6, 2005 12:32 PM, Malcolm Rowe <[EMAIL PROTECTED]> wrote:
> Magnus Damm writes:
> > Here comes version 2 of the disable built-in patch.
>
> > +void __init disable_initcall(void *fn)
> > +{
> > + initcall_t *call;
> > +
> > + for (call
On Apr 6, 2005 4:28 PM, Malcolm Rowe <[EMAIL PROTECTED]> wrote:
> Magnus Damm writes:
> > And I guess the idea of replacing the initcall pointer with NULL will
> > work both with and without function descriptors, right? So we should
> > be safe on IA64 and PPC64.
>
On Apr 7, 2005 4:32 AM, David Lang <[EMAIL PROTECTED]> wrote:
> On Thu, 7 Apr 2005, Martin Pool wrote:
>
> > I haven't tested importing all 60,000+ changesets of the current bk tree,
> > partly because I don't *have* all those changesets. (Larry said
> > previously that someone (not me) tried to
On Apr 7, 2005 4:23 AM, Roland Dreier <[EMAIL PROTECTED]> wrote:
> > > -#define module_init(x) __initcall(x);
> > > +#define module_init(x) __initcall(x); __module_init_disable(x);
> >
> > It would be better if there is brackets around them... like
> >
> > #define module_init(x) { __initcall(
On Apr 7, 2005 7:38 PM, Linus Torvalds <[EMAIL PROTECTED]> wrote:
> So my prefernce is _overwhelmingly_ for the format that Andrew uses (which
> is partly explained by the fact that I am used to it, but also by the fact
> that I've asked for Andrew to make trivial changes to match my usage).
>
> T
On Apr 7, 2005 7:29 PM, Randy.Dunlap <[EMAIL PROTECTED]> wrote:
> On Thu, 7 Apr 2005 13:22:57 -0400 (EDT) Richard B. Johnson wrote:
> | Can't you disable module-loading with a module? I think so.
> | You don't need to modify the kernel. Boot-scripts could
> | just load the "final" module and there
On Apr 7, 2005 4:38 AM, Horst von Brand <[EMAIL PROTECTED]> wrote:
> AsterixTheGaul <[EMAIL PROTECTED]> said:
> > > -#define module_init(x) __initcall(x);
> > > +#define module_init(x) __initcall(x); __module_init_disable(x);
> >
> > It would be better if there is brackets around them... like
> >
>
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