Adding Kevin in the CC list since he had some comments about the PM
runtime support for the SPI driver.
On Mon, Oct 20, 2014 at 02:42:42PM +0200, Ludovic Desroches wrote:
> On Mon, Oct 20, 2014 at 11:42:13AM +0800, Wenyou Yang wrote:
> > Signed-off-by: Wenyou Yang
>
> Ac
Adding Kevin in the CC list since he had some comments about the PM
runtime support for the SPI driver.
On Mon, Oct 20, 2014 at 02:39:14PM +0200, Ludovic Desroches wrote:
> Hi Wenyou,
>
> On Mon, Oct 20, 2014 at 11:42:12AM +0800, Wenyou Yang wrote:
> > Drivers should put the
clkdiv is declared as an u32 but it can be set to a negative value
causing a huge divisor value. Change its type to int to avoid this case.
Signed-off-by: Ludovic Desroches
Cc: # 3.4 and later
---
drivers/mmc/host/atmel-mci.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff
otype of a pin controller and device tree to show the
way I want to use these changes. I couldn't test it on boards using generic
pinconf so I am not sure that I don't break something...
Ludovic Desroches (4):
pinctrl: change function behavior for per pin muxing controllers
pin
me, a 32 bit value is used. The 16 least
significant bits are used for the pin number. Other 16 bits can be used to
store extra parameters.
Signed-off-by: Ludovic Desroches
---
drivers/pinctrl/pinconf-generic.c | 44 ++-
include/linux/pinctrl/pinctrl.h
gt;pins = devm_kzalloc(&pdev->dev, sizeof(*group->pins) *
group->npins, GFP_KERNEL);
+ //if (!group->pins) TODO
+ for (i = 0; i < group->npins; i++) {
+ ret = of_property_read_u32_index(group_np, "pins", i,
&
When having a controller which allows per pin muxing, declaring with
which groups a function can be used is a useless constraint since groups
are something virtual.
Signed-off-by: Ludovic Desroches
---
drivers/pinctrl/pinmux.c | 58 +++---
include/linux
Signed-off-by: Ludovic Desroches
Conflicts:
arch/arm/boot/dts/Makefile
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/at91-sama5d4ek_proto.dts | 243 ++
arch/arm/boot/dts/sama5d4_proto-pinfunc.h | 463 +++
arch/arm/boot/dts
Hi Wolfram,
On Sun, Mar 08, 2015 at 09:28:45AM +0100, Wolfram Sang wrote:
> On Wed, Feb 25, 2015 at 05:01:54PM +0100, Wolfram Sang wrote:
> > From: Wolfram Sang
> >
> > Signed-off-by: Wolfram Sang
>
> Hi Ludovic,
>
> if you have a few minutes, could you please test this series? I'd like to
>
Hi Wolfram,
You can add my
Acked-by and Tested-By: Ludovic Desroches
Tested on sama5d3, some problems with at24 eeprom on sama5d4 but it
doesn't come from the i2c quirks patch series.
Regards
Ludovic
On Sun, Mar 08, 2015 at 09:28:45AM +0100, Wolfram Sang wrote:
> On Wed, Feb 25, 20
On Sat, Mar 21, 2015 at 12:42:06PM -0700, Maxime Ripard wrote:
> This framework aims at easing the development of dmaengine drivers by
> providing
> generic implementations of the functions usually required by dmaengine, while
> abstracting away most of the logic required.
>
For sure it will eas
On Sun, Feb 08, 2015 at 11:12:07AM -0500, Nicholas Mc Guire wrote:
> Return type of wait_for_completion_timeout is unsigned long not int. This
> patch adds a timeout variable of appropriate type and fixes up the assignment.
>
> Signed-off-by: Nicholas Mc Guire
Acked-by: Ludov
On Thu, Feb 19, 2015 at 09:30:58AM -0800, Frank Rowand wrote:
> On 2/19/2015 9:00 AM, Pantelis Antoniou wrote:
> > Hi Frank,
> >
> >> On Feb 19, 2015, at 18:48 , Frank Rowand wrote:
> >>
> >> On 2/19/2015 6:29 AM, Pantelis Antoniou wrote:
> >>> Hi Mark,
> >>>
> On Feb 18, 2015, at 19:31 , Ma
On Thu, Feb 19, 2015 at 12:01:14PM -0600, Rob Herring wrote:
> On Wed, Feb 18, 2015 at 8:08 PM, Frank Rowand wrote:
> > On 2/18/2015 6:59 AM, Pantelis Antoniou wrote:
> >> Implement a method of applying DT quirks early in the boot sequence.
> >>
> >> A DT quirk is a subtree of the boot DT that can
On Fri, Feb 20, 2015 at 09:21:38AM -0500, Peter Hurley wrote:
> On 02/19/2015 12:38 PM, Pantelis Antoniou wrote:
> >
> >> On Feb 19, 2015, at 19:30 , Frank Rowand wrote:
> >>
> >> On 2/19/2015 9:00 AM, Pantelis Antoniou wrote:
> >>> Hi Frank,
> >>>
> On Feb 19, 2015, at 18:48 , Frank Rowand
Hi Rob,
On Fri, Feb 20, 2015 at 11:30:12AM -0600, Rob Herring wrote:
> On Fri, Feb 20, 2015 at 8:35 AM, Ludovic Desroches
> wrote:
> > On Fri, Feb 20, 2015 at 09:21:38AM -0500, Peter Hurley wrote:
> >> On 02/19/2015 12:38 PM, Pantelis Antoniou wrote:
> >> >
On Fri, Feb 20, 2015 at 10:48:18AM -0800, Guenter Roeck wrote:
> On Fri, Feb 20, 2015 at 01:09:58PM -0500, Peter Hurley wrote:
> > Hi Guenter,
> >
> > On 02/20/2015 11:47 AM, Guenter Roeck wrote:
> >
> > [...]
> >
> > > I am open to hearing your suggestions for our use case, where the CPU
> > >
tions have been created to address this
> problem.
>
> Move gpiochip_lock/unlock_as_irq calls into
> irq_request/release_resources functions to prevent using a gpio as an irq
> if the gpiochip_lock_as_irq call failed.
>
> Signed-off-by: Boris Brezillon
It sounds good for m
r 2: residue = 1048380
>
You're right about these points. Good job. I think it should be sent to
stable if it can be applied properly.
For multilines comments, please follow the coding rule
/*
* my
* comments
*/
> Signed-off-by: T
Hi,
Great something we are waiting for a long time!
On Wed, Feb 18, 2015 at 05:53:50PM +0200, Pantelis Antoniou wrote:
> Hi Mark,
>
> > On Feb 18, 2015, at 17:41 , Mark Rutland wrote:
> >
> > Hi Pantelis,
> >
> > On Wed, Feb 18, 2015 at 02:59:34PM +, Pantelis Antoniou wrote:
> >> Implemen
On Wed, Feb 18, 2015 at 06:39:01PM +0200, Pantelis Antoniou wrote:
> Hi Ludovic,
>
> > On Feb 18, 2015, at 18:32 , Ludovic Desroches
> > wrote:
> >
> > Hi,
> >
> > Great something we are waiting for a long time!
> >
> > On Wed, Feb
-by: Ludovic Desroches
---
drivers/mmc/host/sdhci-of-at91.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/mmc/host/sdhci-of-at91.c b/drivers/mmc/host/sdhci-of-at91.c
index c1923c0..76308b1 100644
--- a/drivers/mmc/host/sdhci-of-at91.c
+++ b/drivers/mmc/host
+ PM mailing list since the discussion is mixing PM and sdhci
On Tue, Mar 08, 2016 at 10:56:31PM +0100, Ulf Hansson wrote:
> +Ludovic
>
> On 8 March 2016 at 22:54, Ulf Hansson wrote:
> > On 4 March 2016 at 14:48, Ludovic Desroches
> > wrote:
[snip]
> >>
&
rrent descriptor has not changed.
Signed-off-by: Ludovic Desroches
Suggested-by: Cyrille Pitchen
Reported-by: David Engraf
Tested-by: David Engraf
Fixes: e1f7c9eee707 ("dmaengine: at_xdmac: creation of the atmel
eXtended DMA Controller driver")
Cc: sta...@vger.kernel.org #4.1 and lat
ff-by: Ludovic Desroches
---
Hi Ulf, Adrian,
Following the discussion, I need to fix my issue. I think we could both agree
on this patch that I see more as temporary workaround.
I will try to change the muxing of the card detect pio in order to no more
use the sdhci controller to manage it but a
On Wed, Mar 09, 2016 at 09:04:21PM +, Jonathan Cameron wrote:
> On 07/03/16 20:09, Lars-Peter Clausen wrote:
> > On 03/07/2016 03:29 PM, Ludovic Desroches wrote:
> >> The same channel can be used to perform a signed or an unsigned
> >> conversion. Add a new inf
So far, the CIDR and EXID registers were in the DBGU interface. This device
has disappeared with the SAMA5D2 family. These registers are exposed
through a new device called chipid.
Signed-off-by: Ludovic Desroches
[nicolas.fe...@atmel.com: remove useless warnings]
---
.../devicetree/bindings
tection is broken.
It is curently we only way to wake-up on card event if using runtime pm.
Signed-off-by: Ludovic Desroches
---
Changes:
- v2:
- remove SDHCI_QUIRK_BROKEN_CARD_DETECTION quirk if set by the broken-cd
property.
drivers/mmc/host/sdhci-of-at91.c | 20
1 fi
Add node for chipid device in order to have access to the CIDR and EXID
values.
Signed-off-by: Ludovic Desroches
---
arch/arm/boot/dts/sama5d2.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 78996bd..173e3d7
From: Cyrille Pitchen
This SFR node is looked up by the I2S controller driver to tune the
SFR_I2SCLKSEL register.
Signed-off-by: Cyrille Pitchen
Signed-off-by: Ludovic Desroches
---
Documentation/devicetree/bindings/arm/atmel-at91.txt | 2 +-
arch/arm/boot/dts/sama5d2.dtsi
Add EXID of all SoCs of the SAMA5D2 family.
Signed-off-by: Ludovic Desroches
---
arch/arm/mach-at91/sama5.c | 20 +++-
arch/arm/mach-at91/soc.h | 12 +++-
2 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-at91/sama5.c b/arch/arm/mach-at91
On Thu, Apr 07, 2016 at 11:11:08AM +0200, Ulf Hansson wrote:
> On 5 April 2016 at 14:40, Adrian Hunter wrote:
> > On 25/03/16 18:05, Ludovic Desroches wrote:
> >> Hi,
> >>
> >> When not using the SDHCI controller, it is logical to save power by
> >>
On Wed, Apr 06, 2016 at 03:37:28PM +0300, Adrian Hunter wrote:
> On 04/04/16 18:27, Ludovic Desroches wrote:
> > In order to remove the SDHCI_QUIRK2_NEED_DELAY_AFTER_INT_CLK_RST and to
> > reduce code duplication, put the code relative to the SD clock
> > configuration in a
On Wed, Apr 06, 2016 at 05:04:45PM +0200, Ludovic Desroches wrote:
> On Wed, Apr 06, 2016 at 03:37:28PM +0300, Adrian Hunter wrote:
> > On 04/04/16 18:27, Ludovic Desroches wrote:
> > > In order to remove the SDHCI_QUIRK2_NEED_DELAY_AFTER_INT_CLK_RST and to
> > > reduc
c_clk.
- don't update actual_clock in sdhci_calc_clk but return its value as an
output parameter.
- v2:
- sdhci_compute_clock_config uses a returned value instead of an
out-parameter to provide the clock configuration.
Ludovic Desroches (3):
mmc: sdhci: introduce sdhci_compute_clock_co
SDHCI_QUIRK2_NEED_DELAY_AFTER_INT_CLK_RST quirk is not used anymore so
remove it.
Signed-off-by: Ludovic Desroches
---
drivers/mmc/host/sdhci.c | 2 --
drivers/mmc/host/sdhci.h | 5 -
2 files changed, 7 deletions(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index
internal
re-synchronisation but it seems in some cases the delay (even if longer)
doesn't fix this bug. The safest workaround is to not disable/enable the
internal clock during the SD card clock configuration.
Signed-off-by: Ludovic Desroches
---
drivers/mmc/host/sdhci-of-at91.c
In order to remove the SDHCI_QUIRK2_NEED_DELAY_AFTER_INT_CLK_RST and to
reduce code duplication, put the code relative to the SD clock
configuration in a function which can be used by hosts for the
implementation of the set_clock() callback.
Signed-off-by: Ludovic Desroches
---
drivers/mmc/host
Hi Prabu,
On Tue, Apr 19, 2016 at 07:18:36AM +, Prabu Thangamuthu wrote:
> Synopsys DWC_MSHC is compliant with SD Host Specifications. This patch
> is to support DWC_MSHC controller on PCI interface.
>
> Signed-off-by: Prabu Thangamuthu
> ---
> Change log v2:
> -Removed Synopsys specif
.
This was leading to a pull-down condition not taken into account for
instance.
Signed-off-by: Ludovic Desroches
Fixes: 776180848b57 ("pinctrl: introduce driver for Atmel PIO4 controller")
Cc: sta...@vger.kernel.org #v4.4 and later
---
drivers/pinctrl/pinctrl-at91-pio4.c | 2 ++
1 file
Activating wakeup event is not enough to get a wakeup signal. The
corresponding events have to be enabled in the Interrupt Status Enable
Register too.
Signed-off-by: Ludovic Desroches
---
Hi,
I just updated sdhci_enable_irq_wakeups() not sdhci_disable_irq_wakeups()
because I don't think
On Wed, Apr 20, 2016 at 12:22:59PM +, Prabu Thangamuthu wrote:
> Patch for Standard SD Host Controller Interface compliant Synopsys
> sdhci-dwc controller driver. This code supports PCI based interface.
>
> Signed-off-by: Prabu Thangamuthu
> ---
> Change log v3:
> -Removed unused code.
On Tue, Apr 26, 2016 at 10:58:45AM +0200, Ludovic Desroches wrote:
> On Wed, Apr 20, 2016 at 12:22:59PM +, Prabu Thangamuthu wrote:
> > Patch for Standard SD Host Controller Interface compliant Synopsys
> > sdhci-dwc controller driver. This code supports PCI based interface.
On Tue, Apr 26, 2016 at 12:31:50PM +, Prabu Thangamuthu wrote:
> Hi Ludovic, Jaehoon Chung,
>
> Thank you for your review comments,
>
> On 04/26/2016 04:15 PM, Jaehoon Chung wrote:
> >
> > On 04/26/2016 05:58 PM, Ludovic Desroches wrote:
> > > On Wed, Apr
In order to remove the SDHCI_QUIRK2_NEED_DELAY_AFTER_INT_CLK_RST and to
reduce code duplication, put the code relative to the SD clock
configuration in a function which can be used by hosts for the
implementation of the set_clock() callback.
Signed-off-by: Ludovic Desroches
---
drivers/mmc/host
internal
re-synchronisation but it seems in some cases the delay (even if longer)
doesn't fix this bug. The safest workaround is to not disable/enable the
internal clock during the SD card clock configuration.
Signed-off-by: Ludovic Desroches
---
drivers/mmc/host/sdhci-of-at91.c
f new quirks, I have decided to
remove it and to implement my own set_clock() function. In ordrer to reduce
code duplication with the sdhci set_clock function, I moved some of the
code in a new sdhci_compute_clock_config() function.
Regards
Ludovic Desroches (3):
mmc: sdhci: intr
SDHCI_QUIRK2_NEED_DELAY_AFTER_INT_CLK_RST quirk is not used anymore so
remove it.
Signed-off-by: Ludovic Desroches
---
drivers/mmc/host/sdhci.c | 2 --
drivers/mmc/host/sdhci.h | 5 -
2 files changed, 7 deletions(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index
In order to remove the SDHCI_QUIRK2_NEED_DELAY_AFTER_INT_CLK_RST and to
reduce code duplication, put the code relative to the SD clock
configuration in a function which can be used by hosts for the
implementation of the set_clock() callback.
Signed-off-by: Ludovic Desroches
---
drivers/mmc/host
SDHCI_QUIRK2_NEED_DELAY_AFTER_INT_CLK_RST quirk is not used anymore so
remove it.
Signed-off-by: Ludovic Desroches
---
drivers/mmc/host/sdhci.c | 2 --
drivers/mmc/host/sdhci.h | 5 -
2 files changed, 7 deletions(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index
internal
re-synchronisation but it seems in some cases the delay (even if longer)
doesn't fix this bug. The safest workaround is to not disable/enable the
internal clock during the SD card clock configuration.
Signed-off-by: Ludovic Desroches
---
drivers/mmc/host/sdhci-of-at91.c
value instead of an
out-parameter to provide the clock configuration.
Ludovic Desroches (3):
mmc: sdhci: introduce sdhci_compute_clock_config
mmc: sdhci-of-at91: implement specific set_clock function
mmc: sdhci: removal of SDHCI_QUIRK2_NEED_DELAY_AFTER_INT_CLK_RST
drivers/mmc/host/sdh
On Tue, Apr 12, 2016 at 03:31:46PM +0300, Adrian Hunter wrote:
> On 07/04/16 12:13, Ludovic Desroches wrote:
> > In order to remove the SDHCI_QUIRK2_NEED_DELAY_AFTER_INT_CLK_RST and to
> > reduce code duplication, put the code relative to the SD clock
> > configuration in a
On Tue, Apr 12, 2016 at 02:59:15PM +0200, Ulf Hansson wrote:
> On 12 April 2016 at 14:53, Ludovic Desroches
> wrote:
> > On Tue, Apr 12, 2016 at 03:31:46PM +0300, Adrian Hunter wrote:
> >> On 07/04/16 12:13, Ludovic Desroches wrote:
> >
is
not really driven by a gpio but by a pio from the sdhci device. In the binding,
declaring the gpio is an option so I thought using this regulator fits my need.
P.S. patch 2 is based on another patch not yet in next:
http://www.spinics.net/lists/arm-kernel/msg453447.html
Thanks
Ludovic
Ludo
ler strictly follows the specification then we
need to set a valid value.
Signed-off-by: Ludovic Desroches
---
drivers/mmc/host/sdhci.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index ac97b46..0cfd7b2 100644
--- a/drivers/mmc/host/s
Add vmmc and vqmmc regulators for sdhci devices.
The voltage for sdmmc0 vqmmc is selected by a signal from coming from
the sdhci device.
Signed-off-by: Ludovic Desroches
---
arch/arm/boot/dts/at91-sama5d2_xplained.dts | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm
Fix typo in a macro which was not used until now. It explains why there
is no error at compilation time.
Signed-off-by: Ludovic Desroches
Fixes: e1f7c9eee707 "dmaengine: at_xdmac: creation of the atmel eXtended
DMA Controller driver"
Cc: sta...@vger.kernel.org # 3.19 and later
---
d
highest perid value for mem2mem transfers since it
doesn't match the perid of other devices.
Signed-off-by: Ludovic Desroches
---
drivers/dma/at_xdmac.c | 18 +++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
atmel-mci-regs.h is only included in atmel-mci.c so move its content in
the driver and do some cleanup in these definitions to remove checkpatch
errors.
Signed-off-by: Ludovic Desroches
---
drivers/mmc/host/atmel-mci-regs.h | 171 --
drivers/mmc/host/atmel
Remove atmel-mci-regs.h file since it has been merged in atmel-mci.c.
Signed-off-by: Ludovic Desroches
---
MAINTAINERS | 1 -
1 file changed, 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index b2ab9fc..1df3df3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1904,7 +1904,6 @@ ATMEL AT91
The atmci_convert_chksize() function is no more valid for controller
version 0x600 due to the introduction of '2 data' chunk size.
Signed-off-by: Ludovic Desroches
---
drivers/mmc/host/atmel-mci.c | 43 +++
1 file changed, 27 insertions(+), 16
Hi Ulf,
On Mon, Nov 09, 2015 at 05:30:26PM +0100, Ludovic Desroches wrote:
> On Mon, Nov 09, 2015 at 05:00:46PM +0100, Ulf Hansson wrote:
[...]
> > Now, this discussion was interesting, but I forgot what problem you
> > actually where trying to solve? :-)
>
> There is th
The code was not in agreement with the comments.
Signed-off-by: Ludovic Desroches
Cc: sta...@vger.kernel.org # 4.3 and later
---
drivers/dma/at_xdmac.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
index 7f039de..3b68471
ce the data width is modified,
> the actual number of writes into THR must be set accordingly.
>
> Signed-off-by: Cyrille Pitchen
Acked-by: Ludovic Desroches
Thanks Cyrille
> Fixes: 6d3a7d9e3ada ("dmaengine: at_xdmac: allow muliple dwidths when doing
> slave transfers")
>
Vinod,
If you have no objection about his patch, could you take it?
Thanks
Ludovic
On Wed, Jun 17, 2015 at 04:22:26PM +0200, Ludovic Desroches wrote:
> When using descriptor view 2 or higher, we don't write the configuration
> into AT_XDMAC_CC register because this configuration wi
ead) from [] (SyS_read+0x40/0x94)
> [ 51.14] [] (SyS_read) from []
> (ret_fast_syscall+0x0/0x3c)
> [ 51.14] Code: eb010ec2 e30a0d08 e34c005a eb0ae5a7 (e5993000)
> [ 51.15] ---[ end trace fb3c370da3ea4794 ]---
>
> Signed-off-by: David Dueck
> CC: Nicolas Ferre
Hi Sascha,
On Tue, Sep 15, 2015 at 10:57:03AM +0200, Sascha Hauer wrote:
> Hi Ludovic,
>
> On Mon, Sep 07, 2015 at 03:12:10PM +0200, Ludovic Desroches wrote:
> > Hi Sascha,
> >
> > Any comments about this version? Maybe you missed it since you answered
> > me o
nline kernel the 'handle numf > 1'
patch. Can you check if I have not done a mistake. Thanks.
Regards
Ludovic Desroches (2):
dmaengine: at_xdmac: fix memory leak in interleaved mode
dmaengine: at_xdmac: clean used descriptor
Maxime Ripard (2):
dmaengine: at_xdmac: handle numf >
From: Maxime Ripard
Handle 'numf > 1' case for interleaved mode.
Signed-off-by: Maxime Ripard
Signed-off-by: Ludovic Desroches
---
drivers/dma/at_xdmac.c | 104 -
1 file changed, 50 insertions(+), 54 deletions(-)
diff --git
to get back to an
acceptable performance level.
Signed-off-by: Maxime Ripard
Signed-off-by: Ludovic Desroches
Fixes: 6007ccb57744 ("dmaengine: xdmac: Add interleaved transfer support")
Cc: sta...@vger.kernel.org #4.2
---
drivers/dma/at_xdmac.c | 4 ++--
1 file changed, 2 insert
In interleaved mode, when numf > 1, we have only one descriptor for the
transfer but this descriptor has to be added to the descs_list. If not,
when doing remove_xfer, the descriptor won't be put back in the
free_descs_list.
Signed-off-by: Ludovic Desroches
---
drivers/dma/at_xdm
When putting back a descriptor to the free descs list, some fields are
not set to 0, it can cause bugs if someone uses it without having this
in mind.
Descriptor are not put back one by one so it is easier to clean
descriptors when we request them.
Signed-off-by: Ludovic Desroches
Cc: sta
, gpio_disable_free and gpio_set_direction).
- code styling fixes.
- add sama5d2 pin description and device pin muxing.
Ludovic Desroches (7):
pinctrl: introduce driver for Atmel PIO4 controller
pinctrl: dt-binding: Add DT binding documentation for Atmel PIO4
MAINTAINERS: Add an entry for pinctrl-at91-pio4
Add a pinctrl/gpio driver for Atmel PIO4 controller available on SAMA5D2
chip family.
Signed-off-by: Ludovic Desroches
---
drivers/pinctrl/Kconfig | 13 +
drivers/pinctrl/Makefile|1 +
drivers/pinctrl/pinctrl-at91-pio4.c | 1017
Add documentation for the Atmel PIO4 controller introduced with SAMA5D2
chip family.
Signed-off-by: Ludovic Desroches
Acked-by: Sascha Hauer
---
.../bindings/pinctrl/atmel,at91-pio4-pinctrl.txt | 90 ++
1 file changed, 90 insertions(+)
create mode 100644
Documentation
Add an entry for the Atmel PIO4 controller driver.
Signed-off-by: Ludovic Desroches
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 169ad39..ec41bfe 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8166,6 +8166,13 @@ L: linux-arm
Add pio4 controller node to enable pinmux and gpio.
Signed-off-by: Ludovic Desroches
---
arch/arm/boot/dts/sama5d2.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 034cd48..cc05cde 100644
--- a/arch
SAMA5D2 chip family has a new PIO controller.
Signed-off-by: Ludovic Desroches
---
arch/arm/mach-at91/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 89a755b..9e4067c 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm
Add sama5d2 pin descriptions.
Signed-off-by: Ludovic Desroches
---
arch/arm/boot/dts/sama5d2-pinfunc.h | 880
1 file changed, 880 insertions(+)
create mode 100644 arch/arm/boot/dts/sama5d2-pinfunc.h
diff --git a/arch/arm/boot/dts/sama5d2-pinfunc.h
b/arch
Add device pin muxing for the sama5d2 Xplained board.
Signed-off-by: Ludovic Desroches
---
arch/arm/boot/dts/at91-sama5d2_xplained.dts | 61 +
1 file changed, 61 insertions(+)
diff --git a/arch/arm/boot/dts/at91-sama5d2_xplained.dts
b/arch/arm/boot/dts/at91
Hi Ulf,
Thanks for your answer.
On Fri, Nov 06, 2015 at 05:42:51PM +0100, Ulf Hansson wrote:
> On 6 November 2015 at 16:59, Ludovic Desroches
> wrote:
> > Hi,
> >
> > I would like to have some feedback for these two patches. I have two
> > questions.
> >
>
On Mon, Nov 09, 2015 at 10:38:03AM +0100, Ulf Hansson wrote:
> [...]
>
> >> > Is the regulator-gpio usage the right thing to do for vqmmc? In my case
> >> > it is
> >> > not really driven by a gpio but by a pio from the sdhci device. In the
> >> > binding,
> >>
> >> What's a "pio"?
> >>
> >> Wha
On Mon, Nov 09, 2015 at 11:50:50AM +0100, Ulf Hansson wrote:
> [...]
>
> >>
> >> This doesn't seems like a case where a gpio regulator should be used
> >> and I am not sure what problem it would solve. Beside to suppress the
> >> log warnings (actually those aren't warnings but informations).
> >>
On Fri, Nov 06, 2015 at 04:59:29PM +0100, Ludovic Desroches wrote:
> When there is a vmmc regulator, only SD Bus Power is set to 1 in the
> Power Control Register. It means SD Bus Voltage Select field is set to 0
> that is a reserved value. The SD Host Controller specification says:
Turn the informative message about no vmmc/vqmmc regulator found in
debug one. There is no need to indicate that something optional is
missing. Moreover, it can bring confusion, people who doesn't know
it is optional may consider these messages as warnings or errors.
Signed-off-by: Lu
On Mon, Nov 09, 2015 at 03:12:46PM +0100, Ulf Hansson wrote:
> On 9 November 2015 at 14:23, Ludovic Desroches
> wrote:
> > On Fri, Nov 06, 2015 at 04:59:29PM +0100, Ludovic Desroches wrote:
> >> When there is a vmmc regulator, only SD Bus Power is set to 1 in the
> >&
On Mon, Nov 09, 2015 at 05:00:46PM +0100, Ulf Hansson wrote:
> On 9 November 2015 at 15:40, Ludovic Desroches
> wrote:
> > On Mon, Nov 09, 2015 at 03:12:46PM +0100, Ulf Hansson wrote:
> >> On 9 November 2015 at 14:23, Ludovic Desroches
> >> wrote:
> >> >
Add runtime PM support and use runtime_force_suspend|resume() for system
PM.
Signed-off-by: Ludovic Desroches
---
Changes:
- from v1: take a runtime PM centric approach
drivers/mmc/host/sdhci-of-at91.c | 66 +++-
1 file changed, 65 insertions(+), 1 deletion
On Tue, Nov 10, 2015 at 12:12:30PM +0100, Ulf Hansson wrote:
> On 10 November 2015 at 11:36, Ludovic Desroches
> wrote:
> > Add runtime PM support and use runtime_force_suspend|resume() for system
> > PM.
> >
> > Signed-off-by: Ludovic Desroches
> > ---
&g
Add runtime PM support and use runtime_force_suspend|resume() for system
PM.
Signed-off-by: Ludovic Desroches
---
Changes:
- from v2: cleanup thanks to Ulf feedback
- from v1: take a runtime PM centric approach
drivers/mmc/host/sdhci-of-at91.c | 67 +++-
1
On Tue, Nov 10, 2015 at 03:03:57PM +0100, Ulf Hansson wrote:
> On 10 November 2015 at 14:23, Ludovic Desroches
> wrote:
> > Add runtime PM support and use runtime_force_suspend|resume() for system
> > PM.
> >
> > Signed-off-by: Ludovic Desroches
> > ---
>
From: Wenyou Yang
Add a DT property "atmel,twd-hold-cycles" to specify the HOLD
field of TWIHS_CWGR register to increase the TWD hold time.
Signed-off-by: Wenyou Yang
Signed-off-by: Ludovic Desroches
---
Documentation/devicetree/bindings/i2c/i2c-at91.txt | 3 +++
1 file changed, 3
Signed-off-by: Ludovic Desroches
---
drivers/i2c/busses/i2c-at91.c | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c
index 1c758cd..06e66ef 100644
--- a/drivers/i2c/busses/i2c-at91.c
+++ b/drivers/i2c/
> output voltage is programmed by VSET2[] bits.
>
> The DT property "active-semi,vsel-high" is used to specify
> the VSEL pin at high on the board.
>
> Signed-off-by: Wenyou Yang
Minor comment below, it's only my point of view.
Anyway, Reviewed-by: Ludovic Desr
On Wed, Sep 30, 2015 at 03:25:50PM +0800, Wenyou Yang wrote:
> Add a DT property "active-semi,vsel-high" to indicate the VSEL pin
> is high. If this property is missing, then assume the VSEL pin is
> low(0).
>
> Signed-off-by: Wenyou Yang
Reviewed-by: Ludovic Desroches
On Tue, Nov 17, 2015 at 11:21:35AM +0100, Nicolas Ferre wrote:
> Update Josh's entries about NAND and ISI drivers.
> Thanks for your work with Atmel Josh!
>
> Signed-off-by: Nicolas Ferre
> Cc: Ludovic Desroches
> Cc: Wenyou Yang
> Cc: Josh Wu
A
Hi Arnd,
On Thu, Nov 12, 2015 at 03:15:38PM +0100, Arnd Bergmann wrote:
> resource_size_t may be defined as 32 or 64 bit depending on configuration,
> so it cannot be printed using the normal format strings, as gcc correctly
> warns:
>
> pinctrl-at91-pio4.c: In function 'atmel_pinctrl_probe':
> p
clock which can take
several rates. As we can't trust those values, take them from the clock
tree and update the capabilities according to.
As we can have the same pitfall, in some cases, with the SAMA5D2 Soc,
stop relying on capabilities too.
Signed-off-by: Ludovic Desroches
---
drivers/mmc
There is a new compatible string for the SAM9X60 sdhci device. It involves
an update of the properties about the clocks stuff.
Signed-off-by: Ludovic Desroches
---
.../devicetree/bindings/mmc/sdhci-atmel.txt | 25 ---
1 file changed, 22 insertions(+), 3 deletions(-)
diff
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