On Tue, 2018-10-09 at 08:37 +, Abel Vesa wrote:
> +struct clk *imx_clk_composite_8m_flags(const char *name,
> + const char **parent_names,
> + int num_parents, void __iomem *reg,
> + unsi
On Tue, 2018-10-09 at 09:09 +0800, Shawn Guo wrote:
> On Mon, Oct 08, 2018 at 03:28:01PM +0000, Leonard Crestez wrote:
> > Bindings for "fixed-regulator" only explicitly support "gpio" property,
> > not "gpios". Fix by correcting the property name.
>
On 10/25/2018 5:15 PM, Sasha Levin wrote:
> From: Leonard Crestez
>
> [ Upstream commit e6f4292ae0a1e73fae26ced57de13a48f71ad1fa ]
>
> Right now mach-imx6ul registers a fixup for the ksz8081 phy. The same
> register values can be set through the micrel phy driver by usin
On 10/8/2018 8:38 PM, Leonard Crestez wrote:
> Enable PCI suspend/resume support on imx6sx socs. This is similar to
> imx7d with a few differences:
>
> * The PM_Turn_Off bit is exposed through an IOMUX GPR, like all other
> pcie control bits on 6sx.
> * The pcie_inbound_axi clk
t enabled at (91266): [] __do_softirq+0x360/0x524
softirqs last disabled at (91277): [] irq_exit+0xf8/0x1a4
---[ end trace bc12311e869d672a ]---
This fix updates sunrpc code and make nfs boot cleanly.
Signed-off-by: Leonard Crestez
---
net/sunrpc/xprtsock.c | 4 ++--
1 file changed, 2 insertions(+), 2 d
to v2: https://lore.kernel.org/patchwork/cover/999795/
Changes since v1:
* Add devicetree maintainers for dt-bindings
* Add a patch enabling in imx_v6_v7_defconfig. Since tcrypt now passes this
shouldn't cause any issues
* Link to v1: https://lore.kernel.org/patchwork/cover/994893/
Leonard
Explicit clock enabling is required on 6sll and 6ull so mention that
standard clock bindings are used.
Signed-off-by: Leonard Crestez
Reviewed-by: Fabio Estevam
---
Documentation/devicetree/bindings/crypto/fsl-dcp.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation
This block is present in 6sl, 6sll and 6ull so it should be enabled in
the default imx kernel config.
Signed-off-by: Leonard Crestez
Reviewed-by: Fabio Estevam
---
arch/arm/configs/imx_v6_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/imx_v6_v7_defconfig
b
On 6ull and 6sll the DCP block has a clock which needs to be explicitly
enabled.
Add minimal handling for this at probe/remove time.
Signed-off-by: Leonard Crestez
---
drivers/crypto/mxs-dcp.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/crypto/mxs-dcp.c b
On Tue, 2018-10-16 at 13:03 -0300, Fabio Estevam wrote:
> > + /* DCP clock is optional, only used on some SOCs */
> > + sdcp->dcp_clk = devm_clk_get(dev, "dcp");
> > + if (IS_ERR(sdcp->dcp_clk)) {
> > + if (sdcp->dcp_clk != ERR_PTR(-ENOENT))
> > +
On Thu, 2018-11-01 at 11:02 +0100, Philipp Zabel wrote:
> Hi Leonard,
>
> On Wed, 2018-10-31 at 11:02 +, Leonard Crestez wrote:
> > On 10/8/2018 8:38 PM, Leonard Crestez wrote:
> > > Enable PCI suspend/resume support on imx6sx socs. This is similar to
> >
On Tue, 2018-11-06 at 15:30 +, A.s. Dong wrote:
> Gently Ping...
> drivers/clk/imx/clk-composite.c| 85 +
During review for 8m clocks a separate but different composite clk was
added. In order to avoid confusion that was named "clk-composite-8m.c",
it would make s
-> deassert_core_reset -> enable_ref_clk.
Most of the resume logic is shared with the initial reset after probe.
Signed-off-by: Leonard Crestez
---
Changes since v1:
* Use a switch statement in imx6_pcie_pm_turnoff. The DT-based turnoff
path is still an if statement.
* Did not
Explicit clock enabling is required on 6sll and 6ull so mention that
standard clock bindings are used.
Signed-off-by: Leonard Crestez
Reviewed-by: Fabio Estevam
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/crypto/fsl-dcp.txt | 2 ++
1 file changed, 2 insertions(+)
diff
On Thu, 2018-10-04 at 10:59 +0200, Lucas Stach wrote:
> Am Montag, den 01.10.2018, 22:53 +0300 schrieb Leonard Crestez:
> > When the root complex suspends it must send a PME_Turn_Off TLP.
> > Implement this by asserting the "turnoff" reset.
> >
> > +st
HY reset was only handled in the the bootloader.
This fixes linux-next boot failures previously reported here:
https://lore.kernel.org/patchwork/patch/982437/#1177900
https://lore.kernel.org/patchwork/patch/994091/#1178304
Signed-off-by: Leonard Crestez
Reviewed-by: Linus Walleij
Reviewed-by
t supported) has the exact same
PCIE_CTRL_APPS_TURNOFF bit in the same location.
---
Changes since v1:
* Add 1-10ms sleep after PME_Turn_Off, with explanation
* Slight fix in commit msg (this is functionality is)
* Link: https://lore.kernel.org/patchwork/cover/994076/
Leonard Crestez (4)
This is required for the imx pci driver to send the PME_Turn_Off TLP.
Signed-off-by: Leonard Crestez
Acked-by: Rob Herring
---
drivers/reset/reset-imx7.c | 1 +
include/dt-bindings/reset/imx7-reset.h | 4 +++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers
This is documented as "required" but won't be present in old dtbs.
These resets are also present on other imx chips but right now only
imx7d implements them through the reset controller subsystem.
Signed-off-by: Leonard Crestez
Acked-by: Rob Herring
---
Documentation/devicetr
This is required for the imx pci driver to send the PME_Turn_Off TLP.
Signed-off-by: Leonard Crestez
Acked-by: Shawn Guo
---
arch/arm/boot/dts/imx7d.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index
t supported) has the exact same
PCIE_CTRL_APPS_TURNOFF bit in the same location.
Signed-off-by: Leonard Crestez
---
drivers/pci/controller/dwc/pci-imx6.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c
b/drivers/pci/controller/
On Thu, 2018-10-04 at 15:47 +, Leonard Crestez wrote:
> Bindings for "fixed-regulator" only explicitly support "gpio" property,
> not "gpios". Fix by correcting the property name.
>
> The enet PHYs on imx6sx-sdb needs to be explicitly reset after a po
On Thu, 2018-10-04 at 18:08 +0100, Lorenzo Pieralisi wrote:
> On Thu, Oct 04, 2018 at 06:47:01PM +0200, Philipp Zabel wrote:
> > This is contained enough to be merged with the rest of the series,
> > patches 1 and 2:
> >
> > Acked-by: Philipp Zabel
> >
> > Let me know if I should pick them up i
hich causes the "gpios" property
to also be parsed. Before that commit the "gpios" property had no
effect, PHY reset was only handled in the the bootloader.
This fixes linux-next boot failures previously reported here:
https://lore.kernel.org/patchwork/patch/982437/#1177900
https
-> deassert_core_reset -> enable_ref_clk.
Most of the resume logic is shared with the initial reset after probe.
Signed-off-by: Leonard Crestez
---
drivers/pci/controller/dwc/pci-imx6.c | 40 ++---
include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 1 +
2 files chang
omain requires a way for pcie to
keep it active or it will break when displays are off.
The power-domains on imx6sx are meant to look like this:
power-domains = <&pd_disp>, <&pd_pci>;
power-domain-names = "pcie", "pcie_phy";
Signed-off-
On 11/2/2018 2:50 AM, David Howells wrote:
> kernel test robot wrote:
>
>> FYI, we noticed the following commit (built with gcc-7):
>>
>> commit: 6a7da2a288ce412d7ac117a2912a7b0d9104ee6d ("[RFC] sunrpc: Fix flood
>> of warnings from iov_iter_kvec in linux-next")
>> url:
>> https://emea01.safeli
On Mon, 2018-09-17 at 16:09 +0100, Lorenzo Pieralisi wrote:
> On Tue, Aug 14, 2018 at 07:50:14PM +0300, Leonard Crestez wrote:
> > V4 adds 4 more patches with PME_Turn_Off support on top, using a new
> > reset bit. I generally try to keep series short but in this case some
> &
On Mon, 2018-09-17 at 17:52 +0100, Lorenzo Pieralisi wrote:
> On Mon, Sep 17, 2018 at 04:01:21PM +0000, Leonard Crestez wrote:
> > On Mon, 2018-09-17 at 16:09 +0100, Lorenzo Pieralisi wrote:
> > > On Tue, Aug 14, 2018 at 07:50:14PM +0300, Leonard Crestez wrote:
> > > &g
This has been unused since commit 44b460cfe554 ("drm: imx: remove struct
imx_drm_crtc and imx_drm_crtc_helper_funcs")
Signed-off-by: Leonard Crestez
---
drivers/gpu/drm/imx/imx-drm-core.c | 1 -
1 file changed, 1 deletion(-)
Looking at the imx_drm_device struct it is only used t
On 12/04/2014 07:57 PM, Tejun Heo wrote:
> Hello,
>
> On Wed, Dec 03, 2014 at 12:33:59AM +0200, Leonard Crestez wrote:
>> It seems that free_percpu performance is very bad when working with small
>> objects. The easiest way to reproduce this is to allocate and then free a
&
On Sat, 2018-02-24 at 16:02 +0800, Anson Huang wrote:
> This patch adds i.MX7 thermal sensor support, most
> of the i.MX7 thermal sensor functions are same with
> i.MX6 except the registers offset/layout, so we move
> those registers offset/layout definitions to soc data
> structure.
>
> i.MX7 use
When the definition of this struct was removed a forward declaration and an
unused struct member were still left around. Remove them because they serve
no purpose.
Fixes 44b460cfe554 ("drm: imx: remove struct imx_drm_crtc and
imx_drm_crtc_helper_funcs")
Signed-off-by: Leona
On Tue, 2018-05-29 at 16:02 +0800, Anson Huang wrote:
> Correct MIPI/PCIe/USB_HSIC's PGC offset based on
> design RTL, the value on Reference Manual are incorrect.
>
> The correct offset should be as below:
>
> -#define PGC_MIPI 4
> -#define PGC_PCIE 5
>
first PCI read from PCI-PM core. It
is not strictly related to PCI but pci-imx6 is the only user of gpcv2
power domains.
Patch 1 in this series is also technically an unrelated bugfix, however
pci-imx6 is the only user.
Leonard Crestez (2):
reset: imx7: Fix always writing bits as 0
PCI: imx
variants.
Tested on imx7d-sabresd with an Intel 5622ANHMW wireless pcie adapter.
The original author is mostly Richard Zhu , this
patch adjusts the code to the upstream imx7d implemention using reset
controls and power domains.
Signed-off-by: Leonard Crestez
---
drivers/pci/dwc/pci-imx6.c | 94
t for
other registers like MIPIPHY and HSICPHY the bits are explicitly
documented as "1 means assert, 0 means deassert".
The values are still reversed for IMX7_RESET_PCIE_CTRL_APPS_EN.
Signed-off-by: Leonard Crestez
---
drivers/reset/reset-imx7.c | 2 +-
1 file changed, 1 insertion
ona and also calling it from
mxsfb_crtc_mode_set_nofb.
Also add fields to mxsfb_drv to keep track of enabled/suspended states.
Signed-off-by: Robert Chiras
Signed-off-by: Leonard Crestez
---
drivers/gpu/drm/mxsfb/mxsfb_crtc.c | 38 +++-
drivers/gpu/drm/mxsfb/mxsfb_drv.c |
On 4/24/2019 11:00 AM, Yue Haibing wrote:
> From: YueHaibing
>
> During randconfig builds, I occasionally run into an invalid configuration
>
> drivers/soc/imx/soc-imx8.o: In function `imx8_soc_init':
> soc-imx8.c:(.init.text+0x144): undefined reference to `soc_device_register'
>
> while CONFIG
ce_register'
>
> while CONFIG_SOC_BUS is not set, the building failed like this. This patch
> selects SOC_BUS to fix it.
>
> Reported-by: Hulk Robot
> Fixes: a7e26f356ca1 ("soc: imx: Add generic i.MX8 SoC driver")
> Suggested-by: Leonard Crestez
> Signed-off-by: YueHaibing
Reviewed-by: Leonard Crestez
On 3/15/19 11:31 AM, Alexandre Bailon wrote:
>>> This series is sent as RFC mostly because the current support of i.MX SoC
>>> won't
>>> benefit of busfreq framework, because the clocks' driver don't support
>>> interconnect / dram frequency scaling.
>>> As exemple, this series implements busfreq
On Wed, 2019-03-27 at 17:06 +0100, Lucas Stach wrote:
> Am Mittwoch, den 27.03.2019, 15:57 + schrieb Marc Zyngier:
> > On 27/03/2019 15:44, Lucas Stach wrote:
> > > Am Mittwoch, den 27.03.2019, 13:21 + schrieb Abel Vesa:
> > > > This work is a workaround I'm looking into (more as a backgrou
On Wed, 2019-03-27 at 17:45 +, Marc Zyngier wrote:
> On 27/03/2019 16:06, Lucas Stach wrote:
> > Am Mittwoch, den 27.03.2019, 15:57 + schrieb Marc Zyngier:
> > > On 27/03/2019 15:44, Lucas Stach wrote:
> > > > Am Mittwoch, den 27.03.2019, 13:21 + schrieb Abel Vesa:
> > > > > This work i
On Mon, 2019-02-25 at 15:25 +0100, Stefan Agner wrote:
> Define the length of the DBI registers and limit config space to its
> length. This makes sure that the kernel does not access registers
> beyond that point, avoiding the following abort on a i.MX 6Quad:
> # cat /sys/devices/soc0/soc/1ffc00
On Mon, 2019-02-25 at 17:02 +0100, Stefan Agner wrote:
> Define the length of the DBI registers and limit config space to its
> length. This makes sure that the kernel does not access registers
> beyond that point, avoiding the following abort on a i.MX 6Quad:
>
> +static void imx6_pcie_quirk(stru
> + return;
> +
> + /* Make sure we only quirk devices associated with this driver */
> + if (bus->dev.parent->parent->driver != &imx6_pcie_driver.driver)
> + return;
This looks like it would be enough to prevent interfering with other
dwc-based pci drivers.
Reviewed-by: Leonard Crestez
On Tue, 2019-02-26 at 10:53 +, Abel Vesa wrote:
> Add generic i.MX8 SoC driver along with the i.MX8MQ SoC specific code.
> For now, only i.MX8MQ revision B1 is supported. For any other, i.MX8MQ
> revision it will print 'unknown'.
>
> + np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-o
On Wed, 2019-02-27 at 08:41 +, Abel Vesa wrote:
> On 19-02-26 13:34:52, Leonard Crestez wrote:
> > On Tue, 2019-02-26 at 10:53 +, Abel Vesa wrote:
> > > Add generic i.MX8 SoC driver along with the i.MX8MQ SoC specific code.
> > > For now, only i.MX8MQ revisi
Hello,
It seems that free_percpu performance is very bad when working with small
objects. The easiest way to reproduce this is to allocate and then free a large
number of percpu int counters in order. Small objects (reference counters and
pointers) are common users of alloc_percpu and I think t
On 04/01/2016 11:34 AM, Peter Meerwald-Stadler wrote:
-static const struct iio_chan_spec adc081c_channel = {
- .type = IIO_VOLTAGE,
- .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
- .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
-};
the patch would look cleaner/shorter
lock structure for every
> module which uses same type of PLL, e.g., audio/video/dram use
> 1443X PLL, arm/gpu/vpu/sys use 1416X PLL, define 2 PLL clock
> structure for each group is enough. >
> Signed-off-by: Anson Huang
For both:
Reviewed-by: Leonard Crestez
On 28.07.2019 18:20, Daniel Baluta wrote:
> From: Abel Vesa
>
> Add the initial configuration for clocks that need default parent and rate
> setting. This is based on the vendor tree clock provider parents and rates
> configuration except this is doing the setup in dts rather then using clock
> c
On 20.08.2019 05:17, Peng Fan wrote:
> According to PLL1443XA and PLL1416X spec,
> "When BYPASS is 0 and RESETB is changed from 0 to 1, FOUT starts to
> output unstable clock until lock time passes. PLL1416X/PLL1443XA may
> generate a glitch at FOUT."
>
> So set BYPASS when RESETB is changed from
On 22.08.2019 12:18, Peng Fan wrote:
>> Subject: Re: [PATCH] clk: imx: pll14xx: avoid glitch when set rate
>>
>> On 20.08.2019 05:17, Peng Fan wrote:
>>> According to PLL1443XA and PLL1416X spec, "When BYPASS is 0 and RESETB
>>> is changed from 0 to 1, FOUT starts to output unstable clock until
>>>
On 31.07.2019 21:01, Andrey Smirnov wrote:
> With commit b5bbe2235361 ("usb: phy: mxs: Disable external charger
> detect in mxs_phy_hw_init()") in tree all of the necessary charger
> setup is done by the USB PHY driver which covers all of the affected
> i.MX6 SoCs.
>
> NOTE: Imx_anatop_init() was
On 22.08.2019 23:06, Andrey Smirnov wrote:
>> On 31.07.2019 21:01, Andrey Smirnov wrote:
>>> With commit b5bbe2235361 ("usb: phy: mxs: Disable external charger
>>> detect in mxs_phy_hw_init()") in tree all of the necessary charger
>>> setup is done by the USB PHY driver which covers all of the affe
On 2019-09-04 10:14 AM, Anson Huang wrote:
> The SCU firmware API for getting UID should have response,
> otherwise, the message stored in function stack could be
> released and then the response data received from SCU will be
> stored into that released stack and cause kernel NULL pointer
> dump.
On 15.08.2019 14:18, anson.hu...@nxp.com wrote:
> From: Anson Huang
>
> Enable i2c1 on i.MX8MN DDR4 EVK board.
>
> Signed-off-by: Anson Huang
Didn't see a cover letter but all 6 patches look good:
Reviewed-by: Leonard Crestez
On 27.08.2019 04:51, Anson Huang wrote:
>> In an earlier series the CLK_IS_CRITICAL flags was removed from the TMU
>> clock so if the thermal driver doesn't explicitly enable it the system will
>> hang
>> on probe. This is what happens in linux-next right now!
>
> The thermal driver should be bui
On 26.08.2019 14:50, Stephen Rothwell wrote:
> Hi all,
>
> After merging the devfreq tree, today's linux-next build (x86_64
> allmodconfig) produced this warning:
>
> drivers/devfreq/governor_passive.c: In function
> 'devfreq_passive_event_handler':
> drivers/devfreq/governor_passive.c:152:17: w
On 7/30/2019 5:31 AM, anson.hu...@nxp.com wrote:
> From: Anson Huang
>
> Some platforms like i.MX8MQ has clock control for this module,
> need to add clock operations to make sure the driver is working
> properly.
>
> Signed-off-by: Anson Huang
> Reviewed-by: Guido Günther
This series looks g
On 05.09.2019 12:59, Anson Huang wrote:
> Many i.MX8M SoCs use same 1443X/1416X PLL, such as i.MX8MM,
> i.MX8MN and later i.MX8M SoCs, moving these PLL definitions
> to common place can save a lot of duplicated code on each
> platform.
There are lots of similarities between imx8m clocks, do you pl
11 1200
>
> Signed-off-by: Anson Huang
Reviewed-by: Leonard Crestez
Are you going to add the 500mhz OPP as well?
On 2019-09-12 5:57 AM, Anson Huang wrote:
> Add "opp-suspend" property for i.MX7D to make sure system
> suspend with max available opp.
>
> Signed-off-by: Anson Huang
Reviewed-by: Leonard Crestez
On 04.09.2019 05:35, Andrey Smirnov wrote:
> Returning -EBUSY from platform device's .remove() callback won't stop
> the removal process, so the code in caam_jr_remove() is not going to
> have the desired effect of preventing JR from being removed.
>
> In order to be able to deal with removal of t
On 2019-09-27 4:20 AM, Anson Huang wrote:
>> On 2019-09-26 1:06 PM, Marco Felsch wrote:
>>> On 19-09-26 08:03, Anson Huang wrote:
> On 19-09-25 18:07, Anson Huang wrote:
>> The SCU firmware does NOT always have return value stored in
>> message header's function element even the API has
On 25.09.2019 13:09, Anson Huang wrote:
> The SCU firmware does NOT always have return value stored in message
> header's function element even the API has response data, those special
> APIs are defined as void function in SCU firmware, so they should be
> treated as return success always.
>
> Si
On 2019-09-26 1:06 PM, Marco Felsch wrote:
> On 19-09-26 08:03, Anson Huang wrote:
>>> On 19-09-25 18:07, Anson Huang wrote:
The SCU firmware does NOT always have return value stored in message
header's function element even the API has response data, those
special APIs are defined a
On 27.09.2019 04:20, Anson Huang wrote:
>> On 2019-09-26 1:06 PM, Marco Felsch wrote:
>>> On 19-09-26 08:03, Anson Huang wrote:
> On 19-09-25 18:07, Anson Huang wrote:
>> The SCU firmware does NOT always have return value stored in
>> message header's function element even the API has r
On 27.09.2019 12:06, Marco Felsch wrote:
> Hi Anson, Leonard,
>
> On 19-09-27 01:20, Anson Huang wrote:
>> Hi, Leonard
>>
>>> On 2019-09-26 1:06 PM, Marco Felsch wrote:
On 19-09-26 08:03, Anson Huang wrote:
>> On 19-09-25 18:07, Anson Huang wrote:
>>> The SCU firmware does NOT always
On 22.09.2019 21:56, Sasha Levin wrote:
> From: Leonard Crestez
>
> [ Upstream commit 0ef7c7cce43f6ecc2b96d447e69b2900a9655f7c ]
This will introduce an "unused variable warning" unless you also
cherry-pick commit 0465814831a9 ("PM / devfreq: passive: fix compiler
w
On 18.07.2019 21:24, Daniel Baluta wrote:
> On Thu, Jul 18, 2019 at 7:41 PM Rob Herring wrote:
>>
>> On Thu, Jul 18, 2019 at 9:13 AM Daniel Baluta wrote:
>>>
>>> This describes the DSP device tree node.
>>>
>>> Signed-off-by: Daniel Baluta
>>> + power-domains:
>>> +description:
>>> +
On 2019-10-23 9:29 AM, Viorel Suman wrote:
> On Mi, 2019-08-21 at 20:39 +0000, Leonard Crestez wrote:
>> The audio PLLs should run below 650 mHz so please use 393216000 and
>> 361267200 instead of 786432000 and 722534400. For the 8mm equivalent see
>> commit 053a4ffe2988 (&
On 10.10.2019 18:14, Jan Kiszka wrote:
> On 25.09.19 17:03, Joel Colledge wrote:
>> When CONFIG_PRINTK_CALLER is set, struct printk_log contains an
>> additional member caller_id. As a result, the offset of the log text is
>> different.
>>
>> This fixes the following error:
>>
>>(gdb) lx-dmesg
On 11.10.2019 15:25, Joel Colledge wrote:
> When CONFIG_PRINTK_CALLER is set, struct printk_log contains an
> additional member caller_id. This affects the offset of the log text.
> Account for this by using the type information from gdb to determine all
> the offsets instead of using hardcoded val
On 11.10.2019 16:02, Joel Colledge wrote:
> On Fri, Oct 11, 2019 at 2:47 PM Leonard Crestez
> wrote:
>> This struct printk_log is quite small, I wonder if it's possible to do a
>> single read for each log entry? This might make lx-dmesg faster because
>> of fewer rou
g all gpio interrupts at probe time until they are
explicitly requested by drivers.
Signed-off-by: Leonard Crestez
---
It's strange that nobody else has run into this problem, AMD hardware is
relatively common. Maybe firmware generally disables GPIO interrupts
itself?
This patch fixes boot but t
On 1/7/2019 9:31 PM, Leonard Crestez wrote:
> The dts makefiles go through a lot of pointless churn when boards are
> added. Many SOCs (such as imx) have very simple naming conventions for
> all boards using a certain chip and board listings can be easily
> collapsed using wildcards
On Fri, 2019-01-25 at 01:03 +0900, Masahiro Yamada wrote:
> On Tue, Jan 22, 2019 at 1:17 AM Leonard Crestez
> wrote:
> >
> > On 1/7/2019 9:31 PM, Leonard Crestez wrote:
> > > The dts makefiles go through a lot of pointless churn when boards are
> > > adde
On 1/14/19 2:56 AM, Shawn Guo wrote:
> On Fri, Jan 11, 2019 at 05:57:30AM +, Anson Huang wrote:
> > This patch adds cpuidle support for i.MX7ULP, 3 cpuidle
> > states supported as below:
> >
> > 1. WFI, just ARM wfi;
> > 2. WAIT mode, mapped to SoC's partial stop mode #3;
> > 3. STOP mode, map
On 22.05.2019 16:13, Guido Günther wrote:
> Subject: Re: [RFC PATCH] soc: imx: Try harder to get imq8mq SoC revisions
Fixed subject
> On Wed, May 08, 2019 at 02:40:18PM +0200, Guido Günther wrote:
>> Thanks for your comments. Let's try s.th. different then: identify by
>> bootrom, ocotop and anat
On 20.05.2019 06:06, Peng Fan wrote:
> Introduce fusable-node property for i.MX OCOTP driver.
> The property will only be used by Firmware(eg. U-Boot) to
> runtime disable the nodes.
>
> Take i.MX6ULL for example, there are several parts that only
> have limited modules enabled controlled by OCOTP
> Signed-off-by: Anson Huang
For both:
Reviewed-by: Leonard Crestez
I was thinking that maybe you could of_node_put as soon as you were done
with it but the model is read straight into soc_dev_attr so just freeing
everything at the end makes more sense.
On 5/17/2019 8:49 AM, Anson Huang wrote:
> + root = of_find_node_by_path("/");
> +
> + np = of_find_compatible_node(NULL, NULL, "fsl,imx-scu");
It's possibly not very important for root or FW communication nodes but
you should probably of_node_put those back.
On 5/24/2019 1:46 AM, Stephen Boyd wrote:
> Quoting Fabiano Rosas (2019-05-23 12:53:11)
>> diff --git a/scripts/gdb/linux/constants.py.in
>> b/scripts/gdb/linux/constants.py.in
>> index 1d73083da6cb..2efbec6b6b8d 100644
>> --- a/scripts/gdb/linux/constants.py.in
>> +++ b/scripts/gdb/linux/constant
On 15.03.2019 18:55, Alexandre Bailon wrote:
>> On Wed, Mar 13, 2019 at 12:33 PM Alexandre Bailon
>> wrote:
>>> As exemple, this series implements busfreq for i.MX8MM whose
>>> upstreaming is in progress. Because this relies on ATF to
>>> do the frequency scaling, it won't be hard make it work.
On 15.05.2019 11:32, Anson Huang wrote:
> Add i.MX SCU SoC info driver to support i.MX8QXP SoC, introduce
> driver dependency into Kconfig as CONFIG_IMX_SCU must be
> selected to support i.MX SCU SoC driver, also need to use
> platform driver model to make sure IMX_SCU driver is probed
> before i.M
/patch/10940303/
The conflict is easy to resolve but I don't mind resending if your
patches get accepted first. If should probably resend anyway to also add
gic clk to 8mq.
For series:
Reviewed-by: Leonard Crestez
On 15.05.2019 04:09, Anson Huang wrote:
> Add macro for the SNVS clock of the i.MX8MQ.
>
> Signed-off-by: Anson Huang
For series (couldn't find a cover letter):
Reviewed-by: Leonard Crestez
On Fri, 2019-03-22 at 16:49 +, Abel Vesa wrote:
> Add generic i.MX8 SoC driver along with the i.MX8MQ SoC specific code.
> For now, only i.MX8MQ revision B1 is supported. For any other, i.MX8MQ
> revision it will print 'unknown'.
> +#define REV_B1 0x21
> +
> +#def
On 3/28/2019 6:43 PM, Leonard Crestez wrote:
> On Fri, 2019-03-22 at 16:49 +, Abel Vesa wrote:
>> Add generic i.MX8 SoC driver along with the i.MX8MQ SoC specific code.
>> For now, only i.MX8MQ revision B1 is supported. For any other, i.MX8MQ
>> revision it will print
Tested with openocd on imx but should be useful everywhere. It is common
for clk issues to lockup the system and make /sys inaccesible.
Not sure where to send this; there doesn't appear to be any list more
specific than LKML.
Leonard Crestez (3):
scripts/gdb: Add hlist utilities
script
This allows easily examining kernel hlists in python.
Signed-off-by: Leonard Crestez
---
scripts/gdb/linux/lists.py | 23 +++
1 file changed, 23 insertions(+)
diff --git a/scripts/gdb/linux/lists.py b/scripts/gdb/linux/lists.py
index 1987d756b36b..55356b66f8ea 100644
--- a
Add an lx-clk-summary command which prints a subset of
/sys/kernel/debug/clk/clk_summary.
This can be used to examine hangs caused by clk not being enabled.
Signed-off-by: Leonard Crestez
---
scripts/gdb/linux/clk.py | 46 ++
scripts/gdb/vmlinux-gdb.py
Finding an individual clk_core requires walking the tree which can be
quite complicated so add a helper for easy access.
(gdb) print *(struct clk_scu*)$lx_clk_core_lookup("uart0_clk")->hw
Signed-off-by: Leonard Crestez
---
scripts/gdb/linux/clk.py | 23 +++
1
On 4/22/2019 9:46 AM, Anson Huang wrote:
>> -Original Message-
>> From: Anson Huang
>>> From: Shawn Guo [mailto:shawn...@kernel.org]
>>> On Sun, Apr 21, 2019 at 03:40:00PM +0800, Shawn Guo wrote:
On Thu, Apr 11, 2019 at 06:49:12AM +, Anson Huang wrote:
> i.MX8QXP is an ARMv8 So
On 4/22/2019 11:41 PM, Stephen Boyd wrote:
> Quoting Leonard Crestez (2019-04-22 01:26:56)
>> This allows easily examining kernel hlists in python.
>>
>> Signed-off-by: Leonard Crestez
>
>> +def hlist_for_each_entry(head, gdbtype, member):
>> +for node in
On 4/22/2019 11:18 PM, Stephen Boyd wrote:
> Quoting Leonard Crestez (2019-04-22 01:26:57)
>> diff --git a/scripts/gdb/linux/clk.py b/scripts/gdb/linux/clk.py
>> +class LxClkCoreLookup(gdb.Function):
>> +"""Find struct clk_core by name"""
On 03.05.2019 16:53, Guido Günther wrote:
> This is similar to what the BSP does and needed to e.g. determine
> necessary quirks for MIPI DSI.
>
> Signed-off-by: Guido Günther
>
> From the list discussion and changelog it's not clear to me why a
> different method was chosen for the B1 silicon
ernet: support of_get_mac_address new ERR_PTR error
>net: dsa: support of_get_mac_address new ERR_PTR error
>staging: octeon-ethernet: Fix of_get_mac_address ERR_PTR check
>net: usb: smsc: fix warning reported by kbuild test robot
> drivers/net/ethernet/freesca
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