On Wed, 2017-08-16 at 12:04 +0530, Viresh Kumar wrote:
> On 28-07-17, 10:58, Viresh Kumar wrote:
> >
> > At this point I really feel that this is a hardware specific problem
> > and it was working by chance until now. And I am not sure if we
> > shouldn't be stopping this patch from getting merged
On Tue, 2017-08-08 at 20:58 +0800, Zhang Rui wrote:
> On Tue, 2017-08-08 at 12:44 +0100, Srinivas Kandagatla wrote:
> > On 08/08/17 12:38, Leonard Crestez wrote:
> > > On Tue, 2017-08-08 at 12:00 +0100, Srinivas Kandagatla wrote:
> > > > On 08/08/17 08:21, Zhang Rui w
On Tue, 2017-06-20 at 06:55 +0200, Oleksij Rempel wrote:
> On 19.06.2017 13:35, Leonard Crestez wrote:
> > On Mon, 2017-06-19 at 07:02 +0200, Oleksij Rempel wrote:
> > >
> > > One of the Freescale recommended sequences for power off with
> > >
On Tue, 2017-06-20 at 07:01 +0200, Oleksij Rempel wrote:
>
> On 19.06.2017 13:35, Leonard Crestez wrote:
> >
> > On Mon, 2017-06-19 at 07:02 +0200, Oleksij Rempel wrote:
> > >
> > > Export pm_power_off_prepare. It is needed to implement power off on
> &
On Wed, 2017-05-31 at 01:07 -0300, Fabio Estevam wrote:
> On Tue, May 30, 2017 at 12:57 PM, Leonard Crestez
> wrote:
> >
> > From: Octavian Purdila
> >
> > This fixes an issue with imx6ull where setting the frequency to
> > 528Mhz
> > would actually se
ux-next since next-20170517. This is bad, DEBUG_FS is extremely
useful for kernel introspection and testing.
Signed-off-by: Leonard Crestez
---
Patch is against next-20170526. Applying it to shawnguo/imx/defconfig
and cycling via savedefconfig makes this diff go away.
Alternatively maybe DEB
On Fri, 2017-05-26 at 08:42 -0700, Paul E. McKenney wrote:
> On Fri, May 26, 2017 at 02:26:06PM +0300, Leonard Crestez wrote:
> >
> > This option was removed by "make savedefconfig" in
> > commit c5054a98bce4 ("ARM: imx_v6_v7_defconfig: Select SMSC_
From: Octavian Purdila
This fixes an issue with imx6ull where setting the frequency to 528Mhz
would actually set the ARM clock to 324Mhz.
Signed-off-by: Octavian Purdila
Signed-off-by: Leonard Crestez
---
drivers/cpufreq/imx6q-cpufreq.c | 6 --
1 file changed, 4 insertions(+), 2
Suspend and resume on imx6ull is currenty not working because of some
missed checks where behavior should match imx6ul.
Signed-off-by: Leonard Crestez
---
arch/arm/mach-imx/mxc.h | 6 ++
arch/arm/mach-imx/pm-imx6.c | 6 --
2 files changed, 10 insertions(+), 2 deletions(-)
diff
These bits seem to be lost after a suspend/resume cycle so just set them
again.
This patch fixes ethernet suspend/resume on imx6ul-14x14-evk boards.
Signed-off-by: Leonard Crestez
---
drivers/net/phy/micrel.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/net/phy
phy. The solution would be to patch their dts but it's not clear how
to identify affected boards.
This code is shared with imx6ull-14x14-evk but 6ull suspend needs an unrelated
patch: https://lkml.org/lkml/2017/5/30/584
Leonard Crestez (2):
ARM: dts: imx6ul-14x14-evk: Add ksz8081 phy prope
Right now mach-imx6ul registers a fixup for the ksz8081 phy. The same
register values can be set through the micrel phy driver by using dts
properties.
This seems preferable and allows cleanly fixing suspend/resume.
Signed-off-by: Leonard Crestez
---
arch/arm/boot/dts/imx6ul-14x14-evk.dts | 6
On Tue, 2018-07-31 at 10:32 +0200, Ulf Hansson wrote:
> On 24 July 2018 at 20:17, Leonard Crestez wrote:
> > On some chips the PCIE and PCIE_PHY blocks are in separate power domains
> > which can be power-gated independently. The driver needs to handle this
> > by keepi
.
Code is only for imx7d but a very similar sequence can be used for
other socs.
The original author is mostly Richard Zhu , this
patch adjusts the code to the upstream imx7d implemention using reset
controls and power domains.
Signed-off-by: Leonard Crestez
Reviewed-by: Lucas Stach
---
drivers
supported by uboot.
Signed-off-by: Leonard Crestez
---
This is not a very pretty solution but very convenient.
---
arch/arm/configs/imx_v6_v7_defconfig | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/configs/imx_v6_v7_defconfig
b/arch/arm/configs
On Tue, 2018-08-28 at 11:07 +0100, Lorenzo Pieralisi wrote:
> On Mon, Aug 27, 2018 at 02:28:37PM +0300, Leonard Crestez wrote:
> > On imx7d the pcie-phy power domain is turned off in suspend and this can
> > make the system hang after resume when attempting any read from PCI.
>
On Tue, 2018-07-24 at 19:14 +0300, Leonard Crestez wrote:
> Changes since v2:
> * Print with dev_info if link fails on resume (Lucas)
> * Add a comment on imx7d pci irq mappings (Andrey)
> * Make imx6_pcie_ltssm_disable print an error on IMX6Q (Lucas)
>
> The ltssm_disable
On Wed, 2018-08-08 at 12:14 +0100, Lorenzo Pieralisi wrote:
> On Wed, Aug 08, 2018 at 10:53:52AM +0000, Leonard Crestez wrote:
> > On Tue, 2018-07-24 at 19:14 +0300, Leonard Crestez wrote:
> > > Changes since v2:
> > > * Print with dev_info if link fails on resume (Lu
On Wed, 2018-08-08 at 15:19 +0100, Lorenzo Pieralisi wrote:
> On Wed, Aug 08, 2018 at 11:37:14AM +0000, Leonard Crestez wrote:
> > On Wed, 2018-08-08 at 12:14 +0100, Lorenzo Pieralisi wrote:
> > > On Wed, Aug 08, 2018 at 10:53:52AM +0000, Leonard Crestez wrote:
> > > &g
On Wed, 2018-08-08 at 16:27 +0100, Lorenzo Pieralisi wrote:
> On Wed, Aug 08, 2018 at 02:58:15PM +0000, Leonard Crestez wrote:
> > On Wed, 2018-08-08 at 15:19 +0100, Lorenzo Pieralisi wrote:
> > > On Wed, Aug 08, 2018 at 11:37:14AM +0000, Leonard Crestez wrote:
> > > &g
t is treated as optional with old DTB there should be
again no problem if reset and pci are merged out of order.
Shawn/Philipp/Lorenzo: Would it make sense to merge this series through a
single specific tree, such as the one for imx?
Link to v3: https://lkml.org/lkml/2018/7/24/713
Leonard Crestez (6)
This reverts commit 1c86c9dd82f859b474474a7fee0d5195da2c9c1d.
That commit followed the reference manual but unfortunately the imx7d
manual is incorrect.
Tested with ath9k pcie card and confirmed internally.
Signed-off-by: Leonard Crestez
Acked-by: Lucas Stach
---
arch/arm/boot/dts/imx7d.dtsi
t yet supported) has the exact same
PCIE_CTRL_APPS_TURNOFF bit in the same location.
Signed-off-by: Leonard Crestez
---
drivers/pci/controller/dwc/pci-imx6.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c
b/drivers/pci/controller/
This is required for the imx pci driver to send the PME_Turn_Off TLP.
Signed-off-by: Leonard Crestez
---
drivers/reset/reset-imx7.c | 1 +
include/dt-bindings/reset/imx7-reset.h | 4 +++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/reset/reset-imx7.c b
This is documented as "required" but won't be present in old dtbs.
These resets are also present on other imx chips but right now only
imx7d implements them through the reset controller subsystem.
Signed-off-by: Leonard Crestez
---
Documentation/devicetree/bindings/pci/fsl,imx
This is required for the imx pci driver to send the PME_Turn_Off TLP.
Signed-off-by: Leonard Crestez
---
arch/arm/boot/dts/imx7d.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index 7234e8330a57
.
Code is only for imx7d but a very similar sequence can be used for
other socs.
The original author is mostly Richard Zhu , this
patch adjusts the code to the upstream imx7d implemention using reset
controls and power domains.
Signed-off-by: Leonard Crestez
Reviewed-by: Lucas Stach
---
drivers
/1042
Leonard Crestez (3):
Revert "ARM: dts: imx7d: Invert legacy PCI irq mapping"
reset: imx7: Fix always writing bits as 0
PCI: imx: Initial imx7d pm support
arch/arm/boot/dts/imx7d.dtsi | 8 +--
drivers/pci/controller/dwc/pci-imx6.c | 95 +--
dri
This reverts commit 1c86c9dd82f859b474474a7fee0d5195da2c9c1d.
That commit followed the reference manual but unfortunately the imx7d
manual is incorrect.
Tested with ath9k pcie card and confirmed internally.
Signed-off-by: Leonard Crestez
---
arch/arm/boot/dts/imx7d.dtsi | 8
1 file
t for
other registers like MIPIPHY and HSICPHY the bits are explicitly
documented as "1 means assert, 0 means deassert".
The values are still reversed for IMX7_RESET_PCIE_CTRL_APPS_EN.
Signed-off-by: Leonard Crestez
Reviewed-by: Lucas Stach
---
drivers/reset/reset-imx7.c | 2 +-
1
.
Code is only for imx7d but a very similar sequence can be used for
other socs.
The original author is mostly Richard Zhu , this
patch adjusts the code to the upstream imx7d implemention using reset
controls and power domains.
Signed-off-by: Leonard Crestez
---
drivers/pci/controller/dwc/pci-imx6
On Mon, 2018-07-23 at 11:38 +0200, Lucas Stach wrote:
> Hi Leonard,
>
> Am Freitag, den 20.07.2018, 15:47 +0300 schrieb Leonard Crestez:
> > On imx7d the pcie-phy power domain is turned off in suspend and this can
> > make the system hang after resume when attempt
On Fri, 2018-07-20 at 08:33 -0700, Andrey Smirnov wrote:
> On Fri, Jul 20, 2018 at 5:48 AM Leonard Crestez
> wrote:
> >
> > This reverts commit 1c86c9dd82f859b474474a7fee0d5195da2c9c1d.
> >
> > That commit followed the reference manual but unfortunately the
This is one of the default lcdif panel options for several imx
development boards. Now that we switched to CONFIG_DRM_MXSFB=y this
should be enabled as well.
Signed-off-by: Leonard Crestez
---
arch/arm/configs/imx_v6_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm
On Mon, 2018-07-23 at 11:38 -0700, Andrey Smirnov wrote:
> On Mon, Jul 23, 2018 at 5:41 AM Leonard Crestez
> wrote:
> > On Fri, 2018-07-20 at 08:33 -0700, Andrey Smirnov wrote:
> > > On Fri, Jul 20, 2018 at 5:48 AM Leonard Crestez
> > > wrote:
> &
On Tue, 2018-07-24 at 09:46 +, Sven Schmitt wrote:
> Remove unused #defines.
This should be the title of the patch, "clean up" is too vague.
> --- a/drivers/soc/imx/gpc.c
> +++ b/drivers/soc/imx/gpc.c
> @@ -24,15 +24,11 @@
> #define GPC_PGC_CTRL_OFFS0x0
> #define GPC_PGC_PUPSCR_OFFS 0x
On Tue, 2018-07-24 at 09:46 +, Sven Schmitt wrote:
> Use GPC_PGC_DOMAIN_* indexes consistent.
>
> Signed-off-by: Sven Schmitt
Reviewed-by: Leonard Crestez
On Tue, 2018-07-24 at 09:46 +, Sven Schmitt wrote:
> imx6_pm_domain_power_off() reads iso and iso2sw from
> GPC_PGC_PUPSCR_OFFS
> which stores the power up delays.
> So use GPC_PGC_PDNSCR_OFFS for the correct delays.
>
> Signed-off-by: Sven Schmitt
Reviewed-by: Leonard
On Tue, 2018-07-24 at 12:09 +0200, Lucas Stach wrote:
> Am Montag, den 23.07.2018, 12:37 + schrieb Leonard Crestez:
> > On Mon, 2018-07-23 at 11:38 +0200, Lucas Stach wrote:
> > > Am Freitag, den 20.07.2018, 15:47 +0300 schrieb Leonard Crestez:
> > > > On imx7
This reverts commit 1c86c9dd82f859b474474a7fee0d5195da2c9c1d.
That commit followed the reference manual but unfortunately the imx7d
manual is incorrect.
Tested with ath9k pcie card and confirmed internally.
Signed-off-by: Leonard Crestez
---
arch/arm/boot/dts/imx7d.dtsi | 12
1
.
Code is only for imx7d but a very similar sequence can be used for
other socs.
The original author is mostly Richard Zhu , this
patch adjusts the code to the upstream imx7d implemention using reset
controls and power domains.
Signed-off-by: Leonard Crestez
---
drivers/pci/controller/dwc/pci-imx6
8/7/20/472
Leonard Crestez (2):
Revert "ARM: dts: imx7d: Invert legacy PCI irq mapping"
PCI: imx: Initial imx7d pm support
arch/arm/boot/dts/imx7d.dtsi | 12 ++--
drivers/pci/controller/dwc/pci-imx6.c | 97 +--
2 files changed, 100 insert
omain requires a way for pcie to
keep it active or it will break when displays are off.
The power-domains on imx6sx are meant to look like this:
power-domains = <&pd_disp>, <&pd_pci>;
power-domain-names = "pcie", "pcie_phy";
Signed-off-by: Leon
nstead the pm core won't even attempt to turn it off.
In theory on 6qp it is safe to turn PU off in suspend, however that is
best accomplished with a new core flag.
Signed-off-by: Leonard Crestez
---
drivers/soc/imx/gpc.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
Prev
Hello,
When using the schedutil governor together with the softlockup detector
all CPUs go to their maximum frequency on a regular basis. This seems
to be because the watchdog creates a RT thread on each CPU and this
causes regular kicks with:
cpufreq_update_this_cpu(rq, SCHED_CPUFREQ_RT);
T
On Mon, 2018-01-08 at 09:31 +0530, Viresh Kumar wrote:
> On 05-01-18, 23:18, Rafael J. Wysocki wrote:
> > On Fri, Jan 5, 2018 at 9:37 PM, Leonard Crestez
> > wrote:
> > > When using the schedutil governor together with the softlockup detector
> > > all CPUs g
On Mon, 2018-01-08 at 15:14 +, Patrick Bellasi wrote:
> On 08-Jan 15:20, Leonard Crestez wrote:
> > On Mon, 2018-01-08 at 09:31 +0530, Viresh Kumar wrote:
> > > On 05-01-18, 23:18, Rafael J. Wysocki wrote:
> > > > On Fri, Jan 5, 2018 at 9
On Tue, 2018-01-09 at 02:17 +0100, Rafael J. Wysocki wrote:
> On Mon, Jan 8, 2018 at 4:51 PM, Leonard Crestez wrote:
> > On Mon, 2018-01-08 at 15:14 +, Patrick Bellasi wrote:
> > > On 08-Jan 15:20, Leonard Crestez wrote:
> > > > On Mon, 2018-01-08 at 0
Hello,
I am using a toolchain with a broken/old version of perl which doesn't
include integer.pm and I noticed it triggers occasional build failures
on arch/arm64/crypto/sha512-core.S_shipped. Workarounds are easy, but
if the purpose of the .S_shipped is to avoid the need to have all
dependencies
On Thu, 2018-03-08 at 07:02 +, Ard Biesheuvel wrote:
> On 8 March 2018 at 05:00, Masahiro Yamada
> wrote:
> > 2018-03-08 4:25 GMT+09:00 Leonard Crestez > > If a decision to rerun the rule is made based on their relative
> > > timestamps but both .S_shipped and s
similar issue here: https://lkml.org/lkml/2018/3/8/1379
Signed-off-by: Leonard Crestez
Cc:
---
arch/arm/crypto/Makefile | 2 ++
arch/arm64/crypto/Makefile | 2 ++
2 files changed, 4 insertions(+)
Not clear if this needs to go through crypto or arm but all commits in these
directories start with
On Tue, 2018-11-20 at 21:42 +0100, Stefan Agner wrote:
> On 20.11.2018 20:13, Trent Piepho wrote:
> > On Tue, 2018-11-20 at 18:19 +, Leonard Crestez wrote:
> > > On Tue, 2018-11-20 at 17:56 +0100, Stefan Agner wrote:
> > > > Define the length of the DBI r
Hello,
On a build farm at NXP we found that linux-next now fails on simple
loopback tests on imx6sx-sdb (but not other SOCs AFAICT). I tracked
this down to commit 30fdd51be161
("ARM: imx_v6_v7_defconfig: add CONFIG_FW_LOADER_USER_HELPER")
All that does is enable loading SDMA firmware from rootfs,
On 11/26/18 8:24 PM, Andrey Smirnov wrote:
> On Tue, Nov 20, 2018 at 2:49 AM Leonard Crestez
> wrote:
>> On Sat, 2018-11-17 at 10:12 -0800, Andrey Smirnov wrote:
>>> + if (of_property_read_u32_array(
>>> +
On 11/27/18 12:06 PM, Lucas Stach wrote:
> Hi Andrey,
>
> Am Montag, den 26.11.2018, 10:24 -0800 schrieb Andrey Smirnov:
>> On Tue, Nov 20, 2018 at 2:49 AM Leonard Crestez
>> wrote:
>>>
>>> On Sat, 2018-11-17 at 10:12 -0800, Andrey Smirnov wrote
On Mon, 2018-11-19 at 10:41 +0100, Stefan Agner wrote:
> Define the length of the DBI registers. This makes sure that
> the kernel does not access registers beyond that point, avoiding
> the following abort on a i.MX 6Quad:
> # cat /sys/devices/soc0/soc/1ffc000.pcie/pci\:00/\:00\:00.0/con
On Sat, 2018-11-17 at 10:12 -0800, Andrey Smirnov wrote:
> @@ -921,7 +1004,28 @@ static int imx6_pcie_probe(struct platform_device *pdev)
> - case IMX7D:
> + case IMX8MQ:
> + if (of_property_read_u32(node, "fsl,iomux-gpr1x",
> + &imx6_pcie->g
From: Stefan Agner
> On 20.11.2018 11:22, Leonard Crestez wrote:
> > On Mon, 2018-11-19 at 10:41 +0100, Stefan Agner wrote:
> >> Define the length of the DBI registers. This makes sure that
> >> the kernel does not access registers beyond that point, avoiding
> &g
On Tue, 2018-11-20 at 17:56 +0100, Stefan Agner wrote:
> Define the length of the DBI registers. This makes sure that
> the kernel does not access registers beyond that point, avoiding
> the following abort on a i.MX 6Quad:
> # cat
> /sys/devices/soc0/soc/1ffc000.pcie/pci\:00/\:00\:00.0/c
On 11/20/2018 11:28 PM, Trent Piepho wrote:
> On Tue, 2018-11-20 at 21:42 +0100, Stefan Agner wrote:
>> On 20.11.2018 20:13, Trent Piepho wrote:
>>> It also seems to me that this doesn't need to be in the internal pci
>>> config access functions. The driver shouldn't be reading registers
>>> that
On 11/27/18 11:15 PM, Andrey Smirnov wrote:
> On Tue, Nov 27, 2018 at 2:46 AM Leonard Crestez
> wrote:
>> On 11/27/18 12:06 PM, Lucas Stach wrote:
>>> Am Montag, den 26.11.2018, 10:24 -0800 schrieb Andrey Smirnov:
>>>> On Tue, Nov 20, 2018 at 2:49 AM Leonard C
On Wed, 2018-11-28 at 18:36 +0100, Stefan Agner wrote:
> On 28.11.2018 13:19, Stefan Agner wrote:
> > On 21.11.2018 14:47, Leonard Crestez wrote:
> > > My tests show that this series breaks pci cards on 6qdl and I
> > > think it should be reverted until a fix is found.
On Wed, 2018-11-14 at 17:21 -0500, Sasha Levin wrote:
> From: Leonard Crestez
>
> [ Upstream commit 1ad9fb750a104f51851c092edd7b3553f0218428 ]
>
> Bindings for "fixed-regulator" only explicitly support "gpio" property,
> not "gpios". Fix by cor
On Tue, 2018-12-04 at 17:55 +0100, Stefan Agner wrote:
> Define the length of the DBI registers. This makes sure that
> the kernel does not access registers beyond that point, avoiding
> the following abort on a i.MX 6Quad:
> # cat /sys/devices/soc0/soc/1ffc000.pcie/pci\:00/\:00\:00.0/con
Fixes: 7d1cd2978664 ("ARM: dts: imx6ul: add gpmi support")
Signed-off-by: Leonard Crestez
---
arch/arm/boot/dts/imx6ul.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index 083d3446c41d..93ca2405a
ned-off-by: Leonard Crestez
---
arch/arm/boot/dts/Makefile | 203 -
1 file changed, 19 insertions(+), 184 deletions(-)
If useful in v2 the wilddt function can be split into a separate patch
for "scripts/Makefile.lib"
A few other arches also have DT wi
On 11/10/18 7:37 PM, Martin Kaiser wrote:
> The commit that added scu based pinctrl support introduced a regression
> for the mmio case. In the for-loop where the maps are initialized, we
> end up creating a partially initialized map in some cases. This causes a
> kernel panic when such a map is us
On imx6qp power gating on the PU domain is disabled because of errata
ERR009619. However power gating on suspend/resume can still work.
Enable this by calling the on/off functions directly from suspend code in
mach-imx.
Signed-off-by: Leonard Crestez
---
arch/arm/mach-imx/gpc.c | 10
has quite a lot of changes in gpc code and this causes
a lot of trouble when doing upgrades so I am trying to push some of the
internal features upstream.
Maybe instead of direct calls from mach-imx the gpc could implement
SLEEP_PM_OPS instead? It would still need a way to access the pgc
devices di
Simplify the code by doing less dynamic allocation.
This also allows easier direct manipulation of individual power domains.
Signed-off-by: Leonard Crestez
---
drivers/soc/imx/gpc.c | 35 +--
1 file changed, 17 insertions(+), 18 deletions(-)
diff --git a
On Mon, 2018-07-02 at 14:15 +0200, Lucas Stach wrote:
> Am Montag, den 02.07.2018, 14:52 +0300 schrieb Leonard Crestez:
> > With current code (even without my patches) attempting to dynamically
> > remove/probe the GPC fils since since the per-pgc platform_device
> > inst
On Fri, 2018-06-08 at 16:33 +0200, Lucas Stach wrote:
> Am Dienstag, den 29.05.2018, 22:39 +0300 schrieb Leonard Crestez:
> > On imx7d the phy is turned off in suspend and must be reset on resume.
> > Right now lspci -v fails after a suspend/resume cycle, fix this by
> > a
eferencing the newly-defined &pu_disp domain from &lcdif.
Signed-off-by: Leonard Crestez
---
arch/arm/boot/dts/imx6sl.dtsi | 36 +++
1 file changed, 32 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/im
rrata here, treat it like on 6qp.
Previous version included a patch to improve lcdif power management, but
since ERR006287 effectively disables runtime PM for display it is no
longer strictly required.
This doesn't depend on other GPC patches I sent either, it's an
unrelated fix.
Leo
on the
display power domain.
"""
Link: https://www.nxp.com/docs/en/errata/IMX6SLCE.pdf#page=62
Handle this in linux in the same way as imx6qp ERR009619: make the DISP
domain return -EBUSY on power_off.
Signed-off-by: Leonard Crestez
---
drivers/soc/imx/gpc.c | 10 ++
On Tue, 2018-07-03 at 10:42 +0200, Lucas Stach wrote:
> Am Montag, den 02.07.2018, 17:18 + schrieb Leonard Crestez:
> > On Fri, 2018-06-08 at 16:33 +0200, Lucas Stach wrote:
> > > Am Dienstag, den 29.05.2018, 22:39 +0300 schrieb Leonard Crestez:
> > > > On
On Tue, 2018-07-10 at 00:33 +0200, Ulf Hansson wrote:
> On 9 July 2018 at 14:23, Leonard Crestez
> wrote:
> > The imx6sl chip errata document describes ERR006287 like this:
> >
> > """
> > Upon resuming from power gating, the modules in the displa
t; Signed-off-by: Mikko Perttunen
Yes, sorry I missed this.
Reviewed-by: Leonard Crestez
Maybe a static __clk_free_mem function could be created instead of
comments asking to keep things in sync? But there are only 2 lines so
it's fine.
isplay power domain.
Link: https://www.nxp.com/docs/en/errata/IMX6SLCE.pdf#page=62
Handle this in the safest possible way by keeping the DISP domain
always-on.
Signed-off-by: Leonard Crestez
---
drivers/soc/imx/gpc.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/soc/imx
pport.
Link to v2: https://lkml.org/lkml/2018/7/9/447
Leonard Crestez (2):
soc: imx: gpc: Disable 6sl display power gating for ERR006287
ARM: dts: imx6sl: Convert gpc to new bindings
arch/arm/boot/dts/imx6sl.dtsi | 35 +++
drivers/soc/imx/gpc.c
eferencing the newly-defined &pu_disp domain from &lcdif.
Signed-off-by: Leonard Crestez
---
arch/arm/boot/dts/imx6sl.dtsi | 35 +++
1 file changed, 31 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/im
On Wed, 2018-07-11 at 14:16 +0200, Lucas Stach wrote:
> Am Mittwoch, den 11.07.2018, 15:11 +0300 schrieb Leonard Crestez:
> > Handle this in the safest possible way by keeping the DISP domain
> > always-on.
> >
> > Signed-off-by: Leonard Crestez
>
> Reviewed-by:
This makes it possible to enable earlycon for debugging by just passing
an empty "earlycon" argument on the kernel command-line.
Signed-off-by: Leonard Crestez
---
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 4
arch/arm/boot/dts/imx6sl-evk.dts | 4
arch/arm/boot/d
29018
* CONFIG_MAG3110
* CONFIG_MMA8452
Tested with raw reads from iio sysfs.
Signed-off-by: Leonard Crestez
---
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 21 +
1 file changed, 21 insertions(+)
Changes since v1:
* adjusted node names (Fabio)
Link: https://lkml.org/lkml/2018/6/7/970
CONFIG_SENSORS_ISL29018 supports isil,il29023 light sensor
CONFIG_MMA8452 supports fsl,mma8451 accelerometer
CONFIG_MAG3110 for fsl,mag3110 is already enabled
Signed-off-by: Leonard Crestez
Reviewed-by: Fabio Estevam
---
arch/arm/configs/imx_v6_v7_defconfig | 2 ++
1 file changed, 2
transceiver so remove the first definition.
The second definition entirely overrides the first so this already
worked and this patch results in no DTB change, just a cleanup.
Signed-off-by: Leonard Crestez
---
arch/arm/boot/dts/imx7d-sdb.dts | 8
1 file changed, 8 deletions(-)
diff --git a
If the gpc device is removed the platform_devices for its
imx-pgc-power-domains are still registered and trying to probe gpc again
results in an error.
Fix this by iterating children inside imx_gpc_remove and calling
platfrom_device_unregister.
Signed-off-by: Leonard Crestez
---
drivers/soc
On imx6qp power gating on the PU domain is disabled because of errata
ERR009619. However power gating during suspend/resume can still be
performed.
Enable this by implementing SLEEP_PM_OPS in imx_pgc_power_domain_driver.
Signed-off-by: Leonard Crestez
---
drivers/soc/imx/gpc.c | 72
the PU domain to the pgc platform_device.
Signed-off-by: Leonard Crestez
---
drivers/soc/imx/gpc.c | 88 +++
1 file changed, 73 insertions(+), 15 deletions(-)
Link to v2: https://lkml.org/lkml/2018/7/5/564
Changes since v2: Add device links on attach
The
On Thu, 2018-06-07 at 14:07 -0300, Fabio Estevam wrote:
> Hi Leonard,
>
> On Thu, Jun 7, 2018 at 2:00 PM, Leonard Crestez
> wrote:
>
> > +
> > + isl29023@44 {
>
> According to Devicetree Specification v0.2 document:
>
> "T
On Mon, 2018-12-17 at 20:07 -0800, Andrey Smirnov wrote:
> Add code needed to support i.MX8MQ variant.
> static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)
> {
> +
> +
Remove empty lines?
> + unsigned int mask, val, offset;
> +
> + mask = IMX6Q_GPR12_DEVICE_TYPE;
> + val =
On 12/18/2018 5:15 PM, Rob Herring wrote:
> On Mon, Dec 17, 2018 at 08:07:02PM -0800, Andrey Smirnov wrote:
>> Add code needed to support i.MX8MQ variant.
>>
>> Signed-off-by: Andrey Smirnov
>> Reviewed-by: Lucas Stach
>> --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
>> +++ b/Do
On 12/17/2018 1:09 AM, Andrey Smirnov wrote:
> In order to avoid having potentially ever growing list of variants
> that don't support methods implemented in imx6_pcie_reset_phy() and
> imx6_setup_phy_mpll(), change logical checks in the to check for SoC's
> that _do_ support what they implement. W
On 12/20/2018 3:22 AM, Trent Piepho wrote:
> On Wed, 2018-12-19 at 16:47 -0800, Andrey Smirnov wrote:
This series initially added explicit offsets but I suggested a single
"controller-id" because:
* There are multiple bit and byte offsets
* Other imx8 SOCs also have 2x pc
pplied by internal regulator."
The current pd_pcie is actually only for PCIE_PHY, the PCIE ip block is
actually inside the DISPLAY domain. Handle this by adding the pcie node
in both power domains.
Signed-off-by: Leonard Crestez
---
arch/arm/boot/dts/imx6sx.dtsi | 19 ++-
1 file
Use the wilddt function instead of listing imx6/7 dts files. This
shrinks the makefile and avoids needing future changes when boards are
added.
Signed-off-by: Leonard Crestez
---
arch/arm/boot/dts/Makefile | 201 ++---
1 file changed, 11 insertions(+), 190
: Leonard Crestez
---
scripts/Kbuild.include | 6 ++
1 file changed, 6 insertions(+)
diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include
index 46bf1a073f5d..6b8c0cca07c1 100644
--- a/scripts/Kbuild.include
+++ b/scripts/Kbuild.include
@@ -197,10 +197,16 @@ clean := -f $(srctree
ad of $(dtstree)
* Also use wilddt in arm64/boot/dts/freescale
Series is against next-20190107, conflicts are to be expected as board
list keeps changing.
Leonard Crestez (3):
kbuild: Add wilddt function
ARM: dts: imx: Use wilddt function
arm64: dts: freescale: Use wilddt function
arch/arm/bo
Use the wilddt function instead of listing dts files. This shrinks the
makefile and avoids needing future changes when boards are added.
Signed-off-by: Leonard Crestez
---
arch/arm64/boot/dts/freescale/Makefile | 25 -
1 file changed, 4 insertions(+), 21 deletions
Hello,
My Acer Nitro 5 AN515-42 laptop with a Ryzen 2700U hangs on boot with
recent kernel on an interrupt storm from pinctrl-amd.
Older kernels work but this seems to be because this module was disabled
by default. I tried to copy over old driver from 4.9 but it still
experiences same issue.
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