On Tue, Apr 30, 2019 at 11:11:51AM -0500, Bjorn Helgaas wrote:
> > I'm not convinced a revert is the best call.
>
> I have very limited options at this stage of the release, but I'd be
> glad to hear suggestions. My concern is that if we release v5.1
> as-is, we'll spend a lot of energy on those
On Tue, Apr 30, 2019 at 12:05:09PM -0600, Keith Busch wrote:
> On Tue, Apr 30, 2019 at 11:11:51AM -0500, Bjorn Helgaas wrote:
> > > I'm not convinced a revert is the best call.
> >
> > I have very limited options at this stage of the release, but I'd be
> &g
On Tue, Apr 30, 2019 at 09:12:49PM -0500, Bjorn Helgaas wrote:
> On Tue, Apr 30, 2019 at 12:18:13PM -0600, Keith Busch wrote:
> > On Tue, Apr 30, 2019 at 12:05:09PM -0600, Keith Busch wrote:
> > > On Tue, Apr 30, 2019 at 11:11:51AM -0500, Bjorn Helgaas wrote:
> > > >
On Thu, May 02, 2019 at 05:59:17PM +0900, Akinobu Mita wrote:
> This enables to capture snapshot of controller information via device
> coredump machanism, and it helps diagnose and debug issues.
>
> The nvme device coredump is triggered before resetting the controller
> caused by I/O timeout, and
On Fri, May 03, 2019 at 12:20:17AM +0300, Maxim Levitsky wrote:
> On Thu, 2019-05-02 at 15:12 -0600, Heitke, Kenneth wrote:
> > On 5/2/2019 5:47 AM, Maxim Levitsky wrote:
> > > +static void nvme_ext_queue_free(struct nvme_ctrl *ctrl, u16 qid)
> > > +{
> > > + struct nvme_dev *dev = to_nvme_dev(ctrl
On Fri, May 03, 2019 at 12:38:08PM +0900, Akinobu Mita wrote:
> 2019年5月2日(木) 22:03 Keith Busch :
> > On Thu, May 02, 2019 at 05:59:17PM +0900, Akinobu Mita wrote:
> > > This enables to capture snapshot of controller information via device
> > > coredump machanism, and
On Thu, May 02, 2019 at 08:59:39PM -0700, Frederick Lawler wrote:
> +#define dev_fmt(fmt) "DPC: " fmt
> +
> @@ -110,7 +111,7 @@ static int dpc_wait_rp_inactive(struct dpc_dev *dpc)
> + pci_warn(pdev, "DPC root port still busy\n");
> @@ -229,18 +229,17 @@ static irqreturn_t dpc_handler
,12
> irq 33, cpu list 0-1
> irq 34, cpu list 3,5
> irq 35, cpu list 6-7
> irq 36, cpu list 8-9
> irq 37, cpu list 11,13
> irq 38, cpu list 14-15
>
> Without this patch, kernel warning is triggered on above situation, and
> allocation
On Thu, Aug 08, 2019 at 01:39:54PM -0500, Bjorn Helgaas wrote:
> On Thu, Aug 08, 2019 at 04:47:45PM +0200, Rafael J. Wysocki wrote:
> > On Thu, Aug 8, 2019 at 3:43 PM Bjorn Helgaas wrote:
> >
> > > IIUC the NVMe device will go to the desired package idle state if
> > > the link is in L0s or L1, b
The v3 series looks good to me.
Reviewed-by: Keith Busch
Bjorn,
If you're okay with the series, we can either take it through nvme,
or you can feel free to apply through pci, whichever you prefer.
Thanks,
Keith
On Thu, Aug 08, 2019 at 10:46:06PM +, Derrick, Jonathan wrote:
> On Thu, 2019-08-08 at 10:32 -0600, Keith Busch wrote:
> >
> > I think the real problem is the spread's vecs_per_node doesn't account
> > which nodes contribute more CPUs than others. For example
ctor for left nodes if 'numvecs' vectors
> have been spread.
>
> Also, if the specified cpumask for one numa node is empty, simply not
> spread vectors on this node.
>
> Cc: Christoph Hellwig
> Cc: Keith Busch
> Cc: linux-n...@lists.infradead.
On Fri, Aug 09, 2019 at 01:05:42AM -0700, Rafael J. Wysocki wrote:
> On Fri, Aug 9, 2019 at 12:16 AM Keith Busch wrote:
> >
> > The v3 series looks good to me.
> >
> > Reviewed-by: Keith Busch
> >
> > Bjorn,
> >
> > If you're okay with th
On Fri, Aug 09, 2019 at 12:28:43PM +0200, Lukas Wunner wrote:
> A sysfs request to enable or disable a PCIe hotplug slot should not
> return before it has been carried out. That is sought to be achieved
> by waiting until the controller's "pending_events" have been cleared.
>
> However the IRQ th
On Wed, Jul 31, 2019 at 11:25:51PM +0200, Rafael J. Wysocki wrote:
>
> A couple of remarks if you will.
>
> First, we don't know which case is the majority at this point. For
> now, there is one example of each, but it may very well turn out that
> the SK Hynix BC501 above needs to be quirked.
>
On Thu, Aug 01, 2019 at 02:05:54AM -0700, Kai-Heng Feng wrote:
> at 06:33, Rafael J. Wysocki wrote:
> > On Thu, Aug 1, 2019 at 12:22 AM Keith Busch wrote:
> >
> >> In which case we do need to reintroduce the HMB handling.
> >
> > Right.
>
> The pa
On Wed, Jul 03, 2019 at 01:46:19PM -0700,
sathyanarayanan.kuppusw...@linux.intel.com wrote:
> +#ifdef CONFIG_PCI_PRI
> +static void pci_pri_init(struct pci_dev *pdev)
> +{
> + u32 max_requests;
> + int pos;
> +
> + /*
> + * As per PCIe r4.0, sec 9.3.7.11, only PF is permitted to
>
On Thu, Aug 01, 2019 at 02:21:07PM -0700, sathyanarayanan kuppuswamy wrote:
> On 8/1/19 2:09 PM, Keith Busch wrote:
> > Rather than surround the call to pci_pri_init() with the #ifdef, you
> > should provide an empty function implementation when CONFIG_PCI_PRI is
> > not de
On Thu, Jul 25, 2019 at 02:51:41AM -0700, Rafael J. Wysocki wrote:
> Hi Keith,
>
> Unfortunately,
>
> commit d916b1be94b6dc8d293abed2451f3062f6af7551
> Author: Keith Busch
> Date: Thu May 23 09:27:35 2019 -0600
>
> nvme-pci: use host managed power sta
On Tue, Jul 23, 2019 at 01:21:50PM -0700,
sathyanarayanan.kuppusw...@linux.intel.com wrote:
> From: Kuppuswamy Sathyanarayanan
>
> Currently, in native mode, DPC driver is configured to trigger DPC only
> for FATAL errors and hence it only supports port recovery for FATAL
> errors. But with Erro
On Thu, Jul 25, 2019 at 09:48:57PM +0200, Rafael J. Wysocki wrote:
> NVME Identify Controller:
> vid : 0x1c5c
> ssvid : 0x1c5c
> sn : MS92N171312902J0N
> mn : PC401 NVMe SK hynix 256GB
> fr : 80007E00
> rab : 2
> ieee: ace42e
> cmic: 0
> mdts:
On Thu, Jul 25, 2019 at 02:28:28PM -0600, Logan Gunthorpe wrote:
>
>
> On 2019-07-25 1:58 p.m., Keith Busch wrote:
> > On Thu, Jul 25, 2019 at 11:54:18AM -0600, Logan Gunthorpe wrote:
> >>
> >>
> >> On 2019-07-25 11:50 a.m., Matthew Wilcox wrote:
>
then I'll implement the "proper" way
> sometimes this week, adding a way to shrink the AQ down to something
> like 3 (one admin request, one async event (AEN), and the empty slot)
> by making a bunch of the constants involved variables instead.
I don't feel too strongly about it. I think your patch is fine, so
Acked-by: Keith Busch
siter a memory notifier callback and register the memory attributes
the first time its node is brought online if it wasn't registered.
Signed-off-by: Keith Busch
---
drivers/acpi/hmat/hmat.c | 75
1 file changed, 57 insertions(+), 18 deletion
Instead of registering the hmat cache attributes in line with parsing
the table, save the attributes in the memory target and register them
after parsing completes. This will make it easier to register the
attributes later when hot add is supported.
Tested-by: Brice Goglin
Signed-off-by: Keith
From: Keith Busch
Hi Rafael,
These are just some fixes from a while ago to work correctly with memory
node onlining, but haven't been merged in yet. I've included a fix from
Dan, but had to modify it slightly for conflicts. I think it makes most
sense for this to go through the acpi
: Invalid table"
...result for HMAT parsing.
Reviewed-by: Dave Hansen
Reviewed-by: Keith Busch
Acked-by: Rafael J. Wysocki
Signed-off-by: Dan Williams
---
drivers/acpi/hmat/hmat.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/acpi/hmat/hmat.c
o something
> > > like 3 (one admin request, one async event (AEN), and the empty slot)
> > > by making a bunch of the constants involved variables instead.
> >
> > I don't feel too strongly about it. I think your patch is fine, so
> >
> > Acked-by: Kei
On Tue, Jul 30, 2019 at 03:45:31AM -0700, Rafael J. Wysocki wrote:
> So I can reproduce this problem with plain 5.3-rc1 and the patch below fixes
> it.
>
> Also Mario reports that the same patch needs to be applied for his 9380 to
> reach
> SLP_S0 after some additional changes under testing/revi
On Fri, Jul 19, 2019 at 03:31:02PM +1000, Benjamin Herrenschmidt wrote:
> From 8dcba2ef5b1466b023b88b4eca463b30de78d9eb Mon Sep 17 00:00:00 2001
> From: Benjamin Herrenschmidt
> Date: Fri, 19 Jul 2019 15:03:06 +1000
> Subject:
>
> Another issue with the Apple T2 based 2018 controllers seem to be
On Wed, Jul 31, 2019 at 02:50:01AM +0800, Kai-Heng Feng wrote:
>
> Just did a quick test, this patch regress SK Hynix BC501, the SoC stays at
> PC3 once the patch is applied.
Okay, I'm afraid device/platform quirks may be required unless there are
any other ideas out there.
I'm not a big fan of
On Tue, Jul 30, 2019 at 09:05:22PM +, mario.limoncie...@dell.com wrote:
> > -Original Message-
> > From: Keith Busch
> > Sent: Tuesday, July 30, 2019 2:20 PM
> > To: Kai-Heng Feng
> > Cc: Limonciello, Mario; r...@rjwysocki.net; keith.bu...@inte
On Wed, Aug 07, 2019 at 02:53:44AM -0700, Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki
>
> One of the modifications made by commit d916b1be94b6 ("nvme-pci: use
> host managed power state for suspend") was adding a pci_save_state()
> call to nvme_suspend() in order to prevent the PCI bus-lev
On Thu, Aug 08, 2019 at 09:04:28AM +0200, Thomas Gleixner wrote:
> On Wed, 7 Aug 2019, Jon Derrick wrote:
> > The current irq spreading algorithm spreads vectors amongst cpus evenly
> > per node. If a node has more cpus than another node, the extra vectors
> > being spread may not be reported back
On Thu, Jun 13, 2019 at 01:27:05PM -0700, Rafael J. Wysocki wrote:
> On Wednesday, May 15, 2019 11:54:43 PM CEST Keith Busch wrote:
> > Instead of registering the hmat cache attributes in line with parsing
> > the table, save the attributes in the memory target and register them
&g
gt;
> if (ctrl->cntlid != le16_to_cpu(id->cntlid))
>
> below will always be a no-op.
Yeah, this bug defeats the fabrics sanity check. Good catch.
Reviewed-by: Keith Busch
> diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c
> index 2e65be8b1387..1ec87b30fa
query this information.
Signed-off-by: Keith Busch
---
Documentation/admin-guide/mm/numaperf.rst | 184 ++
1 file changed, 184 insertions(+)
create mode 100644 Documentation/admin-guide/mm/numaperf.rst
diff --git a/Documentation/admin-guide/mm/numaperf.rst
b
Systems may provide different memory types and export this information
in the ACPI Heterogeneous Memory Attribute Table (HMAT). Parse these
tables provided by the platform and report the memory access and caching
attributes.
Signed-off-by: Keith Busch
---
drivers/acpi/Kconfig | 8
The Heterogeneous Memory Attribute Table (HMAT) header has different
field lengths than the existing parsing uses. Add the HMAT type to the
parsing rules so it may be generically parsed.
Cc: Dan Williams
Signed-off-by: Keith Busch
---
drivers/acpi/tables.c | 9 +
include/linux/acpi.h
Add descriptions for memory class initiator performance access attributes.
Signed-off-by: Keith Busch
---
Documentation/ABI/stable/sysfs-devices-node | 28
1 file changed, 28 insertions(+)
diff --git a/Documentation/ABI/stable/sysfs-devices-node
b/Documentation
ters the best performing class, "class0".
Various changelog and documentation updates and clarifications.
Keith Busch (13):
acpi: Create subtable parsing infrastructure
acpi: Add HMAT to generic parsing tables
acpi/hmat: Parse and report heterogeneous memory
node: Link memory nodes to
HMAT requires valid address ranges have an equivalent SRAT entry,
verify each memory target satisfies this requirement.
Signed-off-by: Keith Busch
---
drivers/acpi/hmat.c | 143 +---
1 file changed, 136 insertions(+), 7 deletions(-)
diff --git a/dr
Add the attributes for the system memory side caches.
Signed-off-by: Keith Busch
---
Documentation/ABI/stable/sysfs-devices-node | 34 +
1 file changed, 34 insertions(+)
diff --git a/Documentation/ABI/stable/sysfs-devices-node
b/Documentation/ABI/stable/sysfs
parsing
the entries array may be more reused for all ACPI system tables and
the common code doesn't need to be duplicated.
Reviewed-by: Rafael J. Wysocki
Cc: Dan Williams
Signed-off-by: Keith Busch
---
arch/arm64/kernel/acpi_numa.c | 2 +-
arch/arm64/kernel/
Register memory side cache attributes with the memory's node if HMAT
provides the side cache iniformation table.
Signed-off-by: Keith Busch
---
drivers/acpi/hmat.c | 32
1 file changed, 32 insertions(+)
diff --git a/drivers/acpi/hmat.c b/drivers/acpi/h
on is reflected in the nodelist:
# cat /sys/devices/system/node/nodeX/class0/target_nodelist
Y
# cat /sys/devices/system/node/nodeY/class0/initiator_nodelist
X
Signed-off-by: Keith Busch
---
drivers/base/node.c | 127 ++-
include/linux/node
eported here. When a subsystem makes use of this interface, initiators
of a lower class number, "Z", have better performance relative to higher
class numbers. When provided, class 0 is the highest performing access
class.
Signed-off-by: Keith Busch
---
drivers/base/Kconfig
Add entries for memory initiator and target node class attributes.
Signed-off-by: Keith Busch
---
Documentation/ABI/stable/sysfs-devices-node | 25 -
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/Documentation/ABI/stable/sysfs-devices-node
b
Save the best performace access attributes and register these with the
memory's node if HMAT provides the locality table. While HMAT does make
it possible to know performance for all possible initiator-target
pairings, we export only the best pairings at this time.
Signed-off-by: Keith
the cache size, the line size, associativity,
and write back policy.
Signed-off-by: Keith Busch
---
drivers/base/node.c | 142 +++
include/linux/node.h | 39 ++
2 files changed, 181 insertions(+)
diff --git a/drivers/base/node.c b
: Slot #36 AttnBtn- PwrCtrl- MRL- AttnInd+
> PwrInd+ HotPlug+ Surprise+ Interlock- NoCompl- LLActRep+
Acked-by: Keith Busch
> diff --git a/drivers/pci/hotplug/pciehp_hpc.c
> b/drivers/pci/hotplug/pciehp_hpc.c
> index 7dd443aea5a5..2761778f2ecc 100644
> --- a/drivers/pci/h
On Mon, Mar 11, 2019 at 11:20:41AM +, Jonathan Cameron wrote:
> On Wed, 27 Feb 2019 15:50:35 -0700
> Keith Busch wrote:
> > +static __init void hmat_register_target_initiators(struct memory_target
> > *target)
> > +{
> > + static DECLARE_BITMAP(p_nodes,
On Mon, Mar 11, 2019 at 04:38:43AM -0700, Jonathan Cameron wrote:
> On Wed, 27 Feb 2019 15:50:38 -0700
> Keith Busch wrote:
>
> > Platforms may provide system memory where some physical address ranges
> > perform differently than others, or is side cached by the system.
>
parsing
the entries array may be more reused for all ACPI system tables and
the common code doesn't need to be duplicated.
Reviewed-by: Rafael J. Wysocki
Acked-by: Jonathan Cameron
Tested-by: Jonathan Cameron
Signed-off-by: Keith Busch
---
arch/arm64/kernel/acpi_numa.c | 2 +-
wishing to query this information.
Reviewed-by: Mike Rapoport
Reviewed-by: Jonathan Cameron
Signed-off-by: Keith Busch
---
Documentation/admin-guide/mm/numaperf.rst | 169 ++
1 file changed, 169 insertions(+)
create mode 100644 Documentation/admin-guide/mm
relative: /sys/devices/system/node/nodeY/access0/initiators/nodeX ->
../../nodeX
The new attributes are added to the sysfs stable documentation.
Reviewed-by: Jonathan Cameron
Signed-off-by: Keith Busch
---
Documentation/ABI/stable/sysfs-devices-node | 25 -
dri
x27;s sysfs directory.
Since HMAT requires valid address ranges have an equivalent SRAT entry,
verify each memory target satisfies this requirement.
Reviewed-by: Jonathan Cameron
Signed-off-by: Keith Busch
---
drivers/acpi/hmat/Kconfig | 3 +-
drivers/acpi/hmat/hmat.c
Register memory side cache attributes with the memory's node if HMAT
provides the side cache iniformation table.
Acked-by: Rafael J. Wysocki
Signed-off-by: Keith Busch
---
drivers/acpi/hmat/hmat.c | 32
1 file changed, 32 insertions(+)
diff --git a/dr
s and libraries. Those applications may query performance
attributes relative to a particular CPU they're running on in order to
make more informed choices for where they want to allocate hot and cold
data. This works with mbind() or the numactl library.
Keith Busch (10):
acpi: Create subtable pa
The Heterogeneous Memory Attribute Table (HMAT) header has different
field lengths than the existing parsing uses. Add the HMAT type to the
parsing rules so it may be generically parsed.
Reviewed-by: Rafael J. Wysocki
Acked-by: Jonathan Cameron
Tested-by: Jonathan Cameron
Signed-off-by: Keith
socki
Signed-off-by: Keith Busch
---
drivers/acpi/hmat/Kconfig | 5 -
drivers/acpi/hmat/hmat.c | 10 +-
2 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/acpi/hmat/Kconfig b/drivers/acpi/hmat/Kconfig
index 13cddd612a52..95a29964dbea 100644
--- a/drivers/acpi
: Jonathan Cameron
Tested-by: Jonathan Cameron
Signed-off-by: Keith Busch
---
drivers/acpi/Kconfig | 1 +
drivers/acpi/Makefile | 1 +
drivers/acpi/hmat/Kconfig | 7 ++
drivers/acpi/hmat/Makefile | 1 +
drivers/acpi/hmat/hmat.c | 236 +
5
mbers, or
omitted from the any access class' initiators.
Descriptions for memory access initiator performance access attributes
are added to sysfs stable documentation.
Acked-by: Jonathan Cameron
Tested-by: Jonathan Cameron
Signed-off-by: Keith Busch
---
Documentation/ABI/stable/sysfs-device
-by: Keith Busch
---
Documentation/ABI/stable/sysfs-devices-node | 34 +++
drivers/base/node.c | 151
include/linux/node.h| 39 +++
3 files changed, 224 insertions(+)
diff --git a/Documentation/ABI/stable/sysfs
ew for the whole series
if you spin a v3 for the other minor comments.
Reviewed-by: Keith Busch
> +static void nvme_calc_irq_sets(struct irq_affinity *affd, int nvecs)
> +{
> + struct nvme_dev *dev = affd->priv;
> +
> + nvme_calc_io_queues(dev, nvecs);
> +
> +
On Tue, Feb 12, 2019 at 08:49:03AM +, Jonathan Cameron wrote:
> On Mon, 11 Feb 2019 08:23:04 -0700
> Keith Busch wrote:
>
> > On Sun, Feb 10, 2019 at 09:19:58AM -0800, Jonathan Cameron wrote:
> > > On Sat, 9 Feb 2019 09:20:53 +0100
> > > Brice Goglin wr
On Tue, Feb 12, 2019 at 04:49:24PM +, Jonathan Cameron wrote:
> + case ACPI_SRAT_TYPE_GENERIC_INITIATOR_AFFINITY:
> + {
> + struct acpi_srat_gi_affinity *p =
> + (struct acpi_srat_gi_affinity *)header;
> + char name[9] = {};
> +
> +
On Wed, Feb 13, 2019 at 09:56:36PM +0100, Thomas Gleixner wrote:
> On Wed, 13 Feb 2019, Bjorn Helgaas wrote:
> > On Wed, Feb 13, 2019 at 06:50:37PM +0800, Ming Lei wrote:
> > > We have to ask driver to re-caculate set vectors after the whole IRQ
> > > vectors are allocated later, and the result nee
On Wed, Feb 13, 2019 at 10:41:55PM +0100, Thomas Gleixner wrote:
> Btw, while I have your attention. There popped up an issue recently related
> to that affinity logic.
>
> The current implementation fails when:
>
> /*
> * If there aren't any vectors left after applying the pre/p
On Wed, Feb 20, 2019 at 06:46:11PM +0900, Takao Indoh wrote:
> On Thu, Feb 14, 2019 at 08:44:48PM +, Elliott, Robert (Persistent Memory)
> wrote:
> > * how does this interact with an iommu, if there is one? Must the
> > address with bit 56 also be granted permission, or is that
> > stripped o
On Fri, Feb 22, 2019 at 11:12:38AM +0100, Brice Goglin wrote:
> Le 14/02/2019 à 18:10, Keith Busch a écrit :
> > +What:
> > /sys/devices/system/node/nodeX/memory_side_cache/indexY/size
> > +Date: December 2018
> > +Contact: Ke
On Fri, Feb 22, 2019 at 11:22:12AM +0100, Brice Goglin wrote:
> Le 14/02/2019 à 18:10, Keith Busch a écrit :
> > +What:
> > /sys/devices/system/node/nodeX/memory_side_cache/indexY/associativity
> > +Date: December 2018
> > +Contact: Ke
On Wed, Feb 20, 2019 at 11:02:01PM +0100, Rafael J. Wysocki wrote:
> On Thu, Feb 14, 2019 at 6:10 PM Keith Busch wrote:
> > config ACPI_HMAT
> > bool "ACPI Heterogeneous Memory Attribute Table Support"
> > depends on ACPI_NUMA
> > + sele
On Fri, Feb 22, 2019 at 01:28:42PM -0800, Linus Torvalds wrote:
> On Thu, Feb 21, 2019 at 5:07 PM Jon Derrick
> wrote:
> >
> > Some platforms don't seem to easily tolerate non-posted mmio reads on
> > lost (hot removed) devices. This has been noted in previous
> > modifications to other layers wh
On Wed, Mar 20, 2019 at 06:30:29PM +0200, Maxim Levitsky wrote:
> Or instead I can use the block backend,
> (but note that currently the block back-end doesn't support polling which is
> critical for the performance).
Oh, I think you can do polling through there. For reference, fs/io_uring.c
has
On Thu, Mar 21, 2019 at 04:12:39PM +, Stefan Hajnoczi wrote:
> mdev-nvme seems like a duplication of SPDK. The performance is not
> better and the features are more limited, so why focus on this approach?
>
> One argument might be that the kernel NVMe subsystem wants to offer this
> functiona
Refactor unmap_and_move() handling for the new page into a separate
function from locking and preparing the old page.
No functional change here: this is just making it easier to reuse this
part of the page migration from contexts that already locked the old page.
Signed-off-by: Keith Busch
Trace the source and destination node of a page migration to help debug
memory usage.
Signed-off-by: Keith Busch
---
include/trace/events/migrate.h | 26 ++
mm/migrate.c | 1 +
2 files changed, 27 insertions(+)
diff --git a/include/trace/events
On Fri, Mar 22, 2019 at 07:54:50AM +, Felipe Franciosi wrote:
> >
> > Note though that SPDK doesn't support sharing the device between host and
> > the
> > guests, it takes over the nvme device, thus it makes the kernel nvme driver
> > unbind from it.
>
> That is absolutely true. However, I
On Sat, Mar 23, 2019 at 12:44:31PM +0800, Yang Shi wrote:
> /*
> + * Demote DRAM pages regardless the mempolicy.
> + * Demot anonymous pages only for now and skip MADV_FREE
> + * pages.
> + */
> + if (PageAnon(page) && !P
Hi Brice,
Please see v7 of this series from last week instead for reviews:
https://patchwork.kernel.org/cover/10832365/
On Wed, Jan 09, 2019 at 05:54:59PM -0800, Yao HongBo wrote:
> On 1/10/2019 2:39 AM, Christoph Hellwig wrote:
> > On Mon, Jan 07, 2019 at 10:22:07AM +0800, Hongbo Yao wrote:
> >> There is an out of bounds array access in nvme_cqe_peding().
> >>
> >> When enable irq_thread for nvme interrupt, there i
On Thu, Jan 10, 2019 at 06:07:02PM +0530, Aneesh Kumar K.V wrote:
> Keith Busch writes:
>
> > Heterogeneous memory systems provide memory nodes with different latency
> > and bandwidth performance attributes. Provide a new kernel interface for
> > subsystems to register
On Fri, Jan 11, 2019 at 11:32:38AM +, Jonathan Cameron wrote:
> On Thu, 10 Jan 2019 10:30:17 -0700
> Keith Busch wrote:
> > I am not aware of a real platform that has an initiator-target pair with
> > better latency but worse bandwidth than any different initiator pair
On Tue, Oct 02, 2018 at 08:49:39AM -0700, Dave Hansen wrote:
> On 10/02/2018 04:26 AM, Kirill A. Shutemov wrote:
> >> + page = follow_page_mask(vma, address, foll_flags, &ctx);
> >> + if (ctx.pgmap)
> >> + put_dev_pagemap(ctx.pgmap);
> >> + return page;
> >> }
> > Do we still want to k
We'd like to measure time to unpin user pages, so this adds a second
benchmark timer on put_page, separate from get_page.
This will break ABI on this ioctl, but being an in-kernel benchmark may
be acceptable.
Cc: Kirill Shutemov
Cc: Dave Hansen
Cc: Dan Williams
Signed-off-by: Keith
This patch provides new gup benchmark ioctl commands to run different
user page pinning methods, get_user_pages_longterm and get_user_pages,
in addition to the existing get_user_pages_fast.
Cc: Kirill Shutemov
Cc: Dave Hansen
Cc: Dan Williams
Signed-off-by: Keith Busch
---
mm/gup_benchmark.c
This avoids a repeated costly radix tree lookup when dev_pagemap is
used.
Cc: Kirill Shutemov
Cc: Dave Hansen
Cc: Dan Williams
Signed-off-by: Keith Busch
---
include/linux/mm.h | 8 +++-
mm/gup.c | 41 -
mm/huge_memory.c | 35
Cc: Kirill Shutemov
Cc: Dave Hansen
Cc: Dan Williams
Signed-off-by: Keith Busch
---
tools/testing/selftests/vm/gup_benchmark.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/tools/testing/selftests/vm/gup_benchmark.c
b/tools/testing/selftests/vm/gup_benchmark.c
index
This will make it easier to add new parameters that we may wish to
thread through these function calls.
Cc: Kirill Shutemov
Cc: Dave Hansen
Cc: Dan Williams
Signed-off-by: Keith Busch
---
include/linux/huge_mm.h | 12 +--
include/linux/hugetlb.h | 2 +-
include/linux/mm.h | 21
The gup benchmark by default maps anonymous memory. This patch allows a
user to specify a file to map, providing a means to test various
file backings, like device and filesystem DAX.
Cc: Kirill Shutemov
Cc: Dave Hansen
Cc: Dan Williams
Signed-off-by: Keith Busch
---
tools/testing/selftests
After: 375786 usec
Not bad; the after is the same time as using baseline anonymous system
RAM after this patch set, where before was nearly 3x longer.
Keith Busch (7):
mm/gup_benchmark: Time put_page
mm/gup_benchmark: Add additional pinning methods
tools/gup_benchmark: Fix 'write&
If the '-w' parameter was provided, the benchmark would exit due to a
mssing 'break'.
Cc: Kirill Shutemov
Cc: Dave Hansen
Cc: Dan Williams
Signed-off-by: Keith Busch
---
tools/testing/selftests/vm/gup_benchmark.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/
On Wed, Sep 19, 2018 at 02:15:28PM -0700, Dave Hansen wrote:
> On 09/19/2018 02:02 PM, Keith Busch wrote:
> > Pinning user pages out of nvdimm dax memory is significantly slower
> > compared to system ram. Analysis points to software overhead incurred
> > from a radix tr
On Wed, Sep 19, 2018 at 03:02:49PM -0600, Keith Busch wrote:
> if (is_hugepd(__hugepd(pmd_val(pmdval {
> - page = follow_huge_pd(vma, address,
> - __hugepd(pmd_val(pmdval)), flags,
> -
This will make it easier to add new parameters that we may wish to
thread through these function calls.
Cc: Kirill Shutemov
Cc: Dave Hansen
Cc: Dan Williams
Signed-off-by: Keith Busch
---
include/linux/huge_mm.h | 12 +--
include/linux/hugetlb.h | 2 +-
include/linux/mm.h | 21
If the '-w' parameter was provided, the benchmark would exit due to a
mssing 'break'.
Cc: Kirill Shutemov
Cc: Dave Hansen
Cc: Dan Williams
Signed-off-by: Keith Busch
---
tools/testing/selftests/vm/gup_benchmark.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/
Cc: Kirill Shutemov
Cc: Dave Hansen
Cc: Dan Williams
Signed-off-by: Keith Busch
---
tools/testing/selftests/vm/gup_benchmark.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/tools/testing/selftests/vm/gup_benchmark.c
b/tools/testing/selftests/vm/gup_benchmark.c
index
Changes since v1:
Fixed shift size for following huge PMD on powerpc
Updated change log with addition justification details
Keith Busch (7):
mm/gup_benchmark: Time put_page
mm/gup_benchmark: Add additional pinning methods
tools/gup_benchmark: Fix 'write' flag usa
The gup benchmark by default maps anonymous memory. This patch allows a
user to specify a file to map, providing a means to test various
file backings, like device and filesystem DAX.
Cc: Kirill Shutemov
Cc: Dave Hansen
Cc: Dan Williams
Signed-off-by: Keith Busch
---
tools/testing/selftests
601 - 700 of 948 matches
Mail list logo
