Hello Srinivas,
OK. I will send fixed patch as soon as possible.
Thank you.
Best Regards,
Keiji Hayashibara
> -Original Message-
> From: Srinivas Kandagatla [mailto:srinivas.kandaga...@linaro.org]
> Sent: Monday, October 16, 2017 6:12 PM
>
> On 15/10/17 09:04, Masahi
Add efuse node for UniPhier LD20 SoC.
This efuse node is included in soc-glue.
Signed-off-by: Keiji Hayashibara
---
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
b/arch
Add uniphier-efuse dt-bindings documentation.
Signed-off-by: Keiji Hayashibara
---
.../devicetree/bindings/nvmem/uniphier-efuse.txt | 49 ++
1 file changed, 49 insertions(+)
create mode 100644 Documentation/devicetree/bindings/nvmem/uniphier-efuse.txt
diff --git a
Add eFuse driver for Socionext UniPhier series SoC.
Note that eFuse device is under soc-glue and this register
implements as read only.
Signed-off-by: Keiji Hayashibara
---
drivers/nvmem/Kconfig | 11 +
drivers/nvmem/Makefile | 2 +
drivers/nvmem/uniphier-efuse.c | 97
use of '_' in dt-binnding documentation.
Keiji Hayashibara (3):
dt-bindings: nvmem: add description for UniPhier eFuse
nvmem: uniphier: add UniPhier eFuse driver
arm64: dts: uniphier: add efuse node for LD20
.../devicetree/bindings/nvmem/uniphier-efuse.txt | 49 +++
Add uniphier-efuse dt-bindings documentation.
Signed-off-by: Keiji Hayashibara
---
.../devicetree/bindings/nvmem/uniphier-efuse.txt | 49 ++
1 file changed, 49 insertions(+)
create mode 100644 Documentation/devicetree/bindings/nvmem/uniphier-efuse.txt
diff --git a
Add eFuse driver for Socionext UniPhier series SoC.
Note that eFuse device is under soc-glue and this register
implements as read only.
Signed-off-by: Keiji Hayashibara
---
drivers/nvmem/Kconfig | 11 +
drivers/nvmem/Makefile | 2 +
drivers/nvmem/uniphier-efuse.c | 97
between v4 and v3
=
1. Fix mistakes in label correction with v3 patch
Keiji Hayashibara (3):
dt-bindings: nvmem: add description for UniPhier eFuse
nvmem: uniphier: add UniPhier eFuse driver
arm64: dts: uniphier: add efuse node for LD20
.../devicetree/bindings/nvmem
Add efuse node for UniPhier LD20 SoC.
This efuse node is included in soc-glue.
Signed-off-by: Keiji Hayashibara
---
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
b/arch
From: Kunihiko Hayashi
Add DT bindings for SPI controller implemented in UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
.../devicetree/bindings/spi/spi-uniphier.txt | 22 ++
1 file changed, 22 insertions(+)
create mode 100644
ify the handling of word size in uniphier_spi_send() and
uniphier_spi_recv().
- modify help in Kconfig.
- other trivial change.
Keiji Hayashibara (1):
spi: add SPI controller driver for UniPhier SoC
Kunihiko Hayashi (1):
dt-bindings: spi: add DT bindings for UniPhier SPI control
SPI master mode only.
This commit is implemented in PIO transfer mode, not DMA transfer.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
drivers/spi/Kconfig| 13 ++
drivers/spi/Makefile | 1 +
drivers/spi/spi-uniphier.c | 539
From: Kunihiko Hayashi
Add nodes of SPI controller for LD4, Pro4, sLD8, Pro5 and PXs2.
Signed-off-by: Kunihiko Hayashi
---
arch/arm/boot/dts/uniphier-ld4.dtsi | 11 +++
arch/arm/boot/dts/uniphier-pro4.dtsi | 11 +++
arch/arm/boot/dts/uniphier-pro5.dtsi | 22 +++
This series adds SPI pin-mux node and SPI node for UniPhier SoCs.
Changes since v1:
- remove the node for MCSSI which support multiple channels.
Since the current driver doesn't support MCSSI, it deletes this node.
Kunihiko Hayashi (3):
ARM: dts: uniphier: add SPI pin-mux node
ARM: dts: uni
From: Kunihiko Hayashi
Add nodes of SPI controller for UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 22
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 44
arch/arm64/boot/dts/socionext/uniphier-p
From: Kunihiko Hayashi
This commit adds pin-mux nodes for SPI controller.
Signed-off-by: Kunihiko Hayashi
---
arch/arm/boot/dts/uniphier-pinctrl.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/uniphier-pinctrl.dtsi
b/arch/arm/boot/dts/uniphier-
;
> > + if (priv->irq < 0) {
> > + dev_err(&pdev->dev, "failed to get IRQ\n");
>
> > + ret = -ENXIO;
>
> What's wrong with
>
> ret = priv->irq;
>
> ?
I will modify it.
> > + goto out_disable_clk;
> > + }
>
> > +static const struct of_device_id uniphier_spi_match[] = {
> > + { .compatible = "socionext,uniphier-scssi", },
>
> > + { /* sentinel */ },
>
> Slightly better without comma.
OK. I will modify this.
-
Best Regards,
Keiji Hayashibara
> > +};
> > +MODULE_DEVICE_TABLE(of, uniphier_spi_match);
>
> --
> With Best Regards,
> Andy Shevchenko
Hello Yamada-san,
> From: Masahiro Yamada [mailto:yamada.masah...@socionext.com]
> Sent: Thursday, July 26, 2018 6:13 PM
> To: Hayashibara, Keiji/林原 啓二
> Subject: Re: [PATCH v2 2/2] spi: add SPI controller driver for UniPhier SoC
>
> Hi.
>
>
> 2018-07-26 16:09
Hello Radu,
> From: Radu Pirea [mailto:radu.pi...@microchip.com]
> Sent: Thursday, July 26, 2018 7:58 PM
> To: Hayashibara, Keiji/林原 啓二 ; 'Andy
> Shevchenko'
>
> Subject: Re: [PATCH v2 2/2] spi: add SPI controller driver for UniPhier SoC
>
>
>
> O
pointed out.
However, I found this code unnecessary as pointed out by Radu,
so I will delete it.
> >> > +
> >> > + if (ckrat < SSI_MIN_CLK_DIVIDER)
> >> > + ckrat = SSI_MIN_CLK_DIVIDER;
> >>
> >> clamp_val() / max() ?
> >
> > I will modify it to use max().
>
> See above.
This is also the same as above.
> --
> With Best Regards,
> Andy Shevchenko
-
Best Regards,
Keiji Hayashibara
static const char * const system_bus_groups[] = {"system_bus",
"system_bus_cs1",
"system_bus_cs2",
I mistook "spi0_groups" with " spi_groups",
so there was
1) & ~1, one "add" and one "and".
>
> Might as well use the macro so it's clear. There is also round_up(x,y), which
> I believe is intended to be used
> only with power of 2 values of y.
I confirmed round_up() macro.
This macro is optimized to power of 2 argument,
and it matches to this case and clear.
I will replace to round_up() macro.
Thank you.
-
Best Regards,
Keiji Hayashibara
From: Kunihiko Hayashi
Add clock control for SPI controller on UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Masahiro Yamada
---
drivers/clk/uniphier/clk-uniphier-peri.c | 9 +
drivers/clk/uniphier/clk-uniphier-sys.c | 8
2 files changed, 17 insertions(+)
di
From: Kunihiko Hayashi
Add reset control for SPI controller on UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
---
drivers/reset/reset-uniphier.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c
index e9030ff..5605745 1
From: Kunihiko Hayashi
Add pin-mux settings for spi controller.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c | 10 ++
drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c | 20
drivers/pinctrl
This series adds SPI pin-mux node and SPI node for UniPhier SoCs.
Kunihiko Hayashi (3):
ARM: dts: uniphier: add SPI pin-mux node
ARM: dts: uniphier: add SPI node for UniPhier 32bit SoCs
arm64: dts: uniphier: add SPI node for LD20, LD11 and PXs3
arch/arm/boot/dts/uniphier-ld4.dtsi
From: Kunihiko Hayashi
Add nodes of SPI controller for UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 22
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 44
arch/arm64/boot/dts/socionext/uniphier-p
From: Kunihiko Hayashi
Add nodes of SPI controller for LD4, Pro4, sLD8, Pro5 and PXs2.
Signed-off-by: Kunihiko Hayashi
---
arch/arm/boot/dts/uniphier-ld4.dtsi | 11 +++
arch/arm/boot/dts/uniphier-pro4.dtsi | 22 ++
arch/arm/boot/dts/uniphier-pro5.dtsi | 33
From: Kunihiko Hayashi
This commit adds pin-mux nodes for SPI controller.
Signed-off-by: Kunihiko Hayashi
---
arch/arm/boot/dts/uniphier-pinctrl.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/uniphier-pinctrl.dtsi
b/arch/arm/boot/dts/uniphier-
From: Kunihiko Hayashi
Add DT bindings for SPI controller implemented in UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
.../devicetree/bindings/spi/spi-uniphier.txt | 26 ++
1 file changed, 26 insertions(+)
create mode 100644
This series adds support for SPI controller driver implemented on UniPhier SoCs.
Keiji Hayashibara (1):
spi: add SPI controller driver for UniPhier SoC
Kunihiko Hayashi (1):
dt-bindings: spi: add DT bindings for UniPhier SPI controller
.../devicetree/bindings/spi/spi-uniphier.txt
supports the SPI master mode only.
This commit is implemented in PIO transfer mode, not DMA transfer.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
drivers/spi/Kconfig| 7 +
drivers/spi/Makefile | 1 +
drivers/spi/spi-uniphier.c | 532
Hi,
Sorry.
I will fix this and send v2 patch.
Thank you.
Best Regards,
Keiji Hayashibara
> -Original Message-
> From: kbuild test robot [mailto:l...@intel.com]
> Sent: Thursday, July 19, 2018 5:02 PM
> To: Hayashibara, Keiji/林原 啓二
> Cc: kbuild-...@01.org; linus.wal
From: Kunihiko Hayashi
Add pin-mux settings for spi controller.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
Changes since v1:
- Fix build error of "pinctrl-uniphier-sld8.c".
drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c | 10 ++
drivers/pinctr
Hi Mark,
> -Original Message-
> From: Mark Brown [mailto:broo...@kernel.org]
> Sent: Friday, July 20, 2018 1:52 AM
> Subject: Re: [PATCH 2/2] spi: add SPI controller driver for UniPhier SoC
>
> On Thu, Jul 19, 2018 at 03:51:57PM +0900, Keiji Hayashibara wrote:
>
Hi Trent,
> -Original Message-
> From: Trent Piepho [mailto:tpie...@impinj.com]
> Sent: Friday, July 20, 2018 4:46 AM
> Subject: Re: [PATCH 2/2] spi: add SPI controller driver for UniPhier SoC
>
> On Thu, 2018-07-19 at 15:51 +0900, Keiji Hayashibara wrote:
> >
Hello Rob,
I see.
I will add "Acked-by" and "Reviewed-by" tag by Rob in next version.
Thank you.
-
Best Regards,
Keiji Hayashibara
> -Original Message-
> From: Rob Herring [mailto:r...@kernel.org]
> Sent: Tuesday, July 31, 2018 6:47 AM
&
From: Kunihiko Hayashi
Add DT bindings for SPI controller implemented in UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
Reviewed-by: Rob Herring
---
.../devicetree/bindings/spi/spi-uniphier.txt | 22 ++
1 file changed, 22 insertions
This series adds support for SPI controller driver implemented on UniPhier SoCs.
Changes since v2:
- remove check code of clock divider in uniphier_spi_set_baudrate().
- change irq from struct variable to stack variable.
- other trivial change.
Keiji Hayashibara (1):
spi: add SPI controller
SPI master mode only.
This commit is implemented in PIO transfer mode, not DMA transfer.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Keiji Hayashibara
---
drivers/spi/Kconfig| 13 ++
drivers/spi/Makefile | 1 +
drivers/spi/spi-uniphier.c | 525
This commit removed include headers of linux/of.h and linux/of_platform.h,
because they are not used.
Signed-off-by: Keiji Hayashibara
---
drivers/spi/spi-uniphier.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/spi/spi-uniphier.c b/drivers/spi/spi-uniphier.c
index 0899854
only.
> >
> > This controller has 32bit TX/RX FIFO with depth of eight entry, and
> > supports the SPI master mode only.
> >
> > This commit is implemented in PIO transfer mode, not DMA transfer.
> >
>
> One comment below, otherwise FWIW,
> Reviewed-by:
DT bindings for UniPhier SPI controller")
Signed-off-by: Keiji Hayashibara
---
Documentation/devicetree/bindings/spi/spi-uniphier.txt | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/spi-uniphier.txt
b/Documentation/dev
el.org; linux-arm-ker...@lists.infradead.org;
> devicet...@vger.kernel.org;
> sta...@vger.kernel.org; masami.hirama...@linaro.org;
> jaswinder.si...@linaro.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH] spi: uniphier: fix incorrect property items
>
> On Wed, Oct 24, 2018 at 06:34:29PM +
In commit 7662d1dc17d4 ("spi: uniphier: fix incorrect property items")
addressing properties of #address-cells and #size-cells were removed.
Since it is not necessary to remove them, they are back again.
Signed-off-by: Keiji Hayashibara
---
Documentation/devicetree/bindings/spi/spi-un
ot;).
Changes since v1:
- Add commit 71b8dfc691a3 ("spi: uniphier: re-add addressing properties")
The addressing properties of #address-cells and #size-cells
are back again.
Keiji Hayashibara (2):
spi: uniphier: fix incorrect property items
spi: uniphier: re-add addressing propert
DT bindings for UniPhier SPI controller")
Signed-off-by: Keiji Hayashibara
---
Documentation/devicetree/bindings/spi/spi-uniphier.txt | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/spi-uniphier.txt
b/Documentation/dev
This commit removed if() because priv->is_save_param is always true.
Signed-off-by: Keiji Hayashibara
---
drivers/spi/spi-uniphier.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/spi/spi-uniphier.c b/drivers/spi/spi-uniphier.c
index e6ebbb1..d40ad93 100644
--
.
Keiji Hayashibara (3):
spi: uniphier: fix wrong register overwrite
spi: uniphier: remove unnecessary code
spi: uniphier: introduce polling mode
drivers/spi/spi-uniphier.c | 85 --
1 file changed, 68 insertions(+), 17 deletions(-)
--
2.7.4
When it changes the spi mode, the register is overwritten incorrectly.
This commit fixes this register overwrite.
Signed-off-by: Keiji Hayashibara
---
drivers/spi/spi-uniphier.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/spi/spi-uniphier.c b/drivers/spi/spi-uniphier.c
index
Introduce new polling mode for short size transfer. Either the estimated
transfer time is estimated to exceed 200us, or polling loop actually exceeds
200us, it switches to irq mode.
Signed-off-by: Keiji Hayashibara
---
drivers/spi/spi-uniphier.c | 81
The zero-length transfer results in timeout error because
the transfer doesn't start.
This commit modified to return success in this case.
Signed-off-by: Keiji Hayashibara
---
drivers/spi/spi-uniphier.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/spi/spi-uniphier.c b/dr
Timeout error was silently ignored.
This commit adds timeout error handling and modifies return type of
wait_for_completion_timeout().
Signed-off-by: Keiji Hayashibara
---
drivers/spi/spi-uniphier.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/spi
This series fixes timeout problem and modifies timeout handling.
The zero-length transfer results in two second timeout
and the transfer speed becomes slow.
Keiji Hayashibara (2):
spi: uniphier: fix timeout error
spi: uniphier: fix zero-length transfer
drivers/spi/spi-uniphier.c | 17
This series adds support for watchdog timer implemented on UniPhier LD11 and
LD20 SoCs. This driver supports watchdog and system reset for SoCs.
Keiji Hayashibara (2):
watchdog: uniphier: add UniPhier watchdog driver
arm64: dts: uniphier: add watchdog node for LD11 and LD20
.../devicetree
Add nodes of watchdog timer for UniPhier LD11 and LD20 SoC.
The watchdog timer is included in sysctrl.
Signed-off-by: Keiji Hayashibara
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 4
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 4
2 files changed, 8 insertions
Add a watchdog driver for Socionext UniPhier series SoC.
Note that the timeout value for this device must be a power
of 2 because of the specification.
Signed-off-by: Keiji Hayashibara
---
.../devicetree/bindings/watchdog/uniphier-wdt.txt | 20 ++
Documentation/watchdog/watchdog
Hi Guenter,
Thanks for your comment.
> On 05/23/2017 11:34 PM, Keiji Hayashibara wrote:
> > Add a watchdog driver for Socionext UniPhier series SoC.
> > Note that the timeout value for this device must be a power
> > of 2 because of the specification.
> >
> >
...@vger.kernel.org
> (and Rob) in your CC list for binding review.
>
> I think scripts/get_maintainer.pl will do it correctly for you.
>
OK. I will include to CC list in next v2 patch.
>
>
> > +#include
>
> Is this used?
It is unnecessary. I will remove it.
Thanks.
-
Best Regards,
Keiji Hayashibara
Hi Guenter,
Let me confirm if I got it.
I guess that this series finished the review.
Could you tell me the current state of this series?
--
Best Regards,
Keiji Hayashibara
> -Original Message-
> From: Keiji Hayashibara [mailto:hayashibara.ke...@socionext.com]
Hi Guenter and Yamada-san,
I am grateful for your support.
Thank you.
--
Best Regards,
Keiji Hayashibara
> From: Guenter Roeck [mailto:li...@roeck-us.net]
> Sent: Thursday, July 06, 2017 12:26 AM
> Subject: Re: [PATCH V4 0/3] add UniPhier watchdog support
>
> On 07/0
Enable the watchdog driver for UniPhier SoC
Signed-off-by: Keiji Hayashibara
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 6c7d147..5d204a4 100644
--- a/arch/arm64/configs/defconfig
+++ b
Hello Yamada-san,
> From: Masahiro Yamada [mailto:yamada.masah...@socionext.com]
> Sent: Tuesday, July 18, 2017 2:51 PM
> Subject: Re: [PATCH] arm64: defconfig: enable CONFIG_UNIPHIER_WATCHDOG
>
> 2017-07-18 14:24 GMT+09:00 Keiji Hayashibara
> :
> > Enable the watchdog
Enable the watchdog driver for UniPhier SoC
Signed-off-by: Keiji Hayashibara
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 6c7d147..629c815 100644
--- a/arch/arm64/configs/defconfig
+++ b
ram is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> - * GNU General Public License for more details.
> */
>
> #include
Acked-by: Keiji Hayashibara
Thank you.
Best Regards,
Keiji Hayashibara
Reviewed-by: Keiji Hayashibara
Thanks.
-
Best Regards,
Keiji Hayashibara
> -Original Message-
> From: Kunihiko Hayashi [mailto:hayashi.kunih...@socionext.com]
> Sent: Wednesday, November 22, 2017 2:15 PM
> To: Srinivas Kandagatla
> Cc: Yamada, Masahiro/山田 真
Hello Yamada-san,
Sorry, I will be careful next time.
I was checking with the command of
"get_maintainer.pl -f arch/arm/boot/dts/".
Thank you.
Best Regards,
Keiji Hayashibara
> From: Masahiro Yamada [mailto:yamada.masah...@socionext.com]
> Sent: Tuesday, December 12, 2017 1
Hello Rob,
Thank you for your comment.
> From: Rob Herring [mailto:r...@kernel.org]
> Sent: Wednesday, September 13, 2017 1:16 AM
>
> On Tue, Sep 05, 2017 at 04:04:31PM +0900, Keiji Hayashibara wrote:
> > Hello Yamada-san,
> >
> > Thank you for your comment.
&
Add uniphier-efuse dt-bindings documentation.
Signed-off-by: Keiji Hayashibara
---
.../devicetree/bindings/nvmem/uniphier-efuse.txt | 45 ++
1 file changed, 45 insertions(+)
create mode 100644 Documentation/devicetree/bindings/nvmem/uniphier-efuse.txt
diff --git a
Add efuse node for UniPhier LD20 SoC.
This efuse node is included in soc-glue.
Signed-off-by: Keiji Hayashibara
---
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
b/arch/arm64
This series adds support for eFuse implemented on UniPhier LD20 SoCs.
The eFuse device is under soc-glue and this register implements as read only.
Keiji Hayashibara (3):
dt-bindings: nvmem: add description for UniPhier eFuse
nvmem: uniphier: add UniPhier eFuse driver
arm64: dts: uniphier
Add eFuse driver for Socionext UniPhier series SoC.
Note that eFuse device is under soc-glue and this register
implements as read only.
Signed-off-by: Keiji Hayashibara
---
arch/arm64/configs/defconfig | 1 +
drivers/nvmem/Kconfig | 11 +
drivers/nvmem/Makefile | 2
Hello Yamada-san,
Thank you for your comment.
> From: Masahiro Yamada [mailto:yamada.masah...@socionext.com]
> Sent: Monday, September 4, 2017 9:56 PM
>
> 2017-09-01 8:20 GMT+09:00 Keiji Hayashibara
> :
> > Add uniphier-efuse dt-bindings documentation.
> >
> >
Hello Yamada-san,
Thank you for your comment.
> From: Masahiro Yamada [mailto:yamada.masah...@socionext.com]
> Sent: Monday, September 4, 2017 9:58 PM
>
> 2017-09-01 8:20 GMT+09:00 Keiji Hayashibara
> :
> > Add eFuse driver for Socionext UniPhier series SoC.
> > Note
Add uniphier-wdt bindings documentation.
Signed-off-by: Keiji Hayashibara
---
.../devicetree/bindings/watchdog/uniphier-wdt.txt| 20
1 file changed, 20 insertions(+)
create mode 100644 Documentation/devicetree/bindings/watchdog/uniphier-wdt.txt
diff --git a
Add a watchdog driver for Socionext UniPhier series SoC.
Note that the timeout value for this device must be a power
of 2 because of the specification.
Signed-off-by: Keiji Hayashibara
---
Documentation/watchdog/watchdog-parameters.txt | 6 +
drivers/watchdog/Kconfig
Add nodes of watchdog timer for UniPhier LD11 and LD20 SoC.
The watchdog timer is included in sysctrl.
Signed-off-by: Keiji Hayashibara
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 4
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 4
2 files changed, 8 insertions
* Use devm_watchdog_register_device().
* Remove unnecessary code.
Keiji Hayashibara (3):
devicetree: add UniPhier WDT devicetree bindings documentation
watchdog: uniphier: add UniPhier watchdog driver
arm64: dts: uniphier: add watchdog node for LD11 and LD20
.../devicetree/bindings/watchdog/uni
Hi Guenter,
Thank you for your comment.
> On 06/06/2017 02:11 AM, Keiji Hayashibara wrote:
> > Add a watchdog driver for Socionext UniPhier series SoC.
> > Note that the timeout value for this device must be a power
> > of 2 because of the specification.
> >
> >
.
* Correct MODULE_AUTHOR()
* Remove unnecessary code.
Changes between V2 and V1
=
1. Add barrier code in uniphier_watchdog_ping() and __uniphier_watchdog_start().
2. Fix issues according to review comments.
Keiji Hayashibara (3):
dt-bindings: watchdog: add description
Add uniphier-wdt dt-bindings documentation.
Signed-off-by: Keiji Hayashibara
---
.../devicetree/bindings/watchdog/uniphier-wdt.txt| 20
1 file changed, 20 insertions(+)
create mode 100644 Documentation/devicetree/bindings/watchdog/uniphier-wdt.txt
diff --git a
Add nodes of watchdog timer for UniPhier LD11 and LD20 SoC.
The watchdog timer is included in sysctrl.
Signed-off-by: Keiji Hayashibara
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 4
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 4
2 files changed, 8 insertions
Add a watchdog driver for Socionext UniPhier series SoC.
Note that the timeout value for this device must be a power
of 2 because of the specification.
Signed-off-by: Keiji Hayashibara
---
Documentation/watchdog/watchdog-parameters.txt | 6 +
drivers/watchdog/Kconfig
Hello Yamada-san,
From: Masahiro Yamada [mailto:yamada.masah...@socionext.com]
Sent: Wednesday, June 14, 2017 12:08 PM
>
> 2017-06-13 10:14 GMT+09:00 Keiji Hayashibara
> > diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
> > index 52a70ee..2a9d9a6 100644
> >
Add nodes of watchdog timer for UniPhier LD11 and LD20 SoC.
The watchdog timer is included in sysctrl.
Signed-off-by: Keiji Hayashibara
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 4
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 4
2 files changed, 8 insertions
Add a watchdog driver for Socionext UniPhier series SoC.
Note that the timeout value for this device must be a power
of 2 because of the specification.
Signed-off-by: Keiji Hayashibara
---
Documentation/watchdog/watchdog-parameters.txt | 6 +
drivers/watchdog/Kconfig
__uniphier_watchdog_start().
2. Fix issues according to review comments.
Keiji Hayashibara (3):
dt-bindings: watchdog: add description for UniPhier WDT controller
watchdog: uniphier: add UniPhier watchdog driver
arm64: dts: uniphier: add watchdog node for LD11 and LD20
.../devicetree/bindings/watchdog/uniphier
Add uniphier-wdt dt-bindings documentation.
Signed-off-by: Keiji Hayashibara
---
.../devicetree/bindings/watchdog/uniphier-wdt.txt| 20
1 file changed, 20 insertions(+)
create mode 100644 Documentation/devicetree/bindings/watchdog/uniphier-wdt.txt
diff --git a
Add uniphier-efuse dt-bindings documentation.
Signed-off-by: Keiji Hayashibara
---
.../devicetree/bindings/nvmem/uniphier-efuse.txt | 49 ++
1 file changed, 49 insertions(+)
create mode 100644 Documentation/devicetree/bindings/nvmem/uniphier-efuse.txt
diff --git a
without regmap
3. Convert devm_kzalloc to stack
4. Divide efuse into two areas in devicetree
5. Remove .owner settings of struct nvmem_config
6. Remove enable of CONFIG_UNIPHIER_EFUSE in defconfig
7. Other minor fixes
Keiji Hayashibara (3):
dt-bindings: nvmem: add description for UniPhier eFuse
Add eFuse driver for Socionext UniPhier series SoC.
Note that eFuse device is under soc-glue and this register
implements as read only.
Signed-off-by: Keiji Hayashibara
---
drivers/nvmem/Kconfig | 11 +
drivers/nvmem/Makefile | 2 +
drivers/nvmem/uniphier-efuse.c | 97
Add efuse node for UniPhier LD20 SoC.
This efuse node is included in soc-glue.
Signed-off-by: Keiji Hayashibara
---
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
b/arch
Hello Yamada-san,
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
>
> I think you should have added on the top
> to keep the includes alphabetically sorted.
Sorry, I will fix in v3 patch.
--
Best Regards,
Keiji Hayashibara
Hello Yamada-san
Thank you for your comment.
> > Add uniphier-wdt bindings documentation.
> >
> > Signed-off-by: Keiji Hayashibara
>
>
> Maybe "dt-bindings: watchdog: ..." for the subject.
>
> This seems what Rob prefers.
>
> For example,
>
Add efuse node for UniPhier LD4, Pro4, sLD8, Pro5 and PXs2.
This efuse node is included in soc-glue.
Signed-off-by: Keiji Hayashibara
---
arch/arm/boot/dts/uniphier-ld4.dtsi | 18 ++
arch/arm/boot/dts/uniphier-pro4.dtsi | 23 +++
arch/arm/boot/dts/uniphier
Enable the efuse driver for UniPhier SoC
Signed-off-by: Keiji Hayashibara
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 6356c6d..41e1b56 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch
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