[PATCH 1/2] ARM: zynq: initialize slcr mapping earlier

In preparation for performing additional configuration prior to bringing up L2, move the slcr initialization earlier in the boot process. Signed-off-by: Josh Cartwright --- arch/arm/mach-zynq/common.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/mach-zynq

[PATCH 0/2] ARM: zynq: address silent L2 cache corruption

zing it to the proper value prior to bringing up L2. You can find more information about this bug in AR#54190[1]. 1: http://www.xilinx.com/support/answers/54190.html Josh Cartwright (2): ARM: zynq: initialize slcr mapping earlier ARM: zynq: address L2 cache data corruption arch/arm/mach-zyn

[PATCH 2/2] ARM: zynq: address L2 cache data corruption

ously reserved. It is added in the Zynq-7000 AP SoC Technical Reference Manual (TRM) v1.5 as "Reserved". Thanks to Jaeden Amero for initial debugging and triage efforts. Signed-off-by: Josh Cartwright --- arch/arm/mach-zynq/slcr.c | 4 1 file changed, 4 insertions(+) diff --git a/arc

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