This patch fixes the compiling error caused when
config HISILICON_IRQ_MBIGEN is selected but
PCI_MSI is not seleted.
Signed-off-by: Jiancheng Xue
---
drivers/irqchip/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
Hi Marc，
On 2016/6/21 18:36, Marc Zyngier wrote:
> On 21/06/16 10:26, Jiancheng Xue wrote:
>> This patch fixes the compiling error caused when
>> config HISILICON_IRQ_MBIGEN is selected but
>> PCI_MSI is not seleted.
>>
>> Signed-off-by: Jiancheng Xue
>&
On 2016/6/21 19:30, Jiancheng Xue wrote:
> Hi Marc，
>
> On 2016/6/21 18:36, Marc Zyngier wrote:
>> On 21/06/16 10:26, Jiancheng Xue wrote:
>>> This patch fixes the compiling error caused when
>>> config HISILICON_IRQ_MBIGEN is selected but
>>> PCI
在 2016/9/24 1:47, Rob Herring 写道:
> On Sun, Sep 18, 2016 at 03:30:21PM +0800, Jiancheng Xue wrote:
>> Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset
>> Generator) module generates clock and reset signals used
>> by other module blocks on SoC.
>>
>
/git-format-patch for more information]
>
> url:
> https://github.com/0day-ci/linux/commits/Jiancheng-Xue/clk-hisilicon-add-CRG-driver-for-Hi3798CV200-SoC/20160912-175733
> base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
> config: arm-allmodconfig (attached
From: Pengcheng Li
Add inno-usb2-phy driver for hi3798cv200 SoC.
Signed-off-by: Pengcheng Li
Signed-off-by: Jiancheng Xue
---
drivers/phy/Kconfig | 10 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-hisi-inno-usb2.c | 287 +++
3
Enable GMAC,I2C,IR,USB2-PHY for hi3798cv200-poplar board.
Signed-off-by: Jiancheng Xue
---
arch/arm64/configs/defconfig | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 97c123e..b45d760 100644
Add usb2 clocks for hi3798cv200 SoC.
Signed-off-by: Jiancheng Xue
Reviewed-by: Daniel Thompson
---
drivers/clk/hisilicon/crg-hi3798cv200.c | 21 +
include/dt-bindings/clock/histb-clock.h | 9 -
2 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/drivers
Add usb2 controller and phy nodes for poplar board.
Signed-off-by: Jiancheng Xue
Reviewed-by: Daniel Thompson
---
.../boot/dts/hisilicon/hi3798cv200-poplar.dts | 13 ++
arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 47 ++
2 files changed, 60 insertions
Add support for hisi-inno-usb2 phy.
Signed-off-by: Jiancheng Xue
---
.../devicetree/bindings/phy/phy-hisi-inno-usb2.txt | 36 ++
1 file changed, 36 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
diff --git a/Documentation
This patchset is mainly used to enable usb2 function on poplar board.
Jiancheng Xue (4):
clk: hisilicon: add usb2 clocks for hi3798cv200 SoC
dt-bindings: phy-hisi-inno-usb2: add support for hisi-inno-usb2 phy
arm64: dts: hisilicon: add usb2 controller and phy nodes for poplar
board
Hi,
On 2017/6/21 17:00, Jiancheng Xue wrote:
> Add support for hisi-inno-usb2 phy.
>
> Signed-off-by: Jiancheng Xue
> ---
> .../devicetree/bindings/phy/phy-hisi-inno-usb2.txt | 36
> ++
> 1 file changed, 36 insertions(+)
> create mode 100644
&g
From: Younian Wang
This is a NEC protocol type remote controller distributed with
hisilicon TV demo boards.
Signed-off-by: Younian Wang
Signed-off-by: Jiancheng Xue
---
drivers/media/rc/keymaps/Makefile | 1 +
drivers/media/rc/keymaps/rc-hisi-tv-demo.c | 70
Add support for two remote controllers of hisilicon boards.
Younian Wang (2):
[media] rc/keymaps: add support for RC of hisilicon TV demo boards
[media] rc/keymaps: add support for RC of hisilicon poplar board
drivers/media/rc/keymaps/Makefile | 2 +
drivers/media/rc/keymaps/rc-his
From: Younian Wang
This is a NEC protocol type remote controller distributed with
96boards poplar@tocoding board.
Signed-off-by: Younian Wang
Signed-off-by: Jiancheng Xue
---
drivers/media/rc/keymaps/Makefile | 1 +
drivers/media/rc/keymaps/rc-hisi-poplar.c | 58
From: Younian Wang
Correct ir clock rate for hi3798cv200 SoC.
Signed-off-by: Younian Wang
---
drivers/clk/hisilicon/crg-hi3798cv200.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/hisilicon/crg-hi3798cv200.c
b/drivers/clk/hisilicon/crg-hi3798cv200.c
index 25d
From: tianshuliang
Add emmc sample and emmc drive clock for Hi3798cv200 SoC
Signed-off-by: tianshuliang
Signed-off-by: Jiancheng Xue
---
drivers/clk/hisilicon/crg-hi3798cv200.c | 25 -
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/hisilicon
From: tianshuliang
Add a phase clock type for HiSilicon SoCs,which supports
clk_set_phase operation.
Signed-off-by: tianshuliang
Signed-off-by: Jiancheng Xue
---
drivers/clk/hisilicon/Makefile | 2 +-
drivers/clk/hisilicon/clk-hisi-phase.c | 117
Add more clock definitions for hi3798cv200-poplar board.
Younian Wang (1):
clk: hisilicon: correct ir clock rate for hi3798cv200 SoC
tianshuliang (2):
clk: hisilicon: add hisi phase clock support
clk: hisilicon: add emmc sample and drive clock for hi3798cv200 SoC
drivers/clk/hisilicon/Mak
From: tianshuliang
Hi3798cv200 SoC extends the dw-mshc controller for additional clock
and bus control. Add support for these extensions.
Signed-off-by: tianshuliang
Signed-off-by: Jiancheng Xue
---
drivers/mmc/host/Kconfig | 9 ++
drivers/mmc/host/Makefile | 1
From: tianshuliang
Hisilicon hi3798cv200 SoC extends the dw-mshc controller
for additional clock control. Add device tree bindings for
hi3798cv200-dw-mshc.
Signed-off-by: tianshuliang
Signed-off-by: Jiancheng Xue
---
.../bindings/mmc/hi3798cv200-dw-mshc.txt | 51
Add an specific emmc driver for hi3798cv200-poplar board. Previously, it used
the
generic dw-mmc driver with lower performance.
tianshuliang (2):
dt-bindings: mmc: add bindings for hi3798cv200-dw-mshc
mmc: dw_mmc: add support for hi3798cv200 specific extensions of
dw-mshc
.../bindings/m
From: Younian Wang
Supplement properties of ir node for poplar board.
Signed-off-by: Younian Wang
---
arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3798cv200
Add more devices nodes and properties for poplar board, involving ir, emmc and
pinctrl nodes.
Younian Wang (2):
arm64: dts: hisilicon: supplement properties of ir node for poplar
board
arm64: dts: hisilicon: add pinctrl nodes for hi3798cv200-poplar board
tianshuliang (1):
arm64: dts: h
From: tianshuliang
Supplement properties of emmc nodes to support high performance.
Signed-off-by: tianshuliang
---
arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts | 12
arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 8 +---
2 files changed, 17 insertions(+), 3 d
From: Younian Wang
Add pinctrl nodes for hi3798cv200-poplar board
Signed-off-by: Younian Wang
Signed-off-by: Jiancheng Xue
---
.../boot/dts/hisilicon/hi3798cv200-poplar.dts | 1 +
arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 71 +++
arch/arm64/boot/dts/hisilicon/poplar
Hi,
On 2017/10/18 17:31, Sean Young wrote:
> On Wed, Oct 18, 2017 at 06:54:56AM -0400, Jiancheng Xue wrote:
>> From: Younian Wang
>>
>> This is a NEC protocol type remote controller distributed with
>> hisilicon TV demo boards.
>>
>> Signed-off-by: Younia
Hi Hans，
On 2017/10/19 15:01, Hans Verkuil wrote:
> On 10/18/2017 12:54 PM, Jiancheng Xue wrote:
>> Add support for two remote controllers of hisilicon boards.
>>
>> Younian Wang (2):
>> [media] rc/keymaps: add support for RC of hisilicon TV demo boards
>> [m
From: Younian Wang
This is a NEC protocol type remote controller distributed with
96boards poplar@tocoding board.
Signed-off-by: Younian Wang
Signed-off-by: Jiancheng Xue
---
drivers/media/rc/keymaps/Makefile | 1 +
drivers/media/rc/keymaps/rc-hisi-poplar.c | 69
Add support for two remote controllers of hisilicon boards.
ChangeLog:
v2:
Supplement copyright statements for source files.
Younian Wang (2):
[media] rc/keymaps: add support for RC of hisilicon TV demo boards
[media] rc/keymaps: add support for RC of hisilicon poplar board
drivers/media/rc
From: Younian Wang
This is a NEC protocol type remote controller distributed with
hisilicon TV demo boards.
Signed-off-by: Younian Wang
Signed-off-by: Jiancheng Xue
---
drivers/media/rc/keymaps/Makefile | 1 +
drivers/media/rc/keymaps/rc-hisi-tv-demo.c | 81
Hi,
On 2016/3/31 16:10, Jiancheng Xue wrote:
> From: Jiancheng Xue
>
> The CRG(Clock and Reset Generator) block provides clock
> and reset signals for other modules in hi3519 soc.
>
> Signed-off-by: Jiancheng Xue
> Acked-by: Rob Herring
> Acked-by: Philipp Zabel
&g
this issue seriously and reply on that thread later.
> Two other comments below.
>
> On Tue, Apr 19, 2016 at 03:27:19PM +0800, Jiancheng Xue wrote:
>> From: Jiancheng Xue
>>
>> Add hisilicon spi-nor flash controller driver
>>
>> Signed-off-by: Binquan Peng
&
Some ehci compatible controllers have more than one reset signal lines,
e.g., Synopsys DWC USB2.0 Host-AHB Controller has two resets hreset_i_n
and phy_rst_i_n. Two more resets are added in this patch in order for
this kind of controller to use this driver directly.
Signed-off-by: Jiancheng Xue
Hi Cyrille,
On 2016/4/27 19:55, Cyrille Pitchen wrote:
> Hi Jiancheng,
>
> Le 19/04/2016 09:27, Jiancheng Xue a écrit :
>> From: Jiancheng Xue
>>
>> Add hisilicon spi-nor flash controller driver
>
> [...]
>> +enum hifmc_iftype {
>> +IF_TYPE_S
1. Add driver remove path.
2. Fix some issues.
-Fix the ordering issue about clock provider being published.
-Add error checking upon registering clocks.
Signed-off-by: Jiancheng Xue
---
drivers/clk/hisilicon/clk-hi3519.c | 116 -
1 file changed, 100
ready.
Signed-off-by: Jiancheng Xue
---
drivers/clk/hisilicon/clk.c | 29 +
drivers/clk/hisilicon/clk.h | 3 +++
2 files changed, 32 insertions(+)
diff --git a/drivers/clk/hisilicon/clk.c b/drivers/clk/hisilicon/clk.c
index 9b15adb..78675d1 100644
--- a/drivers/clk
This patch is base on branch clk-hi3519 in clk tree. It mainly fixes the
following issues:
1. Add driver remove path.
2. Fix the ordering issue about clock provider being published.
3. Add error checking upon registering clocks.
Jiancheng Xue (5):
reset: hisilicon: change the definition of
Change the input arguments type to struct platform_device pointer.
Signed-off-by: Jiancheng Xue
---
drivers/clk/hisilicon/reset.c | 19 +--
drivers/clk/hisilicon/reset.h | 5 +++--
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/hisilicon/reset.c b
Add error processing for hisi_clk_register_* functions.
Signed-off-by: Jiancheng Xue
---
drivers/clk/hisilicon/clk.c | 60 +
drivers/clk/hisilicon/clk.h | 10
2 files changed, 55 insertions(+), 15 deletions(-)
diff --git a/drivers/clk
Add hisi_clk_unregister_* functions.
Signed-off-by: Jiancheng Xue
---
drivers/clk/hisilicon/clk.h | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/clk/hisilicon/clk.h b/drivers/clk/hisilicon/clk.h
index 2575329..4e1d1af 100644
--- a/drivers/clk/hisilicon/clk.h
Hi Philipp,
On 2016/5/10 19:09, Philipp Zabel wrote:
> Am Dienstag, den 10.05.2016, 17:19 +0800 schrieb Jiancheng Xue:
>> 1. Add driver remove path.
>> 2. Fix some issues.
>>-Fix the ordering issue about clock provider being published.
>>-Add error check
Some ehci compatible controllers have more than one reset signal lines,
e.g., Synopsys DWC USB2.0 Host-AHB Controller has two resets hreset_i_n
and phy_rst_i_n. Two more resets are added in this patch in order for
this kind of controller to use this driver directly.
Signed-off-by: Jiancheng Xue
compiled successfully.
Jiancheng Xue (5):
reset: hisilicon: change the definition of hisi_reset_init
clk: hisilicon: add hisi_clk_alloc function.
clk: hisilicon: add error processing for hisi_clk_register_* functions
clk: hisilicon: add hisi_clk_unregister_* functions
clk: hisilicon
ready.
Signed-off-by: Jiancheng Xue
---
drivers/clk/hisilicon/clk.c | 29 +
drivers/clk/hisilicon/clk.h | 3 +++
2 files changed, 32 insertions(+)
diff --git a/drivers/clk/hisilicon/clk.c b/drivers/clk/hisilicon/clk.c
index 9b15adb..78675d1 100644
--- a/drivers/clk
Add hisi_clk_unregister_* functions.
Signed-off-by: Jiancheng Xue
---
drivers/clk/hisilicon/clk.h | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/clk/hisilicon/clk.h b/drivers/clk/hisilicon/clk.h
index 2575329..4e1d1af 100644
--- a/drivers/clk/hisilicon/clk.h
Add error processing for hisi_clk_register_* functions.
Signed-off-by: Jiancheng Xue
---
drivers/clk/hisilicon/clk.c | 60 +
drivers/clk/hisilicon/clk.h | 10
2 files changed, 55 insertions(+), 15 deletions(-)
diff --git a/drivers/clk
1. Add driver remove path.
2. Fix some issues.
-Fix the ordering issue about clock provider being published.
-Add error checking upon registering clocks.
Signed-off-by: Jiancheng Xue
---
drivers/clk/hisilicon/clk-hi3519.c | 116 -
1 file changed, 100
Change the input arguments type to struct platform_device pointer.
Signed-off-by: Jiancheng Xue
---
drivers/clk/hisilicon/clk-hi3519.c | 2 +-
drivers/clk/hisilicon/reset.c | 19 +--
drivers/clk/hisilicon/reset.h | 5 +++--
3 files changed, 13 insertions(+), 13
Add hisilicon spi-nor flash controller driver
Signed-off-by: Binquan Peng
Signed-off-by: Jiancheng Xue
Acked-by: Rob Herring
Reviewed-by: Ezequiel Garcia
---
change log
v11:
Fixed issues pointed by Brian Norris and Cyrille Pitchen.
1)Changed hisi_spi_nor_read_reg()/write_reg() to configure
peripheral drivers will be submitted later.
Any comments will be appreciated!
Thanks!
Jiancheng Xue (5):
clk: hi3519: add CRG driver for hisilicon hi3519 soc
ARM: hisi: enable Hi3519 soc
ARM: dts: add dts files for hi3519-demb board
ARM: config: enable ARCH_HI3519
ARM: debug: add Hi3519 debug
The CRG(Clock and Reset Generator) module provides
clock and reset signals for other modules in hi3519 soc.
Signed-off-by: Jiancheng Xue
---
.../devicetree/bindings/clock/hi3519-clock.txt | 46 +++
drivers/clk/hisilicon/Makefile | 1 +
drivers/clk/hisilicon/clk
Hi3519 SOC is mainly used for ip camera and sport dv
solutions.
Signed-off-by: Jiancheng Xue
---
arch/arm/mach-hisi/Kconfig | 9 +
arch/arm/mach-hisi/hisilicon.c | 9 +
2 files changed, 18 insertions(+)
diff --git a/arch/arm/mach-hisi/Kconfig b/arch/arm/mach-hisi/Kconfig
add dts files for hi3519-demb board
Signed-off-by: Jiancheng Xue
---
arch/arm/boot/dts/Makefile| 2 +
arch/arm/boot/dts/hi3519-demb.dts | 55
arch/arm/boot/dts/hi3519.dtsi | 129 ++
3 files changed, 186 insertions(+)
create
enable ARCH_HI3519 in hisi_defconfig
Signed-off-by: Jiancheng Xue
---
arch/arm/configs/hisi_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/hisi_defconfig b/arch/arm/configs/hisi_defconfig
index b2e340b..321d020 100644
--- a/arch/arm/configs/hisi_defconfig
+++ b
Add the support of Hisilicon Hi3519 debug uart.
Signed-off-by: Jiancheng Xue
---
arch/arm/Kconfig.debug | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 259c0ca..4d2ae2a 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm
Jiancheng Xue (9):
clk: hi3519: add dt-binding document and header file
clk: hi3519: add CRG driver for hisilicon hi3519 soc
ARM: hisi: enable Hi3519 soc
ARM: dts: add dts files for hi3519-demb board
ARM: config: enable ARCH_HI3519
ARM: debug: add Hi3519 debug uart
ARM: hisi: rename
add dt-binding document and header file for hi3519 clock
Signed-off-by: Jiancheng Xue
---
.../devicetree/bindings/clock/hi3519-crg.txt | 46 +++
include/dt-bindings/clock/hi3519-clock.h | 51 ++
2 files changed, 97 insertions(+)
create mode
The CRG(Clock and Reset Generator) module provides
clock and reset signals for other modules in hi3519 soc.
Signed-off-by: Jiancheng Xue
---
drivers/clk/hisilicon/Makefile | 1 +
drivers/clk/hisilicon/clk-hi3519.c | 100 +
drivers/clk/hisilicon/reset.c | 149
Hi3519 SOC is mainly used for ip camera and sport dv
solutions.
Signed-off-by: Jiancheng Xue
---
arch/arm/mach-hisi/Kconfig | 9 +
arch/arm/mach-hisi/hisilicon.c | 9 +
2 files changed, 18 insertions(+)
diff --git a/arch/arm/mach-hisi/Kconfig b/arch/arm/mach-hisi/Kconfig
enable ARCH_HI3519 in hisi_defconfig
Signed-off-by: Jiancheng Xue
---
arch/arm/configs/hisi_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/hisi_defconfig b/arch/arm/configs/hisi_defconfig
index b2e340b..321d020 100644
--- a/arch/arm/configs/hisi_defconfig
+++ b
Add the support of Hisilicon Hi3519 debug uart.
Signed-off-by: Jiancheng Xue
---
arch/arm/Kconfig.debug | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 259c0ca..4d2ae2a 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm
Rename ARCH_HI3xxx to ARCH_HI36xx.
Signed-off-by: Jiancheng Xue
---
drivers/clk/hisilicon/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/hisilicon/Makefile b/drivers/clk/hisilicon/Makefile
index 9a601c0..5a1c195 100644
--- a/drivers/clk/hisilicon
ARCH_HI3xxx just represents hi36xx soc family.
Signed-off-by: Jiancheng Xue
---
arch/arm/Kconfig.debug | 4 ++--
arch/arm/boot/dts/Makefile | 2 +-
arch/arm/configs/hisi_defconfig | 2 +-
arch/arm/configs/multi_v7_defconfig | 2 +-
arch/arm/mach-hisi/Kconfig
Rename ARCH_HI3xxx to ARCH_HI36xx.
Signed-off-by: Jiancheng Xue
---
drivers/dma/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index e6cd1a3..53d5676 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -279,7
add dts files for hi3519-demb board
Signed-off-by: Jiancheng Xue
---
arch/arm/boot/dts/Makefile| 2 +
arch/arm/boot/dts/hi3519-demb.dts | 55
arch/arm/boot/dts/hi3519.dtsi | 129 ++
3 files changed, 186 insertions(+)
create
Add hisilicon spi-nor flash controller driver
Signed-off-by: Binquan Peng
Signed-off-by: Jiancheng Xue
Acked-by: Rob Herring
Reviewed-by: Ezequiel Garcia
---
change log
v7:
Rebased to v4.5-rc3.
Fixed issues pointed by Ezequiel Garcia.
v6:
Based on v4.5-rc2
Fixed issues pointed by Ezequiel
Add hisilicon spi-nor flash controller driver
Signed-off-by: Binquan Peng
Signed-off-by: Jiancheng Xue
Acked-by: Rob Herring
Reviewed-by: Ezequiel Garcia
---
change log
v7:
Rebased to v4.5-rc3.
Fixed issues pointed by Ezequiel Garcia.
v6:
Based on v4.5-rc2
Fixed issues pointed by Ezequiel
In most of hisilicon SOCs, reset controller and clock provider are
combined together as a block named CRG (Clock and Reset Generator).
This patch mainly implements the reset function.
Signed-off-by: Jiancheng Xue
Acked-by: Philipp Zabel
---
Change log
v2:
-Changed definition of hisi_reset_init
Hi Boris,
On 2016/3/8 17:46, Boris Brezillon wrote:
>> [...]
+static int hisi_spi_nor_read_reg(struct spi_nor *nor, u8 opcode, u8 *buf,
+ int len)
+{
+ struct hifmc_priv *priv = nor->priv;
+ struct hifmc_host *host = priv->host;
+ int ret;
+
+ r
Add hisilicon spi-nor flash controller driver
Signed-off-by: Binquan Peng
Signed-off-by: Jiancheng Xue
Acked-by: Rob Herring
Reviewed-by: Ezequiel Garcia
---
change log
v9:
Fixed issues pointed by Jagan Teki.
v8:
Fixed issues pointed by Ezequiel Garcia and Brian Norris.
Moved dts binding file
Hi,
On 2016/4/7 10:28, Marek Vasut wrote:
> On 04/07/2016 04:10 AM, Jiancheng Xue wrote:
>> Hi Brian,
>>Thank you very much for your comments. I'll fix these issues in next
>> version.
>> In addition, for easy understanding I'd like to rewrite hisi_spi_n
Hi,
On 2016/4/8 18:04, Marek Vasut wrote:
> On 04/08/2016 10:26 AM, Jiancheng Xue wrote:
>> Hi,
>>
>> On 2016/4/7 10:28, Marek Vasut wrote:
>>> On 04/07/2016 04:10 AM, Jiancheng Xue wrote:
>>>> Hi Brian,
>>>>Thank you very much for your
n addition to Marek's comments, I have just a few small
> comments. I'll post a small diff at the end, and a few inline comments.
>
> On Mon, Mar 28, 2016 at 05:15:28PM +0800, Jiancheng Xue wrote:
>> Hi Marek,
>> Firstly, thank you very much for your comments
Hi Stephen,
On 2016/4/16 8:41, Stephen Boyd wrote:
> On 04/15, Jiancheng Xue wrote:
>> Hi,
>>
>> On 2016/3/31 16:10, Jiancheng Xue wrote:
>>> From: Jiancheng Xue
>>>
>>> The CRG(Clock and Reset Generator) block provides clock
>&
In most of hisilicon SOCs, reset controller and clock provider are
combined together as a block named CRG (Clock and Reset Generator).
This patch mainly implements the reset function.
Signed-off-by: Jiancheng Xue
Acked-by: Philipp Zabel
---
This patch is abstracted from the patch https
Hi Stephen,
On 2016/4/16 8:40, Stephen Boyd wrote:
> On 03/31, Jiancheng Xue wrote:
>> diff --git a/drivers/clk/hisilicon/clk-hi3519.c
>> b/drivers/clk/hisilicon/clk-hi3519.c
>> new file mode 100644
>> index 000..ee9df82
>> --- /dev/null
>> +++ b/driver
From: Jiancheng Xue
Add hisilicon spi-nor flash controller driver
Signed-off-by: Binquan Peng
Signed-off-by: Jiancheng Xue
Acked-by: Rob Herring
Reviewed-by: Ezequiel Garcia
---
change log
v10:
Fixed issues pointed by Marek Vasut.
1)Droped the underscores in the argument names of some
: Jiancheng Xue
---
drivers/usb/host/ehci-platform.c | 41
1 file changed, 25 insertions(+), 16 deletions(-)
diff --git a/drivers/usb/host/ehci-platform.c b/drivers/usb/host/ehci-platform.c
index 1757ebb..a1358df 100644
--- a/drivers/usb/host/ehci-platform.c
+++ b
The CRG(Clock and Reset Generator) block provides clock
and reset signals for other modules in hi3519 soc.
Signed-off-by: Jiancheng Xue
Acked-by: Rob Herring
---
.../devicetree/bindings/clock/hi3519-crg.txt | 46
drivers/clk/hisilicon/Kconfig | 8
In most of hisilicon SOCs, reset controller and clock provider are
combined together as a block named CRG (Clock and Reset Generator).
This patch mainly implements the reset function.
Signed-off-by: Jiancheng Xue
Acked-by: Philipp Zabel
---
drivers/clk/hisilicon/Kconfig | 7 +++
drivers/clk
CLK_IS_ROOT.
-Added some cleanup codes in error case in the probe function.
-Removed module_exit(hi3519_clk_exit)
The reason is that this clock driver won't be removed during
the system running actually. Just like some clock drivers use
builtin_platform_driver().
Jiancheng Xue (3):
From: Jiancheng Xue
Change some arguments to constant type.
Export some hisilicon APIs to modules.
Signed-off-by: Jiancheng Xue
---
drivers/clk/hisilicon/clk.c | 23 +++
drivers/clk/hisilicon/clk.h | 14 +++---
2 files changed, 22 insertions(+), 15 deletions
Hi Alan,
On 2016/4/25 22:43, Alan Stern wrote:
> On Sat, 23 Apr 2016, Jiancheng Xue wrote:
>
>> Some generic-ehci compatible controllers have more than one reset signal
>> lines, e.g., Synopsys DWC USB2.0 Host-AHB Controller has two resets bus_reset
>> and roothub_re
Hi all,
I'll highly appreciated any of your comments.
On 2016/3/26 16:11, Jiancheng Xue wrote:
> Add hisilicon spi-nor flash controller driver
>
[...]
> +static int hisi_spi_nor_read(struct spi_nor *nor, loff_t from, size_t len,
> + size_t *retlen,
From: Jiancheng Xue
add compatible string for Hi3519 soc.
Signed-off-by: Jiancheng Xue
---
arch/arm/mach-hisi/hisilicon.c | 23 ---
1 file changed, 4 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-hisi/hisilicon.c b/arch/arm/mach-hisi/hisilicon.c
index 8cc6215
From: Jiancheng Xue
Hello,
Hi3519 soc is mainly used for ip camera and sport DV solutions. This patchset
adds initial support
for Hi3519 soc. It includes clock driver, arch configuration, debug uart
configuration and device tree.
It has been tested on hi3519 reference board.
PATCH 3~6 in
From: Jiancheng Xue
add hi3519 debug uart
Signed-off-by: Jiancheng Xue
---
arch/arm/Kconfig.debug | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index c6b6175..edd3fbe 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm
From: Jiancheng Xue
Add device tree bindings for Hi3519 system controller.
Signed-off-by: Jiancheng Xue
Acked-by: Rob Herring
---
.../devicetree/bindings/arm/hisilicon/hi3519-sysctrl.txt | 14 ++
1 file changed, 14 insertions(+)
create mode 100644
Documentation/devicetree
From: Jiancheng Xue
Change some arguments to constant type.
Export some hisilicon APIs to modules.
Signed-off-by: Jiancheng Xue
---
drivers/clk/hisilicon/clk.c | 23 +++
drivers/clk/hisilicon/clk.h | 14 +++---
2 files changed, 22 insertions(+), 15 deletions
From: Jiancheng Xue
add dts files for Hi3519
Signed-off-by: Jiancheng Xue
---
arch/arm/boot/dts/Makefile| 2 +
arch/arm/boot/dts/hi3519-demb.dts | 42 +
arch/arm/boot/dts/hi3519.dtsi | 187 ++
3 files changed, 231 insertions
From: Jiancheng Xue
The CRG(Clock and Reset Generator) block provides clock
and reset signals for other modules in hi3519 soc.
Signed-off-by: Jiancheng Xue
Acked-by: Rob Herring
Acked-by: Philipp Zabel
---
.../devicetree/bindings/clock/hi3519-crg.txt | 46
drivers/clk
Hi Marek,
On 2016/4/12 3:21, Marek Vasut wrote:
> On 04/11/2016 03:28 AM, Jiancheng Xue wrote:
>> Hi,
>>
>> On 2016/4/8 18:04, Marek Vasut wrote:
>>> On 04/08/2016 10:26 AM, Jiancheng Xue wrote:
>>>> Hi,
>>>>
>>>> On 2016/4/7 10:
Hi Boris,
On 2016/4/12 17:44, Boris Brezillon wrote:
> +Russell
>
> Hi Jiancheng,
>
> On Tue, 12 Apr 2016 17:32:08 +0800
> Jiancheng Xue wrote:
>
>> Hi Marek,
>>
>> On 2016/4/12 3:21, Marek Vasut wrote:
>>> On 04/11/2016 03:28 AM, Jiancheng
On 2016/12/15 4:06, Marty Plummer wrote:
> On 12/12/2016 01:11 AM, Jiancheng Xue wrote:
>>
>>
>> On 2016/12/9 23:07, Marty Plummer wrote:
>>> On 12/04/2016 08:03 PM, Jiancheng Xue wrote:
>>>> Hi Arnd,
>>>>
>>>> On 2016/10/17 21:
in the new version.
If there are no any other comments from others. I'll send the new version patch
out later.
Thanks,
Jiancheng
> Reviewed-by: Cyrille Pitchen
>
> Best regards,
>
> Cyrille
>
> Le 13/06/2016 10:21, Jiancheng Xue a écrit :
>> Add hisilicon
Hi Marc,
On 2016/6/21 20:49, Marc Zyngier wrote:
> On 21/06/16 13:01, Jiancheng Xue wrote:
>>
>>
>> On 2016/6/21 19:30, Jiancheng Xue wrote:
>>> Hi Marc，
>>>
>>> On 2016/6/21 18:36, Marc Zyngier wrote:
>>>> On 21/06/16 10:26, Jiancheng
From: Jiancheng Xue
Add device tree bindings for Hi3519 system controller.
Signed-off-by: Jiancheng Xue
Acked-by: Rob Herring
---
.../devicetree/bindings/arm/hisilicon/hi3519-sysctrl.txt | 14 ++
1 file changed, 14 insertions(+)
create mode 100644
Documentation/devicetree
From: Jiancheng Xue
add compatible string for Hi3519 soc.
Signed-off-by: Jiancheng Xue
---
arch/arm/mach-hisi/hisilicon.c | 23 ---
1 file changed, 4 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-hisi/hisilicon.c b/arch/arm/mach-hisi/hisilicon.c
index 8cc6215
From: Jiancheng Xue
add dts files for Hi3519
Signed-off-by: Jiancheng Xue
---
arch/arm/boot/dts/Makefile| 2 +
arch/arm/boot/dts/hi3519-demb.dts | 42 +
arch/arm/boot/dts/hi3519.dtsi | 187 ++
3 files changed, 231 insertions
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