Support counters on the DRAM controllers.
Signed-off-by: Jan Glauber
---
drivers/perf/uncore/Makefile| 3 +-
drivers/perf/uncore/uncore_cavium.c | 1 +
drivers/perf/uncore/uncore_cavium.h | 1 +
drivers/perf/uncore/uncore_cavium_lmc.c | 118
Support counters of the L2 Cache tag and data units.
Signed-off-by: Jan Glauber
---
drivers/perf/uncore/Makefile| 3 +-
drivers/perf/uncore/uncore_cavium.c | 1 +
drivers/perf/uncore/uncore_cavium.h | 1 +
drivers/perf/uncore/uncore_cavium_l2c_tad.c | 379
Support counters of the L2 cache crossbar connect.
Signed-off-by: Jan Glauber
---
drivers/perf/uncore/Makefile| 3 +-
drivers/perf/uncore/uncore_cavium.c | 1 +
drivers/perf/uncore/uncore_cavium.h | 1 +
drivers/perf/uncore/uncore_cavium_l2c_cbc.c | 148
Support for the OCX transmit link counters.
Signed-off-by: Jan Glauber
---
drivers/perf/uncore/Makefile| 3 +-
drivers/perf/uncore/uncore_cavium.c | 1 +
drivers/perf/uncore/uncore_cavium.h | 1 +
drivers/perf/uncore/uncore_cavium_ocx_tlk.c | 344
re not CPU related. A random CPU is picked regardless
of the NUMA node. There is a small performance penalty for accessing
counters on a remote note but reading a performance counter is a
slow operation anyway.
Signed-off-by: Jan Glauber
---
drivers/perf/Kconfig| 13 ++
dr
On Thu, Nov 10, 2016 at 04:54:06PM +, Mark Rutland wrote:
> > +/*
> > + * Some notes about the various counters supported by this "uncore" PMU
> > + * and the design:
> > + *
> > + * All counters are 64 bit long.
> > + * There are no overflow interrupts.
> > + * Counters are summarized per node
On Sat, Oct 29, 2016 at 01:55:29PM +0200, Jan Glauber wrote:
> > diff --git a/drivers/perf/uncore/uncore_cavium.c
> > b/drivers/perf/uncore/uncore_cavium.c
> > new file mode 100644
> > index 000..a7b4277
> > --- /dev/null
> > +++ b/drivers/perf/uncore/uncore_ca
eries applied?
No, that's new to me. Will try it.
> https://github.com/deater/perf_event_tests
>
> (build the tests and look under the fuzzer/ directory for the tool)
>
> On Sat, Oct 29, 2016 at 01:55:29PM +0200, Jan Glauber wrote:
> > Provide "uncore" faciliti
+0100, Corentin Labbe wrote:
> Hello
>
> I have some comment below
>
> On Mon, Dec 12, 2016 at 04:04:37PM +0100, Jan Glauber wrote:
> > From: Mahipal Challa
> >
> [...]
> > --- a/drivers/crypto/Makefile
> > +++ b/drivers/crypto/Makefile
> > @@ -27,6 +
On Tue, Dec 20, 2016 at 01:10:56PM +0100, Ulf Hansson wrote:
> Hi Jan,
>
> On 19 December 2016 at 13:15, Jan Glauber wrote:
> > While this patch series seems to be somehow overdue, in the meantime the
> > same MMC unit was re-used on Cavium's ThunderX SOC so our inter
on Octeon
- Fail fast on CRC errors (Steven)
- Document devicetree bindings
Cheers,
Jan
Jan Glauber (8):
mmc: cavium: Add core MMC driver for Cavium SOCs
mmc: octeon: Add MMC platform driver for Octeon SOCs
mmc: octeon: Work-around hardware bug on cn6xxx and cnf7xxx
mmc:
Add support for switching to DDR mode for eMMC devices.
Although the host controller only supports 3.3 Volt
and DDR52 uses 1.8 Volt according to the specification
it is possible to use DDR also with 3.3 Volt for eMMC chips.
To switch to DDR mode MMC_CAP_1_8V_DDR is required.
Signed-off-by: Jan
Add description of Cavium Octeon and ThunderX SOC device tree bindings.
CC: Ulf Hansson
CC: Rob Herring
CC: Mark Rutland
CC: devicet...@vger.kernel.org
Signed-off-by: Jan Glauber
---
.../devicetree/bindings/mmc/octeon-mmc.txt | 59 ++
1 file changed, 59
Add a platform driver for Octeon MIPS SOCs.
Signed-off-by: Jan Glauber
---
drivers/mmc/host/Kconfig | 10 ++
drivers/mmc/host/Makefile | 2 +
drivers/mmc/host/cavium_mmc.h | 19
drivers/mmc/host/octeon_platdrv_mmc.c | 183
Add Support for the scatter-gather DMA available in the
ThunderX MMC units. Up to 16 DMA requests can be processed
together.
Signed-off-by: Jan Glauber
---
drivers/mmc/host/cavium_core_mmc.c | 105 -
drivers/mmc/host/cavium_mmc.h | 54
ices is required because the host
controller is shared.
Signed-off-by: Jan Glauber
---
drivers/mmc/host/cavium_core_mmc.c | 1008
drivers/mmc/host/cavium_mmc.h | 303 +++
2 files changed, 1311 insertions(+)
create mode 100644 drivers/mmc/
Add a platform driver for ThunderX ARM SOCs.
Signed-off-by: Jan Glauber
---
drivers/mmc/host/Kconfig | 9 ++
drivers/mmc/host/Makefile | 2 +
drivers/mmc/host/cavium_mmc.h | 38 ++
drivers/mmc/host/thunderx_pcidrv_mmc.c | 214
Prevent data corruption on cn6xxx and cnf7xxx.
Due to an imperfection in the design of the MMC bus hardware,
the 2nd to last cache block of a DMA read must be locked into the L2
cache.
Signed-off-by: Jan Glauber
---
arch/mips/cavium-octeon/Makefile | 1 +
arch/mips/cavium-octeon/octeon
The MMC unit on Octeon cn7890 differs in that it has multiple
interrupts. Requires a lock for the interrupt handler. DMA addresses
have a dedicated 64 bit register now, so use that when available.
Signed-off-by: Jan Glauber
---
drivers/mmc/host/cavium_core_mmc.c| 16 ++-
drivers/mmc
Hi Herbert,
this series adds support for hardware accelerated compression & decompression
as found on ThunderX (arm64) SOCs. I've been reviewing this driver internally
for some time and would like to get feedback on the RFC to see if this goes
into the right direction and to see if there are any c
From: Mahipal Challa
Add statistics for compression/decompression hardware offload
under debugfs.
Signed-off-by: Mahipal Challa
Signed-off-by: Vishnu Nair
Signed-off-by: Jan Glauber
---
drivers/crypto/cavium/zip/zip_deflate.c | 10 ++
drivers/crypto/cavium/zip/zip_inflate.c | 12
decompression (RFC 2395 and ANSI X3.241-1994)
- ADLER32 and CRC32 checksums for ZLIB (RFC 1950) and GZIP (RFC 1952)
The ZIP engine is presented as a PCI device. It supports DMA and
scatter-gather.
Signed-off-by: Mahipal Challa
Signed-off-by: Vishnu Nair
Signed-off-by: Jan Glauber
---
drivers/crypto
From: Mahipal Challa
This contains changes for adding compression/decompression h/w offload
functionality for both DEFLATE and LZS.
Signed-off-by: Mahipal Challa
Signed-off-by: Vishnu Nair
Signed-off-by: Jan Glauber
---
drivers/crypto/cavium/zip/Makefile | 5 +-
drivers/crypto/cavium
On Tue, Mar 21, 2017 at 01:22:05PM -0700, David Daney wrote:
> On 03/21/2017 12:49 PM, Arnd Bergmann wrote:
> >On Tue, Mar 21, 2017 at 4:19 PM, David Daney
> >wrote:
> >>On 03/21/2017 01:58 AM, Arnd Bergmann wrote:
> >>>
> >>>On Mon, Mar 20, 2017 at 9:45 PM, David Daney
> >>>wrote:
>
>
On Fri, Mar 17, 2017 at 03:58:26PM +0100, Ulf Hansson wrote:
> On 10 March 2017 at 14:25, Jan Glauber wrote:
> > Add a platform driver for ThunderX ARM SOCs.
> >
> > Signed-off-by: Jan Glauber
> > ---
> > drivers/mmc/host/Kconfig | 10
On Fri, Mar 17, 2017 at 12:24:57PM +0100, Ulf Hansson wrote:
> On 10 March 2017 at 14:25, Jan Glauber wrote:
> > This core driver will be used by a MIPS platform driver
> > or by an ARM64 PCI driver. The core driver implements the
> > mmc_host_ops and slot probe & remove
On Mon, Mar 20, 2017 at 10:05:54AM +0100, Dmitry Vyukov wrote:
> On Mon, Mar 20, 2017 at 6:22 AM, Stephen Rothwell
> wrote:
> > Hi Andrew,
> >
> > After merging the akpm-current tree, today's linux-next build (x86_64
> > allmodconfig) produced these warnings:
> >
> > drivers/crypto/cavium/zip/zip
On Fri, Mar 17, 2017 at 02:35:34PM +0100, Ulf Hansson wrote:
> On 10 March 2017 at 14:25, Jan Glauber wrote:
> > Add a platform driver for Octeon MIPS SOCs.
> >
> > Signed-off-by: Jan Glauber
> > Signed-off-by: David Daney
> > Signed-off-by: Steven J. Hill
>
On Wed, Mar 15, 2017 at 04:57:37PM +0100, Arnd Bergmann wrote:
> On Fri, Mar 10, 2017 at 2:24 PM, Jan Glauber wrote:
> > Hi Ulf,
> >
> > I've not heard back from you regarding the bitfields so I assume this
> > means you're insisting on that point. I'd
On Fri, Mar 17, 2017 at 09:31:23AM +0100, Ulf Hansson wrote:
> On 10 March 2017 at 14:24, Jan Glauber wrote:
> > Add description of Cavium Octeon and ThunderX SOC device tree bindings.
> >
> > CC: Ulf Hansson
> > CC: Rob Herring
> > CC: Mark Rutland
&
On Fri, Mar 03, 2017 at 12:47:14PM +0100, Ulf Hansson wrote:
> On 6 February 2017 at 14:39, Jan Glauber wrote:
> > This core driver will be used by a MIPS platform driver
> > or by an ARM64 PCI driver. The core driver implements the
> > mmc_host_ops and slot pro
-mmc.c b/drivers/mmc/host/cavium-mmc.c
index b507a7a..b899720 100644
--- a/drivers/mmc/host/cavium-mmc.c
+++ b/drivers/mmc/host/cavium-mmc.c
@@ -13,6 +13,7 @@
* Steven J. Hill
* Jan Glauber
*/
+#include
#include
#include
#include
@@ -151,14 +152,14 @@ static struct cvm_mm
Add a platform driver for Octeon MIPS SOCs.
Signed-off-by: Jan Glauber
Signed-off-by: David Daney
Signed-off-by: Steven J. Hill
---
drivers/mmc/host/Kconfig | 10 ++
drivers/mmc/host/Makefile | 2 +
drivers/mmc/host/cavium-pltfm-octeon.c | 183
Add a platform driver for ThunderX ARM SOCs.
Signed-off-by: Jan Glauber
---
drivers/mmc/host/Kconfig | 10 ++
drivers/mmc/host/Makefile | 2 +
drivers/mmc/host/cavium-mmc.h | 10 +-
drivers/mmc/host/cavium-pci-thunderx.c | 198
Prevent data corruption on cn6xxx and cnf7xxx.
Due to an imperfection in the design of the MMC bus hardware,
the 2nd to last cache block of a DMA read must be locked into the L2
cache.
Signed-off-by: Jan Glauber
Signed-off-by: David Daney
Signed-off-by: Steven J. Hill
---
arch/mips/cavium
sions:
v10: https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1295316.html
v9: http://marc.info/?l=linux-mmc&m=147431759215233&w=2
Cheers,
Jan
---
Jan Glauber (9):
dt-bindings: mmc: Add Cavium SOCs MMC bindings
mmc: cavium: Add core MMC driver for Cavium SOCs
mmc: cavium: Add
The MMC unit on Octeon cn7890 differs in that it has multiple
interrupts. Requires a lock for the interrupt handler. DMA addresses
have a dedicated 64 bit register now, so use that when available.
Signed-off-by: Jan Glauber
Signed-off-by: David Daney
Signed-off-by: Steven J. Hill
---
drivers
Add Support for the scatter-gather DMA available in the
ThunderX MMC units. Up to 16 DMA requests can be processed
together.
Signed-off-by: Jan Glauber
---
drivers/mmc/host/cavium-mmc.c | 104 -
drivers/mmc/host/cavium-mmc.h | 16 +
drivers
Signed-off-by: Jan Glauber
Signed-off-by: David Daney
Signed-off-by: Steven J. Hill
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index c265a5f..ead1e89 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3041,6 +3041,14 @@ S: Supported
for all MMC devices is required because the host
controller is shared.
Signed-off-by: Jan Glauber
Signed-off-by: David Daney
Signed-off-by: Steven J. Hill
---
drivers/mmc/host/cavium-mmc.c | 988 ++
drivers/mmc/host/cavium-mmc.h | 178
2 f
Add support for switching to DDR mode for eMMC devices.
Signed-off-by: Jan Glauber
---
drivers/mmc/host/cavium-mmc.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/cavium-mmc.c b/drivers/mmc/host/cavium-mmc.c
index fb6e1c1..e340b95 100644
--- a
Add description of Cavium Octeon and ThunderX SOC device tree bindings.
CC: Ulf Hansson
CC: Rob Herring
CC: Mark Rutland
CC: devicet...@vger.kernel.org
Signed-off-by: Jan Glauber
Signed-off-by: David Daney
Signed-off-by: Steven J. Hill
Acked-by: Rob Herring
---
.../devicetree/bindings
On Fri, Mar 03, 2017 at 12:47:06PM +0100, Ulf Hansson wrote:
> On 6 February 2017 at 14:39, Jan Glauber wrote:
> > Add description of Cavium Octeon and ThunderX SOC device tree bindings.
> >
> > CC: Ulf Hansson
> > CC: Rob Herring
> > CC: Mark Rutland
&
Add support for reading the system clock and the TWSI clock
frequency from ACPI DSDT.
TWSI clock was already covered by using device_property_read().
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-thunderx-pcidrv.c | 24 +++-
1 file changed, 15 insertions(+), 9
Using pci_alloc_irq_vectors() instead of the deprecated
pci_enable_msix() allows to remove the msix_entry from
struct octeon_i2c and thus to get rid of the config symbol check.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon-core.h | 4
drivers/i2c/busses/i2c-thunderx
On Wed, Feb 15, 2017 at 01:34:40PM +0100, Arnd Bergmann wrote:
> On Mon, Feb 13, 2017 at 4:45 PM, Ulf Hansson wrote:
> > On 13 February 2017 at 16:24, Jan Glauber
> > wrote:
> >> On Sun, Feb 12, 2017 at 09:09:29AM +0800, kbuild test robot wrote:
> >>> Hi Jan
e system]
>
> url:
> https://github.com/0day-ci/linux/commits/Jan-Glauber/Cavium-MMC-driver/20170206-214740
> config: arm64-allmodconfig (attached as .config)
> compiler: aarch64-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
> reproduce:
> wget
> https://git.kernel.org/cgi
The MMC unit on Octeon cn7890 differs in that it has multiple
interrupts. Requires a lock for the interrupt handler. DMA addresses
have a dedicated 64 bit register now, so use that when available.
Signed-off-by: Jan Glauber
Signed-off-by: David Daney
Signed-off-by: Steven J. Hill
---
drivers
Add Support for the scatter-gather DMA available in the
ThunderX MMC units. Up to 16 DMA requests can be processed
together.
Signed-off-by: Jan Glauber
Signed-off-by: David Daney
Signed-off-by: Steven J. Hill
---
drivers/mmc/host/cavium-mmc.c | 105
msg1295316.html
v9: http://marc.info/?l=linux-mmc&m=147431759215233&w=2
Cheers,
Jan
---
Jan Glauber (9):
dt-bindings: mmc: Add Cavium SOCs MMC bindings
mmc: cavium: Add core MMC driver for Cavium SOCs
mmc: cavium: Add MMC platform driver for Octeon SOCs
mmc: cavium: Work-
Signed-off-by: Jan Glauber
Signed-off-by: David Daney
Signed-off-by: Steven J. Hill
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 2c171ad..81afd78 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2999,6 +2999,14 @@ S: Supported
Prevent data corruption on cn6xxx and cnf7xxx.
Due to an imperfection in the design of the MMC bus hardware,
the 2nd to last cache block of a DMA read must be locked into the L2
cache.
Signed-off-by: Jan Glauber
Signed-off-by: David Daney
Signed-off-by: Steven J. Hill
---
arch/mips/cavium
Add support for switching to DDR mode for eMMC devices.
Although the host controller only supports 3.3 Volt
and DDR52 uses 1.8 Volt according to the specification
it is possible to use DDR also with 3.3 Volt for eMMC chips.
To switch to DDR mode MMC_CAP_1_8V_DDR is required.
Signed-off-by: Jan
Add a platform driver for Octeon MIPS SOCs.
Signed-off-by: Jan Glauber
Signed-off-by: David Daney
Signed-off-by: Steven J. Hill
---
drivers/mmc/host/Kconfig | 10 ++
drivers/mmc/host/Makefile | 2 +
drivers/mmc/host/cavium-mmc.h | 19
drivers/mmc
Add description of Cavium Octeon and ThunderX SOC device tree bindings.
CC: Ulf Hansson
CC: Rob Herring
CC: Mark Rutland
CC: devicet...@vger.kernel.org
Signed-off-by: Jan Glauber
Signed-off-by: David Daney
Signed-off-by: Steven J. Hill
---
.../devicetree/bindings/mmc/cavium-mmc.txt
ices is required because the host
controller is shared.
Signed-off-by: Jan Glauber
Signed-off-by: David Daney
Signed-off-by: Steven J. Hill
---
drivers/mmc/host/cavium-mmc.c | 1029 +
drivers/mmc/host/cavium-mmc.h | 303
2 files changed,
Add a platform driver for ThunderX ARM SOCs.
Signed-off-by: Jan Glauber
Signed-off-by: David Daney
Signed-off-by: Steven J. Hill
---
drivers/mmc/host/Kconfig | 10 ++
drivers/mmc/host/Makefile | 2 +
drivers/mmc/host/cavium-mmc.h | 38 ++
drivers
Remove the warning about a too long SMBUS message because
the ipmi_ssif driver triggers this warning too frequently so it
spams the message log.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/i2c
Testing ipmi_ssif on ThunderX several bugs were found that also
apply to the Octeon i2c driver changes coming with 4.7.
I'll need to rebase the pending ThunderX driver series after this
fixes which I'll do shortly.
Please consider for 4.7.
thanks,
Jan
Jan Glauber (3):
i2c: octeo
received.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-octeon.c
index aa5f01e..1922e4a 100644
--- a/drivers/i2c/busses/i2c-octeon.c
+++ b/drivers
The controller specification states that when receiving STAT_RXADDR_NAK
the START should be sent again. Retry several times before finally
failing with -ENXIO.
Without this change the IPMI SSIF driver fails executing several commands
like 'ipmitool fru' on ThunderX.
Signed-off-by: J
Add ThunderX SPI driver using the shared part from the Octeon
driver. The main difference of the ThunderX driver is that it
is a PCI device so probing is different. The system clock settings
can be specified in device tree.
Signed-off-by: Jan Glauber
---
drivers/spi/Kconfig | 7
On Tue, Jun 28, 2016 at 11:24:20AM +0100, Will Deacon wrote:
> Hi Jan,
>
> On Wed, Mar 09, 2016 at 05:21:02PM +0100, Jan Glauber wrote:
> > This patch series provides access to various counters on the ThunderX SOC.
> >
> > For details of the uncore implementation see
On Fri, Feb 12, 2016 at 05:36:59PM +, Mark Rutland wrote:
> On Fri, Feb 12, 2016 at 05:55:06PM +0100, Jan Glauber wrote:
[...]
> > +int thunder_uncore_event_init(struct perf_event *event)
> > +{
> > + struct hw_perf_event *hwc = &event->hw;
> >
On Sat, Mar 12, 2016 at 04:35:00PM +0100, Wolfram Sang wrote:
> On Mon, Mar 07, 2016 at 04:10:45PM +0100, Jan Glauber wrote:
> > Cleanup only without functional change.
>
> I like most of the changes, but there are still some functional changes
> left.
>
> > -static
On Sat, Mar 12, 2016 at 04:37:15PM +0100, Wolfram Sang wrote:
> On Mon, Mar 07, 2016 at 04:10:46PM +0100, Jan Glauber wrote:
> > From: David Daney
> >
> > Use resource start and size directly.
> >
> > Signed-off-by: David Daney
> > Signed-off-by: Jan
On Sat, Mar 12, 2016 at 04:46:12PM +0100, Wolfram Sang wrote:
> On Mon, Mar 07, 2016 at 04:10:48PM +0100, Jan Glauber wrote:
> > From: Peter Swain
> >
> > Make the i2c adapter timeout a module parameter to allow upper-level
> > target device drivers to retry with their
what's
achievable, and much better than the worst-case 100 bytes/sec before.
Signed-off-by: Peter Swain
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
drivers/i2c/busses/i2c-octeon.c | 31 ++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/dr
--
David Daney (4):
i2c-octeon: Support I2C_M_RECV_LEN
i2c-octeon: Enable high-level controller and improve on bus contention
i2c-octeon: Add support for cn78XX chips
i2c-octeon: Add workaround for chips with broken irqs
Jan Glauber
of non-final read
msgs too.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 583 ++--
1 file changed, 504 insertions(+), 79 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-o
Add smbus alert interrupt support.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-cavium.h| 6 ++
drivers/i2c/busses/i2c-thunderx-core.c | 35 ++
2 files changed, 41 insertions(+)
diff --git a/drivers/i2c/busses/i2c-cavium.h b/drivers/i2c
The ThunderX SOC uses the same i2c block as the Octeon SOC.
The main difference is that on ThunderX the device is a PCI device
so device probing is done via PCI.
Split the current Octeon driver into an Octeon and a common part
and add the ThunderX support.
Signed-off-by: Jan Glauber
From: David Daney
CN3860 does not interrupt the CPU when the i2c status changes. If
we get a timeout, and see the status has in fact changed, we know we
have this problem, and drop back to polling.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c
Cleanup only without functional change.
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
drivers/i2c/busses/i2c-octeon.c | 442 +---
1 file changed, 230 insertions(+), 212 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses
From: David Daney
If I2C_M_RECV_LEN is set consider the length byte.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c
From: Peter Swain
Signed-off-by: Peter Swain
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
drivers/i2c/busses/i2c-octeon.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-octeon.c
index
From: David Daney
cn78XX has a different interrupt architecture, so we have to manage
the interrupts differently.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 156 ++--
1 file changed, 136 insertions(+), 20
Add compatible string for Cavium Octeon cn78XX SOCs TWSI.
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
Documentation/devicetree/bindings/i2c/i2c-octeon.txt | 6 ++
1 file changed, 6 insertions
On Sat, Mar 05, 2016 at 07:47:31PM +0100, Wolfram Sang wrote:
> Hi Jan,
>
> The description is not enough. A list what kind of changes you applied
> would be nice.
OK.
> I'd like to have these checkpatch issues fixed:
>
> ERROR: trailing statements should be on next line
> #177: FILE: drivers/i
From: David Daney
CN3860 does not interrupt the CPU when the i2c status changes. If
we get a timeout, and see the status has in fact changed, we know we
have this problem, and drop back to polling.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 46
From: David Daney
If I2C_M_RECV_LEN is set consider the length byte.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 19 +++
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers
while committing
a newly written page (5ms on typical devices).
Signed-off-by: Peter Swain
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-octeon.c
index
From: David Daney
Use resource start and size directly.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-octeon.c
the result is not used
(octeon_i2c_stop, octeon_i2c_setclock)
- update Copyright
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 176 ++--
1 file changed, 77 insertions(+), 99 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers
what's
achievable, and much better than the worst-case 100 bytes/sec before.
Signed-off-by: Peter Swain
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
drivers/i2c/busses/i2c-octeon.c | 31 ++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/dr
The ThunderX SOC uses the same i2c block as the Octeon SOC.
The main difference is that on ThunderX the device is a PCI device
so device probing is done via PCI, interrupts are MSIX and the
clock is taken from device tree.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/Kconfig
Add smbus alert interrupt support.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-cavium.h| 5 +
drivers/i2c/busses/i2c-thunderx-core.c | 35 ++
2 files changed, 40 insertions(+)
diff --git a/drivers/i2c/busses/i2c-cavium.h b/drivers/i2c
Move common functionality into a separate file in preparation of the
re-use from the ThunderX i2c driver.
Use a broken_irq_check flag to avoid including the
OCTEON_IS_MODEL test in the shared part.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/Makefile |1 +
drivers/i2c/busses
Add compatible string for Cavium Octeon cn78XX SOCs TWSI.
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
Documentation/devicetree/bindings/i2c/i2c-octeon.txt | 6 ++
1 file changed, 6 insertions
Remove point after parameter description and replace kerneldoc
by a comment if it has no additional no value.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 89 ++---
1 file changed, 39 insertions(+), 50 deletions(-)
diff --git a/drivers
From: Peter Swain
Signed-off-by: Peter Swain
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
drivers/i2c/busses/i2c-octeon.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-octeon.c
index
rotocol that !ACK is an acceptable
response: in the final byte of a read cycle. In this case the
destination is not saying that the transfer failed, just that it
doesn't want more data.
This enables correct behavior of ACK on final byte of non-final read
msgs too.
Signed-off-by: David Daney
S
improve on bus contention
i2c-octeon: Add support for cn78XX chips
i2c-octeon: Add workaround for broken irqs on CN3860
Jan Glauber (6):
i2c-octeon: Cleanup kerneldoc comments
i2c-octeon: Cleanup i2c-octeon driver
dt-bindings: i2c: Add Octeon cn78xx TWSI
i2c-octeon: Split the driver into two
From: David Daney
cn78XX has a different interrupt architecture, so we have to manage
the interrupts differently.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 149 +++-
1 file changed, 133 insertions(+), 16
a
day, but nevertheless I think we should avoid this problem by
removing the debug print completly or using another print variant.
The same problem seems to be reported here:
https://bugs.freedesktop.org/show_bug.cgi?id=76886
Signed-off-by: Jan Glauber
---
drivers/i2c/i2c-core.c | 2 +-
1 file
On Wed, Mar 23, 2016 at 05:50:33PM +0100, Wolfram Sang wrote:
> On Wed, Mar 23, 2016 at 04:50:47PM +0100, Jan Glauber wrote:
> > After enabling CONFIG_I2C_DEBUG_CORE my system was broken
> > (no network, console login not possible). System log was
> > flooded
On Thu, Feb 18, 2016 at 05:32:48PM +, Will Deacon wrote:
> On Thu, Feb 18, 2016 at 05:50:12PM +0100, Jan Glauber wrote:
> > Add a compatible string for the Cavium ThunderX PMU.
>
> Stupid question, but is "thunder" the name of the CPU or the SoC or ...?
>
>
On Thu, Feb 18, 2016 at 05:34:28PM +, Will Deacon wrote:
> On Thu, Feb 18, 2016 at 05:50:13PM +0100, Jan Glauber wrote:
> > With the long cycle counter bit (LC) disabled the cycle counter is not
> > working on ThunderX SOC (ThunderX only implements Aarch64).
> &g
On Wed, Feb 03, 2016 at 06:11:55PM +0100, Jan Glauber wrote:
> Hi,
>
> I'm reposting the whole series just in case my previous attempt to
> repost only the broken patch was confusing. Patches are based on
> 4.5-rc2.
Can I get a review for these patches?
thanks,
Jan
>
Support for the OCX transmit link counters.
Signed-off-by: Jan Glauber
---
arch/arm64/kernel/uncore/Makefile| 3 +-
arch/arm64/kernel/uncore/uncore_cavium.c | 3 +
arch/arm64/kernel/uncore/uncore_cavium.h | 4 +
arch/arm64/kernel/uncore
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