On Fri, Oct 05, 2018 at 01:13:52PM +0200, Dmitry Vyukov wrote:
> On Fri, Oct 5, 2018 at 12:16 PM, Jan Glauber wrote:
> > Hi,
> >
> > I'm getting below warning when I enable CONFIG_KASAN_EXTRA=y on a arm64
> > ThunderX2 system.
> > As far as I can tell
On Tue, May 22, 2018 at 01:54:14PM +0200, Wolfram Sang wrote:
> On Wed, May 16, 2018 at 12:00:19AM -0700, George Cherian wrote:
> > The i2c XLP9xx driver is maintained by Cavium.
> > Add George Cherian and Jan Glauber as the Maintainers.
> >
> > Si
On Wed, Mar 28, 2018 at 03:05:56PM +0200, Jan Glauber wrote:
> Enabling virtual mapped kernel stacks breaks the thunderx_zip
> driver. On compression or decompression the executing CPU hangs
> in an endless loop. The reason for this is the usage of __pa
> by the driver which does no
small delay between the reading attempts.
Signed-off-by: Jan Glauber
Reviewed-by: Robert Richter
Cc: stable # 4.14
---
drivers/crypto/cavium/zip/common.h | 22 ++
drivers/crypto/cavium/zip/zip_deflate.c | 4 ++--
drivers/crypto/cavium/zip/zip_inflate.c | 4 ++--
3 files
forever for the completion byte to contain a non-zero value.
Allocating the result struct from 1:1 mapped memory resolves this
bug.
Signed-off-by: Jan Glauber
Reviewed-by: Robert Richter
Cc: stable # 4.14
---
drivers/crypto/cavium/zip/zip_crypto.c | 22 ++
1 file changed, 14
On Fri, Mar 02, 2018 at 03:37:36PM +0100, Jan Glauber wrote:
> Without this option the NIC on ThunderX1 is not coming up
> so enable it to get a working network interface.
>
> Signed-off-by: Jan Glauber
> ---
> arch/arm64/configs/defconfig | 1 +
> 1 file changed, 1 inserti
v=2 but call
show() once to print the status line also for multiple reads.
Fixes: 1f4aace60b0e ("fs/seq_file.c: simplify seq_file iteration code and
interface")
Signed-off-by: Jan Glauber
---
drivers/md/md.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drive
Make sys_recv a first class citizen by using the SYSCALL_DEFINEx
macro. Besides being cleaner this will also generate meta data
for the system call so tracing tools like ftrace or LTTng can
resolve this system call.
Signed-off-by: Jan Glauber
---
net/socket.c |4 ++--
1 file changed, 2
On Wed, Apr 13, 2016 at 10:44:09AM +0200, Wolfram Sang wrote:
> On Mon, Apr 11, 2016 at 05:28:34PM +0200, Jan Glauber wrote:
> > octeon_i2c_read_sw -> octeon_i2c_reg_read
> > octeon_i2c_write_sw -> octeon_i2c_reg_write
> >
> > Signed-off-by: Jan Glauber
>
On Wed, Apr 13, 2016 at 10:55:20AM +0200, Wolfram Sang wrote:
>
> Please have a look at Documentation/i2c/fault-codes. -EAGAIN is only for
> arbitration loss.
>
> > + /* ACK allowed on pre-terminal bytes only */
> > + case STAT_RXDATA_ACK:
> > + if (!final_read)
> > +
On Wed, Apr 13, 2016 at 10:45:21AM +0200, Wolfram Sang wrote:
> On Mon, Apr 11, 2016 at 05:28:35PM +0200, Jan Glauber wrote:
> > Add helper functions for control, data and status register access.
> >
> > Signed-off-by: Jan Glauber
>
> Same as patch 3.
>
Update
Hi Jeremy,
I've tested the patches on ThunderX and got perf running with ACPI,
so you can add my Tested-by if you like.
Thanks,
Jan
On Tue, Apr 12, 2016 at 03:21:05PM -0500, Jeremy Linton wrote:
> v3->v4:
> Correct build issues with ARM (!ARM64) kernels.
> Add ThunderX to list of PMU types.
>
>
data
about all other CPUs too.
Therefore remove the stack dump and printk of other CPUs
and only print a single line that the other CPUs are going to be
stopped.
Signed-off-by: Jan Glauber
---
arch/arm64/kernel/smp.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a
This is an intermediate commit in preparation of the driver split.
The module rename in this commit will be reverted in the next patch,
this is just done to make the series bisectible.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/Makefile| 2 +-
drivers/i2c
-smbus.h includes
- Use IS_ENABLED for CONFIG options
Jan
-
Jan Glauber (8):
i2c: octeon: Rename driver to prepare for split
i2c: octeon: Split the driver into two parts
i2c: thunderx: Add i2c driver for ThunderX SOC
i2c: thunderx: Add smbus alert
Initialize booleon values with true instead of 1.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-cavium.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-cavium.c b/drivers/i2c/busses/i2c-cavium.c
index e95ee5c..140f0d1 100644
--- a/drivers
Add smbus alert interrupt support.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-cavium.h| 6 ++
drivers/i2c/busses/i2c-thunderx-core.c | 35 ++
2 files changed, 41 insertions(+)
diff --git a/drivers/i2c/busses/i2c-cavium.h b/drivers/i2c
The ThunderX SOC uses the same i2c block as the Octeon SOC.
The main difference is that on ThunderX the device is a PCI device
so device probing is done via PCI, interrupts are MSIX and the
clock is taken from device tree.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/Kconfig
The register offsets are different between Octeon and ThunderX so move
them into the algorithm struct and get rid of the define.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-cavium.c| 28 +--
drivers/i2c/busses/i2c-cavium.h| 35
Sort include files alphabetically to reduce probability of merge
conflicts.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon-core.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon-core.c
b/drivers/i2c/busses/i2c-octeon
Move common functionality into a separate file in preparation of the
re-use from the ThunderX i2c driver.
Functions are slightly re-ordered but no other changes are included.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/Makefile | 3 +-
drivers/i2c/busses/i2c-cavium.c
The i2c Octeon and ThunderX drivers are maintained by Cavium.
While at it fix the whitespace errors of the next entry.
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
MAINTAINERS | 25 +
1 file changed, 17 insertions(+), 8 deletions(-)
diff --git a/MAINTAINERS b
Hi Wolfram,
we want to add ACPI support to the ThunderX i2c driver
because it is meant for servers and some distributions
require ACPI there. The changes are small but I'll post
a new version of the remaining patches shortly.
Thanks,
Jan
On Mon, May 02, 2016 at 07:35:40PM +0200, Jan Gl
driver on MIPS
- Re-ordered some thunderx probe functions for readability
- Fix missing of_irq.h and i2c-smbus.h includes
- Use IS_ENABLED for CONFIG options
Thanks,
Jan
-
Jan Glauber (8):
i2c: octeon: Rename driver to prepare for split
i2c
The ThunderX SOC uses the same i2c block as the Octeon SOC.
The main difference is that on ThunderX the device is a PCI device
so device probing is done via PCI, interrupts are MSI-X. The
clock rates can be set via device tree or ACPI.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/Kconfig
Initialize booleon values with true instead of 1.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-cavium.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-cavium.c b/drivers/i2c/busses/i2c-cavium.c
index e95ee5c..140f0d1 100644
--- a/drivers
Sort include files alphabetically to reduce probability of merge
conflicts.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon-core.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon-core.c
b/drivers/i2c/busses/i2c-octeon
The register offsets are different between Octeon and ThunderX so move
them into the algorithm struct and get rid of the define.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-cavium.c| 28 +--
drivers/i2c/busses/i2c-cavium.h| 35
Add SMBUS alert interrupt support. For now only device tree is
supported for specifying the alert. In case of ACPI an error
is returned.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-cavium.h| 6
drivers/i2c/busses/i2c-thunderx-core.c | 51
Move common functionality into a separate file in preparation of the
re-use from the ThunderX i2c driver.
Functions are slightly re-ordered but no other changes are included.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/Makefile | 3 +-
drivers/i2c/busses/i2c-cavium.c
The i2c Octeon and ThunderX drivers are maintained by Cavium.
While at it fix the whitespace errors of the next entry.
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
MAINTAINERS | 25 +
1 file changed, 17 insertions(+), 8 deletions(-)
diff --git a/MAINTAINERS b
This is an intermediate commit in preparation of the driver split.
The module rename in this commit will be reverted in the next patch,
this is just done to make the series bisectible.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/Makefile| 2 +-
drivers/i2c
On Tue, Apr 26, 2016 at 11:17:59PM +0200, Wolfram Sang wrote:
> On Mon, Apr 25, 2016 at 04:33:38PM +0200, Jan Glauber wrote:
> > From: David Daney
> >
> > CN3860 does not interrupt the CPU when the i2c status changes. If
> > we get a timeout, and see the status has
From: David Daney
CN3860 does not interrupt the CPU when the i2c status changes. If
we get a timeout, and see the status has in fact changed, we know we
have this problem, and drop back to polling.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 53
On Tue, Apr 26, 2016 at 02:53:54PM +0100, Will Deacon wrote:
[...]
> >
> > That sounds like a good compromise.
> >
> > So I could do the following:
> >
> > 1) In the uncore setup check for CONFIG_NUMA, if set use the NUMA
> >information to determine the device node
> >
> > 2) If CONFIG_NU
On Tue, Feb 16, 2016 at 03:12:53PM +, Will Deacon wrote:
> On Tue, Feb 16, 2016 at 09:00:15AM +0100, Jan Glauber wrote:
> > On Mon, Feb 15, 2016 at 08:04:04PM +, Will Deacon wrote:
> >
> > [...]
> >
> > > On Wed, Feb 03, 2016 at
for chips with broken irqs
Jan Glauber (2):
i2c-octeon: Cleanup i2c-octeon driver
dt-bindings: i2c: add Octeon cn78xx TWSI
Peter Swain (2):
i2c-octeon: Flush TWSI writes with readback
i2c-octeon: Faster operation when IFLG signals late
.../devicetree/bindings/i2c/i2c-octeon.txt
Cleanup only without functional change.
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
drivers/i2c/busses/i2c-octeon.c | 442 +---
1 file changed, 230 insertions(+), 212 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses
From: David Daney
If I2C_M_RECV_LEN is set consider the length byte.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c
what's
achievable, and much better than the worst-case 100 bytes/sec before.
Signed-off-by: Peter Swain
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
drivers/i2c/busses/i2c-octeon.c | 31 ++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/dr
From: Peter Swain
Signed-off-by: Peter Swain
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
drivers/i2c/busses/i2c-octeon.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-octeon.c
index
Add compatible string for Cavium Octeon cn78XX SOCs TWSI.
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
Documentation/devicetree/bindings/i2c/i2c-octeon.txt | 6 ++
1 file changed, 6 insertions
From: David Daney
cn78XX has a different interrupt architecture, so we have to manage
the interrupts differently.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 156 ++--
1 file changed, 136 insertions(+), 20
From: David Daney
CN3860 does not interrupt the CPU when the i2c status changes. If
we get a timeout, and see the status has in fact changed, we know we
have this problem, and drop back to polling.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c
of non-final read
msgs too.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 583 ++--
1 file changed, 504 insertions(+), 79 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-o
On Mon, Feb 15, 2016 at 08:06:13PM +, Will Deacon wrote:
> On Mon, Feb 15, 2016 at 07:40:37PM +, Will Deacon wrote:
> > On Wed, Feb 03, 2016 at 06:11:56PM +0100, Jan Glauber wrote:
> > > The implemented Cortex A57 events are not A57 specific.
> > > They are re
On Thu, Feb 18, 2016 at 11:24:29AM +, Will Deacon wrote:
> On Thu, Feb 18, 2016 at 10:13:07AM +0100, Jan Glauber wrote:
> > On Mon, Feb 15, 2016 at 08:06:13PM +, Will Deacon wrote:
> > > On Mon, Feb 15, 2016 at 07:40:37PM +, Will Deacon wrote:
> > > > On W
ARMv8.1 increases the PMU event number space to 16 bit so increase
the EVTYPE mask.
Signed-off-by: Jan Glauber
---
arch/arm64/kernel/perf_event.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index c68fa98
Add a compatible string for the Cavium ThunderX PMU.
Signed-off-by: Jan Glauber
---
Documentation/devicetree/bindings/arm/pmu.txt | 1 +
arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 5 +
2 files changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/pmu.txt
b
d arm compile errors
Changes to v1:
- renamed thunderx dt pmu binding to thunder
Jan
----
Jan Glauber (5):
arm64/perf: Rename Cortex A57 events
arm64/perf: Add Cavium ThunderX PMU support
arm64: dts: Add Cavium ThunderX specific PMU
counter always sets the upper
32 bits so overflow interrupts are generated as before.
Original patch from Andrew Pinksi
Signed-off-by: Jan Glauber
---
arch/arm64/kernel/perf_event.c | 21 -
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/kernel
The implemented Cortex A57 events are strictly-speaking not
A57 specific. They are ARM recommended implementation defined events
and can be found on other ARMv8 SOCs like Cavium ThunderX too.
Therefore rename these events to allow using them in other
implementations too.
Signed-off-by: Jan
icache prefetch counters
Signed-off-by: Jan Glauber
---
arch/arm64/kernel/perf_event.c | 69 +-
1 file changed, 68 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index 2adbcb5..0ed05f6 100644
On Thu, Feb 18, 2016 at 05:34:28PM +, Will Deacon wrote:
> On Thu, Feb 18, 2016 at 05:50:13PM +0100, Jan Glauber wrote:
> > With the long cycle counter bit (LC) disabled the cycle counter is not
> > working on ThunderX SOC (ThunderX only implements Aarch64).
> &g
David Daney (4):
i2c-octeon: Support I2C_M_RECV_LEN
i2c-octeon: Enable high-level controller and improve on bus contention
i2c-octeon: Add support for cn78XX chips
i2c-octeon: Add workaround for chips with broken irqs
Jan Glauber (4):
i2c-octeon: Cleanup i2c-octeon driver
dt-bindings: i2c
The ThunderX SOC uses the same i2c block as the Octeon SOC.
The main difference is that on ThunderX the device is a PCI device
so device probing is done via PCI.
Split the current Octeon driver into an Octeon and a common part
and add the ThunderX support.
Signed-off-by: Jan Glauber
Cleanup only without functional change.
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
drivers/i2c/busses/i2c-octeon.c | 442 +---
1 file changed, 230 insertions(+), 212 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses
From: David Daney
If I2C_M_RECV_LEN is set consider the length byte.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c
of non-final read
msgs too.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 583 ++--
1 file changed, 504 insertions(+), 79 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-o
Add smbus alert interrupt support.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-cavium.h| 4
drivers/i2c/busses/i2c-thunderx-core.c | 31 +++
2 files changed, 35 insertions(+)
diff --git a/drivers/i2c/busses/i2c-cavium.h b/drivers/i2c/busses
From: Peter Swain
Signed-off-by: Peter Swain
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
drivers/i2c/busses/i2c-octeon.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-octeon.c
index
Add compatible string for Cavium Octeon cn78XX SOCs TWSI.
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
Documentation/devicetree/bindings/i2c/i2c-octeon.txt | 6 ++
1 file changed, 6 insertions
From: David Daney
CN3860 does not interrupt the CPU when the i2c status changes. If
we get a timeout, and see the status has in fact changed, we know we
have this problem, and drop back to polling.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c
From: David Daney
cn78XX has a different interrupt architecture, so we have to manage
the interrupts differently.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 156 ++--
1 file changed, 136 insertions(+), 20
what's
achievable, and much better than the worst-case 100 bytes/sec before.
Signed-off-by: Peter Swain
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
drivers/i2c/busses/i2c-octeon.c | 31 ++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/dr
Hi Mark,
thanks for reviewing! I'll need several mails to address all questions.
On Fri, Feb 12, 2016 at 05:36:59PM +, Mark Rutland wrote:
> On Fri, Feb 12, 2016 at 05:55:06PM +0100, Jan Glauber wrote:
> > Provide uncore facilities for non-CPU performance counter units.
>
On Mon, Feb 15, 2016 at 02:27:27PM +, Mark Rutland wrote:
> > > > 1) The PMU detection solely relies on PCI device detection. If a
> > > >matching PCI device is found the PMU is created. The code can deal
> > > >with multiple units of the same type, e.g. more than one memory
> > > >
On Mon, Feb 15, 2016 at 08:04:04PM +, Will Deacon wrote:
[...]
> On Wed, Feb 03, 2016 at 06:12:00PM +0100, Jan Glauber wrote:
> > + cpu_pmu->event_mask = 0x; /* ARMv8.1 extended events */
> > + else
> > + cpu_pmu->event_mask = ARMV8_EVTY
On Mon, Feb 15, 2016 at 07:55:29PM +, Will Deacon wrote:
> On Wed, Feb 03, 2016 at 06:11:59PM +0100, Jan Glauber wrote:
> > @@ -768,8 +776,11 @@ static void armv8pmu_reset(void *info)
> > armv8pmu_disable_intens(idx);
> > }
> >
> > - /* Init
On Fri, Feb 12, 2016 at 05:36:59PM +, Mark Rutland wrote:
> On Fri, Feb 12, 2016 at 05:55:06PM +0100, Jan Glauber wrote:
> > Provide uncore facilities for non-CPU performance counter units.
> > Based on Intel/AMD uncore pmu support.
> >
> > The uncore PMUs
The ThunderX SOC uses the same i2c block as the Octeon SOC.
The main difference is that on ThunderX the device is a PCI device
so device probing is done via PCI.
Split the current Octeon driver into an Octeon and a common part
and add the ThunderX support.
Signed-off-by: Jan Glauber
Acked-by
Hi,
these two patches add support for the Cavium ThunderX SOC.
The patches are on-top of the previous i2c-octeon series.
Please review, feedback welcome!
Jan
Jan Glauber (2):
i2c: Split i2c-octeon driver and add ThunderX support
i2c
Add smbus alert interrupt support.
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
drivers/i2c/busses/i2c-cavium.h| 4
drivers/i2c/busses/i2c-thunderx-core.c | 31 +++
2 files changed, 35 insertions(+)
diff --git a/drivers/i2c/busses/i2c-cavium.h
On Tue, Apr 19, 2016 at 04:06:08PM +0100, Mark Rutland wrote:
> On Wed, Mar 09, 2016 at 05:21:03PM +0100, Jan Glauber wrote:
> > Provide "uncore" facilities for different non-CPU performance
> > counter units. Based on Intel/AMD uncore pmu support.
> >
> > The
On Wed, Apr 20, 2016 at 11:31:21PM +0200, Wolfram Sang wrote:
> On Mon, Apr 11, 2016 at 05:28:38PM +0200, Jan Glauber wrote:
> > Switch to the i2c bus recovery framework using generic SCL recovery.
> > If this fails try to reset the hardware. The recovery is triggered
> > du
On Wed, Apr 20, 2016 at 02:55:15PM -0700, David Daney wrote:
> On 04/20/2016 02:43 PM, Wolfram Sang wrote:
> >On Mon, Apr 11, 2016 at 05:28:39PM +0200, Jan Glauber wrote:
> [...]
> >>+ */
> >>+static int octeon_i2c_hlc_wait(struct octeon_i2c *i2c
On Wed, Apr 20, 2016 at 11:43:54PM +0200, Wolfram Sang wrote:
> On Mon, Apr 11, 2016 at 05:28:39PM +0200, Jan Glauber wrote:
> > From: David Daney
> >
> > Use High-Level Controller (HLC) when possible. The HLC can read/write
> > up to 8 bytes and is completely o
On Thu, Apr 21, 2016 at 03:54:50PM +0200, Wolfram Sang wrote:
>
> > I assumed this check was bogus and there are no valid 0-length
> > messages...
>
> They are valid (check SMBUS_QUICK), but not every controller can handle
> them correctly. Your driver has SMBUS_QUICK enabled, so this is a
> cont
d max device limit
- trimmed include files
Feedback welcome!
Jan
-----
Jan Glauber (5):
arm64/perf: Basic uncore counter support for Cavium ThunderX
arm64/perf: Cavium ThunderX L2C TAD uncore support
arm64/perf: Cavium ThunderX L2C CBC uncore su
Support counters of the L2 Cache tag and data units.
Also support pass2 added/modified counters by checking MIDR.
Signed-off-by: Jan Glauber
---
drivers/perf/uncore/Makefile| 3 +-
drivers/perf/uncore/uncore_cavium.c | 6 +-
drivers/perf/uncore/uncore_cavium.h
Support for the OCX transmit link counters.
Signed-off-by: Jan Glauber
---
drivers/perf/uncore/Makefile| 3 +-
drivers/perf/uncore/uncore_cavium.c | 3 +
drivers/perf/uncore/uncore_cavium.h | 4 +
drivers/perf/uncore/uncore_cavium_ocx_tlk.c | 380
Support counters of the L2 cache crossbar connect.
Signed-off-by: Jan Glauber
---
drivers/perf/uncore/Makefile| 3 +-
drivers/perf/uncore/uncore_cavium.c | 3 +
drivers/perf/uncore/uncore_cavium.h | 4 +
drivers/perf/uncore/uncore_cavium_l2c_cbc.c | 237
Support counters on the DRAM controllers.
Also support pass2 added counters by checking MIDR.
Signed-off-by: Jan Glauber
---
drivers/perf/uncore/Makefile| 3 +-
drivers/perf/uncore/uncore_cavium.c | 3 +
drivers/perf/uncore/uncore_cavium.h | 4 +
drivers/perf/uncore
is used to group devices by node
so counters on one node can be merged. The NUMA node can be selected
via a new sysfs node attribute.
Without NUMA support all devices will be on node 0.
4) All counters are 64 bit wide without overflow interrupts.
Signed-off-by: Jan Glauber
---
drivers/per
The ThunderX SOC uses the same i2c block as the Octeon SOC.
The main difference is that on ThunderX the device is a PCI device
so device probing is done via PCI, interrupts are MSIX and the
clock is taken from device tree.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/Kconfig
From: David Daney
cn78xx has a different interrupt architecture, so we have to manage
the interrupts differently.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 131
1 file changed, 120 insertions(+), 11
Add compatible string for Cavium Octeon cn78XX SOCs TWSI.
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
Documentation/devicetree/bindings/i2c/i2c-octeon.txt | 6 ++
1 file changed, 6 insertions
i2c-octeon: Add support for cn78xx chips
i2c-octeon: Add workaround for broken irqs on CN3860
Jan Glauber (8):
i2c-octeon: Cleanup i2c-octeon driver
i2c-octeon: Cleanup resource allocation code
i2c-octeon: Change adapter timeout and retry default values
dt-bindings: i2c: Add Octeon cn78xx
Move common functionality into a separate file in preparation of the
re-use from the ThunderX i2c driver.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/Makefile | 3 +-
drivers/i2c/busses/i2c-cavium.c | 822 +
drivers/i2c/busses/i2c-cavium.h
Remove resource values from struct i2c_octeon and use
devm_ioremap_resource helper.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 18 +++---
1 file changed, 3 insertions(+), 15 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c
From: Peter Swain
Signed-off-by: Peter Swain
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
drivers/i2c/busses/i2c-octeon.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-octeon.c
index
result is not used
(octeon_i2c_stop, octeon_i2c_set_clock)
- remove debug code from octeon_i2c_stop
- renamed some functions for readability
- update copyright
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 190 ++--
1 file changed, 84
From: David Daney
CN3860 does not interrupt the CPU when the i2c status changes. If
we get a timeout, and see the status has in fact changed, we know we
have this problem, and drop back to polling.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 55
what's
achievable, and much better than the worst-case 100 bytes/sec before.
Signed-off-by: Peter Swain
Signed-off-by: Jan Glauber
Acked-by: David Daney
---
drivers/i2c/busses/i2c-octeon.c | 25 -
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/driver
Add smbus alert interrupt support.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-cavium.h| 6 ++
drivers/i2c/busses/i2c-thunderx-core.c | 35 ++
2 files changed, 41 insertions(+)
diff --git a/drivers/i2c/busses/i2c-cavium.h b/drivers/i2c
of non-final read
msgs too.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 783
1 file changed, 629 insertions(+), 154 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-o
Convert the adapter timeout to 2 ms instead of a fixed number of
jiffies and set retries to 10.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers/i2c/busses/i2c-octeon.c
This is just an intermediate commit in preparation of
the driver split. The module rename in this commit
will be reverted in the next patch, this is just done
to make the series bisectible.
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/Makefile |2 +-
drivers/i2c/busses/i2c
From: David Daney
If I2C_M_RECV_LEN is set consider the length byte.
Signed-off-by: David Daney
Signed-off-by: Jan Glauber
---
drivers/i2c/busses/i2c-octeon.c | 22 +-
1 file changed, 17 insertions(+), 5 deletions(-)
diff --git a/drivers/i2c/busses/i2c-octeon.c b/drivers
re going to be
stopped and, in case any CPUs remain online list them.
Signed-off-by: Jan Glauber
---
arch/arm64/kernel/smp.c | 16 +---
1 file changed, 5 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index b2d5f4e..29f4e37 100644
--- a/arc
101 - 200 of 541 matches
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