[PATCH V4 3/3] scsi: Align queue to ARCH_DMA_MINALIGN in non-coherent DMA mode

2017-09-14 Thread Huacai Chen
eback) Step 3, dma_from_device Step 4, dma_unmap_single If a DMA buffer and a kernel structure share a same cache line, and if the kernel structure has dirty data, cache_invalidate (no writeback) will cause data lost. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen --- drivers

Re: [PATCH] MIPS: Revert "MIPS: Fix race on setting and getting cpu_online_mask"

2017-08-28 Thread Huacai Chen
I suggest to drop sync_r4k completely, because it is inaccurate. You can use IPI to synchronize count/compare instead, as Loongson-3 does. Huacai On Mon, Aug 28, 2017 at 6:07 PM, Matija Glavinic Pecotic wrote: > On 08/23/2017 10:21 AM, Matt Redfearn wrote: >> As noted in the commit message, upst

Re: [PATCH] MIPS: Revert "MIPS: Fix race on setting and getting cpu_online_mask"

2017-08-31 Thread Huacai Chen
Yes, your original patch (8f46cca1e6c06) is needed in 4.12/4.13, but they should be reverted in 4.1/4.4-stable branch. Huacai On Wed, Aug 30, 2017 at 9:24 PM, Matt Redfearn wrote: > Hi Huacai, > > On 29/08/17 02:43, Huacai Chen wrote: >> >> I suggest to drop sync_r4k comp

[PATCH V5 1/3] dma-mapping: Introduce device_is_coherent() as a helper

2017-09-17 Thread Huacai Chen
dma_map_ops. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen --- arch/mips/cavium-octeon/dma-octeon.c | 3 ++- arch/mips/loongson64/common/dma-swiotlb.c | 1 + arch/mips/mm/dma-default.c| 3 ++- arch/mips/netlogic/common/nlm-dma.c | 3 ++- include/linux/dma-mapping.h

[PATCH V5 2/3] mm: dmapool: Align to ARCH_DMA_MINALIGN in non-coherent DMA mode

2017-09-17 Thread Huacai Chen
) Step 3, dma_from_device Step 4, dma_unmap_single If a DMA buffer and a kernel structure share a same cache line, and if the kernel structure has dirty data, cache_invalidate (no writeback) will cause data lost. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen --- mm/dmapool.c

[PATCH V5 3/3] scsi: Align queue to ARCH_DMA_MINALIGN in non-coherent DMA mode

2017-09-17 Thread Huacai Chen
eback) Step 3, dma_from_device Step 4, dma_unmap_single If a DMA buffer and a kernel structure share a same cache line, and if the kernel structure has dirty data, cache_invalidate (no writeback) will cause data lost. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen --- drivers

[PATCH V6 1/3] dma-mapping: Introduce device_is_coherent() as a helper

2017-09-19 Thread Huacai Chen
We will use device_is_coherent() as a helper function, which will be used in the next patch. There is a MIPS-specific plat_device_is_coherent(), but we need a more generic solution, so add and use a new function pointer in dma_map_ops. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen

[PATCH V6 2/3] dma-mapping: Rework dma_get_cache_alignment() function

2017-09-19 Thread Huacai Chen
Make dma_get_cache_alignment() to accept a 'dev' argument. As a result, it can return different alignments due to different devices' I/O cache coherency. For compatibility, make all existing callers pass a NULL dev argument. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Che

[PATCH V6 3/3] scsi: Align block queue to dma_get_cache_alignment()

2017-09-19 Thread Huacai Chen
eback) Step 3, dma_from_device Step 4, dma_unmap_single If a DMA buffer and a kernel structure share a same cache line, and if the kernel structure has dirty data, cache_invalidate (no writeback) will cause data lost. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen --- drivers

[PATCH V2 1/3] dma-mapping: Provide a default plat_device_is_coherent()

2017-09-12 Thread Huacai Chen
We will use plat_device_is_coherent() in generic cases, but it is MIPS-specific now. So we provide a default implementation. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen --- arch/mips/include/asm/dma-mapping.h | 1 + include/linux/dma-mapping.h | 8 2 files changed, 9

[PATCH V2 2/3] mm: dmapool: Align to ARCH_DMA_MINALIGN in non-coherent DMA mode

2017-09-12 Thread Huacai Chen
In non-coherent DMA mode, kernel uses cache flushing operations to maintain I/O coherency, so the dmapool objects should be aligned to ARCH_DMA_MINALIGN. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen --- mm/dmapool.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/mm/dmapool.c b

[PATCH V2 3/3] scsi: Align queue to ARCH_DMA_MINALIGN in non-coherent DMA mode

2017-09-12 Thread Huacai Chen
In non-coherent DMA mode, kernel uses cache flushing operations to maintain I/O coherency, so scsi's block queue should be aligned to ARCH_DMA_MINALIGN. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen --- drivers/scsi/scsi_lib.c | 9 ++--- 1 file changed, 6 insertions(+), 3 dele

[PATCH 1/2] mm: dmapool: Align to ARCH_DMA_MINALIGN in non-coherent DMA mode

2017-09-07 Thread Huacai Chen
In non-coherent DMA mode, kernel uses cache flushing operations to maintain I/O coherency, so the dmapool objects should be aligned to ARCH_DMA_MINALIGN. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen --- mm/dmapool.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/mm/dmapool.c b

[PATCH 2/2] scsi: Align queue to ARCH_DMA_MINALIGN in non-coherent DMA mode

2017-09-07 Thread Huacai Chen
In non-coherent DMA mode, kernel uses cache flushing operations to maintain I/O coherency, so scsi's block queue should be aligned to ARCH_DMA_MINALIGN. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen --- drivers/scsi/scsi_lib.c | 9 ++--- 1 file changed, 6 insertions(+), 3 dele

Re: [PATCH 3.16 032/134] MIPS: Loongson-3: Select MIPS_L1_CACHE_SHIFT_6

2017-08-20 Thread Huacai Chen
3.16 doesn't need this, because 3.16 doesn't support Loongson-3 R2/R3. Huacai On Fri, Aug 18, 2017 at 9:13 PM, Ben Hutchings wrote: > 3.16.47-rc1 review patch. If anyone has any objections, please let me know. > > ------ > > From

[PATCH V7 2/2] scsi: Align block queue to dma_get_cache_alignment()

2017-09-25 Thread Huacai Chen
eback) Step 3, dma_from_device Step 4, dma_unmap_single If a DMA buffer and a kernel structure share a same cache line, and if the kernel structure has dirty data, cache_invalidate (no writeback) will cause data lost. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen --- drivers

[PATCH V7 1/2] dma-mapping: Rework dma_get_cache_alignment()

2017-09-25 Thread Huacai Chen
he future, so add a new get_cache_alignment() function pointer in 'struct dma_map_ops' as a generic solution. For compatibility (always return ARCH_DMA_MINALIGN), make all existing callers pass a NULL dev argument to dma_get_cache_alignment(). Cc: sta...@vger.kernel.org Signed-off-by

Re: [PATCH V5 6/9] MIPS: Loongson-3: support irq_set_affinity() in i8259 chip

2017-06-15 Thread Huacai Chen
OK, I'll update my patch and set it at runtime. Huacai On Thu, Jun 15, 2017 at 9:15 PM, Marc Zyngier wrote: > Thanks Ralf. > > On 15/06/17 12:41, Ralf Baechle wrote: >> On Thu, Jun 15, 2017 at 10:31:05AM +0800, Huacai Chen wrote: >> >>> With this patch we can

[PATCH 0/1] About MIPS/Loongson maintainance

2017-12-06 Thread Huacai Chen
Hi, Linus, Stephen, Greg, Ralf and James, We are kernel developers from Lemote Inc. and Loongson community. We have already made some contributions in Linux kernel, but we hope we can do more works. Of course Loongson is a sub-arch in MIPS, but linux-mips community is so inactive (Maybe maintaine

[PATCH 1/1] MAINTAINERS: Add Loongson-2/Loongson-3 maintainers

2017-12-06 Thread Huacai Chen
Add Jiaxun Yang as the MIPS/Loongson-2 maintainer and add Huacai Chen as the MIPS/Loongson-3 maintainer. Signed-off-by: Huacai Chen Signed-off-by: Jiaxun Yang --- MAINTAINERS | 20 1 file changed, 20 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index cdd6365

[PATCH V9 4/4] libsas: Align sata_device's rps_resp on a cacheline

2017-10-23 Thread Huacai Chen
a SAS expander. Fix this by ensuring that the rps_resp buffer is cacheline aligned. This issue is similar to that fixed by Commit 84bda12af31f93 ("libata: align ap->sector_buf") and Commit 4ee34ea3a12396f35b26 ("libata: Align ata_device's id on a cacheline"). Cc: sta...@vger

[PATCH V9 1/4] dma-mapping: Rework dma_get_cache_alignment()

2017-10-23 Thread Huacai Chen
n Cc: Andy Gross Cc: Mark A. Greer Cc: Robert Baldyga Cc: Marek Szyprowski Signed-off-by: Huacai Chen --- drivers/infiniband/hw/mthca/mthca_main.c | 2 +- drivers/media/v4l2-core/videobuf2-dma-contig.c | 2 +- drivers/net/ethernet/broadcom/b44.c| 8 +- drivers

[PATCH V9 2/4] MIPS: Implement dma_map_ops::get_cache_alignment()

2017-10-23 Thread Huacai Chen
Currently, MIPS is an architecture which support coherent & noncoherent devices co-exist. So implement get_cache_alignment() function pointer in 'struct dma_map_ops' to return different dma alignments. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen --- arch/mips/cav

[PATCH V9 3/4] scsi: Align block queue to dma_get_cache_alignment()

2017-10-23 Thread Huacai Chen
e (no writeback) will cause data corruption. Cc: sta...@vger.kernel.org Signed-off-by: Huacai Chen --- drivers/scsi/scsi_lib.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c index 9cf6a80..19abc2e 100644 --- a/drivers

Re: [PATCH 0/1] About MIPS/Loongson maintainance

2017-12-08 Thread Huacai Chen
Hi, James, Of course we don't want to send PR directly, if there is a better way. So, I hope you can officially be a co-maintainer of linux-mips, and as a result, our community will become more active. I think most of MIPS developers have the same will as me. Huacai On Fri, Dec 8, 2017 at 3:51 P

Re: [PATCH 1/4] LoongArch: Don't crash in stack_top() for tasks without vDSO

2024-10-14 Thread Huacai Chen
Hi, Thomas, I can take this patch to the loongarch tree, but I think others should get upstream via kselftests tree? Huacai On Mon, Oct 14, 2024 at 7:36 PM Thomas Weißschuh wrote: > > Not all tasks have a vDSO mapped, for example kthreads never do. > If such a task ever ends up calling stack_to

Re: [PATCH 1/4] LoongArch: Don't crash in stack_top() for tasks without vDSO

2024-10-14 Thread Huacai Chen
On Tue, Oct 15, 2024 at 2:14 PM Thomas Weißschuh wrote: > > Hi Huacai, > > On Tue, Oct 15, 2024 at 10:15:39AM +0800, Huacai Chen wrote: > > I can take this patch to the loongarch tree, but I think others should > > get upstream via kselftests tree? > > Yes, sounds go

Re: [PATCH v8 3/3] irqchip/loongson-eiointc: Add extioi virt extension support

2024-10-22 Thread Huacai Chen
> > On Wed, Sep 11 2024 at 17:11, Huacai Chen wrote: > >> Hi, Thomas, > >> > >> On Fri, Aug 30, 2024 at 5:32 PM Bibo Mao wrote: > >>> > >>> Interrupts can be routed to maximal four virtual CPUs with one HW > >>> EIOINTC interr

Re: [PATCH v9 2/5] KVM: selftests: Add KVM selftests header files for LoongArch

2025-04-20 Thread Huacai Chen
Hi, Bibo, On Wed, Apr 16, 2025 at 11:55 AM Bibo Mao wrote: > > Add KVM selftests header files for LoongArch, including processor.h > and kvm_util_base.h. It mainly contains LoongArch CSR register > definition and page table entry definition. > > Signed-off-by: Bibo Mao > --- > .../testing/selft

Re: [PATCH v9 3/5] KVM: selftests: Add core KVM selftests support for LoongArch

2025-04-20 Thread Huacai Chen
Hi, Bibo, On Wed, Apr 16, 2025 at 11:55 AM Bibo Mao wrote: > > Add core KVM selftests support for LoongArch, it includes exception > handler, mmu page table setup and vCPU startup entry support. > > Signed-off-by: Bibo Mao > --- > .../selftests/kvm/lib/loongarch/exception.S | 59 +++ > .../s

Re: [PATCH v2 1/2] MIPS: Don't crash in stack_top() for tasks without ABI or vDSO

2025-04-14 Thread Huacai Chen
Hi, Thomas, On Mon, Apr 14, 2025 at 4:29 PM Thomas Weißschuh wrote: > > Not all tasks have an ABI associated or vDSO mapped, > for example kthreads never do. > If such a task ever ends up calling stack_top(), it will derefence the > NULL vdso pointer and crash. > > This can for example happen whe

Re: [PATCH v8 1/4] KVM: selftests: Add KVM selftests header files for LoongArch

2025-04-14 Thread Huacai Chen
Hi, Bibo, On Thu, Apr 10, 2025 at 11:57 AM Bibo Mao wrote: > > Add KVM selftests header files for LoongArch, including processor.h > and kvm_util_base.h. It mainly contains LoongArch CSR register > definition and page table entry definition. > > Signed-off-by: Bibo Mao > --- > .../testing/selft

Re: [PATCH v3 1/2] MIPS: Don't crash in stack_top() for tasks without ABI or vDSO

2025-04-15 Thread Huacai Chen
Hi, Thomas, On Tue, Apr 15, 2025 at 3:10 PM Thomas Weißschuh wrote: > > Not all tasks have an ABI associated or vDSO mapped, > for example kthreads never do. > If such a task ever ends up calling stack_top(), it will derefence the > NULL ABI pointer and crash. > > This can for example happen when

Re: [PATCH v11 3/5] KVM: selftests: Add core KVM selftests support for LoongArch

2025-05-11 Thread Huacai Chen
Hi, Bibo, On Sun, Apr 27, 2025 at 2:45 PM Bibo Mao wrote: > > Add core KVM selftests support for LoongArch, it includes exception > handler, mmu page table setup and vCPU startup entry support. > > Signed-off-by: Bibo Mao > --- > .../selftests/kvm/lib/loongarch/exception.S | 59 +++ > .../se

Re: [PATCH v11 0/5] KVM: selftests: Add LoongArch support

2025-05-11 Thread Huacai Chen
Hi, Bibo, On Sun, Apr 27, 2025 at 2:45 PM Bibo Mao wrote: > > This patchset adds KVM selftests for LoongArch system, currently only > some common test cases are supported and pass to run. These test cases > are listed as following: > coalesced_io_test > demand_paging_test > dirty_log_

Re: [PATCH v11 5/5] KVM: selftests: Add test cases for LoongArch

2025-05-11 Thread Huacai Chen
; F: arch/loongarch/include/asm/kvm* > F: arch/loongarch/include/uapi/asm/kvm* > F: arch/loongarch/kvm/ > +F: tools/testing/selftests/kvm/*/loongarch/ > +F: tools/testing/selftests/kvm/lib/loongarch/ > > KERNEL VIRTUAL MACHINE FOR MIPS (KVM/mips) > M:

Re: [PATCH v4 1/2] MIPS: Don't crash in stack_top() for tasks without ABI or vDSO

2025-06-17 Thread Huacai Chen
Reviewed-by: Huacai Chen On Wed, Jun 11, 2025 at 7:28 PM Thomas Weißschuh wrote: > > Not all tasks have an ABI associated or vDSO mapped, > for example kthreads never do. > If such a task ever ends up calling stack_top(), it will derefence the > NULL ABI pointer and crash. &

[irqchip: irq/irqchip-next] irqchip/loongson-pch-msi: Use bitmap_zalloc() to allocate bitmap

2021-02-09 Thread irqchip-bot for Huacai Chen
The following commit has been merged into the irq/irqchip-next branch of irqchip: Commit-ID: c1f664d2400e73d5ca0fcd067fa5847d2c789c11 Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/c1f664d2400e73d5ca0fcd067fa5847d2c789c11 Author:Huacai Chen

[irqchip: irq/irqchip-next] irqchip/loongson-htpic: Fix build warnings

2020-12-11 Thread irqchip-bot for Huacai Chen
The following commit has been merged into the irq/irqchip-next branch of irqchip: Commit-ID: 3ee36352e26935c7e8145eb4e7ed38b536ca01fc Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/3ee36352e26935c7e8145eb4e7ed38b536ca01fc Author:Huacai Chen

[irqchip: irq/irqchip-next] irqchip/loongson-liointc: Fix build warnings

2021-01-05 Thread irqchip-bot for Huacai Chen
The following commit has been merged into the irq/irqchip-next branch of irqchip: Commit-ID: 4cc99d03757df10a4064ba28bf6021406b04d6a9 Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/4cc99d03757df10a4064ba28bf6021406b04d6a9 Author:Huacai Chen

[tip:irq/urgent] genirq/irqdesc: Fix double increment in alloc_descs()

2019-01-17 Thread tip-bot for Huacai Chen
Commit-ID: 12fee4cd5be2c4a73cc13d7ad76eb2d2feda8a71 Gitweb: https://git.kernel.org/tip/12fee4cd5be2c4a73cc13d7ad76eb2d2feda8a71 Author: Huacai Chen AuthorDate: Thu, 17 Jan 2019 11:00:09 +0800 Committer: Thomas Gleixner CommitDate: Fri, 18 Jan 2019 00:43:09 +0100 genirq/irqdesc: Fix

[tip: irq/core] irqchip/loongson-htvec: Fix initial interrupt clearing

2020-10-11 Thread tip-bot2 for Huacai Chen
The following commit has been merged into the irq/core branch of tip: Commit-ID: 1d1e5630de78f7253ac24b92cee6427c3ff04d56 Gitweb: https://git.kernel.org/tip/1d1e5630de78f7253ac24b92cee6427c3ff04d56 Author:Huacai Chen AuthorDate:Fri, 11 Sep 2020 18:26:18 +08:00 Committer

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